2026-03-11 01:31:28.904 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.204.20:5700'
2026-03-11 01:31:28.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.204.20:5802)
2026-03-11 01:31:28.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.204.20:5801)
2026-03-11 01:31:28.904 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.204.22:6700'
2026-03-11 01:31:28.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.204.22:6802)
2026-03-11 01:31:28.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.204.22:6801)
2026-03-11 01:31:28.904 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.204.20:5700/1'
2026-03-11 01:31:28.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.204.20:5804)
2026-03-11 01:31:28.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.204.20:5803)
2026-03-11 01:31:28.904 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.204.20:5700/2'
2026-03-11 01:31:28.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.204.20:5806)
2026-03-11 01:31:28.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.204.20:5805)
2026-03-11 01:31:28.904 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.204.20:5700/3'
2026-03-11 01:31:28.904 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.204.20:5808)
2026-03-11 01:31:28.904 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.204.20:5807)
2026-03-11 01:31:28.904 [INFO] fake_trx.py:429 Init complete
2026-03-11 01:31:28.904 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-11 01:31:30.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:30.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:30.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:30.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:30.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:30.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:33.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:33.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:33.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:33.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:33.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 0 -> 1
2026-03-11 01:31:33.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:31:33.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:31:33.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:33.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:33.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:33.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:31:33.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:33.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 0 -> 1
2026-03-11 01:31:33.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:33.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:31:33.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:31:33.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:33.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:33.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:33.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:31:33.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:33.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 0 -> 1
2026-03-11 01:31:33.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:33.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:31:33.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:31:33.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:33.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:33.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:33.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:31:33.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:33.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 0 -> 1
2026-03-11 01:31:33.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:33.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:31:33.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:31:33.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:31:33.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:31:33.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:31:33.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:31:33.401 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:31:33.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:33.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:31:33.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:31:33.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:33.952 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:31:33.955 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:31:33.956 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:31:33.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:33.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:33.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:33.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:33.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:33.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:33.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:33.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:33.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:34.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:34.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:34.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:34.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:34.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:31:34.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:34.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:34.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:34.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:34.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:34.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:34.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:34.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:34.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:34.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:34.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:34.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:34.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:34.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:34.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:34.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:34.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:31:34.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:34.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:34.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:34.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:35.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:35.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:35.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:35.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:35.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:35.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:35.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:35.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:35.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:35.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:35.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:31:35.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:35.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:35.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:35.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:35.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:35.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:35.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:35.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:35.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:35.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:35.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:35.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:35.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:35.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:35.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:35.800 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:31:35.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:35.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:35.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:35.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:35.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:36.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:36.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:36.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:36.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:36.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:31:36.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:36.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:36.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:36.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:36.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:36.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:36.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:36.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:36.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:36.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:36.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:36.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:36.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:36.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:36.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:36.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:36.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:36.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:31:37.233 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:31:37.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:37.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:37.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:37.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:37.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:37.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:37.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:37.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:37.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:37.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:37.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:37.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:37.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:37.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:37.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:37.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:37.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:37.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:37.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:37.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:31:38.190 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:31:38.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:38.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:38.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:38.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:38.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:38.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:38.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:38.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:38.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:38.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:38.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:38.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:38.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:38.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.665 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:31:38.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:38.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:38.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:38.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:38.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:38.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:38.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:38.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:38.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:38.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:38.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:38.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:31:39.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:39.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:39.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:39.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:39.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:31:39.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:39.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:39.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:39.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:39.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:39.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:39.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:39.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:39.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:39.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:39.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:39.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:39.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:40.098 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:31:40.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:40.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:40.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:40.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:40.576 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:31:40.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:40.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:40.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:40.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:40.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:40.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:40.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:40.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:40.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:40.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:40.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:40.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:41.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:41.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:41.054 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:31:41.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:41.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:41.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:41.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:31:41.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:41.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:41.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:41.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:41.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:41.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:41.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:41.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:41.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:41.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:41.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:41.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:41.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:42.010 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:31:42.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:42.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:42.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:42.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:42.488 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:31:42.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:42.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:42.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:42.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:42.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:42.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:42.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:42.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:42.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:42.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:42.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:42.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:42.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:31:43.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:43.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:43.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:43.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:43.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:43.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:43.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:43.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:43.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:43.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:43.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:43.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:43.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:31:43.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:43.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:43.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:43.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:43.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:43.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:43.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:43.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:43.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:43.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:43.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:43.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:43.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:43.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:43.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:43.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:43.922 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:31:44.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:44.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:44.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:44.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:44.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:44.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:44.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:44.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:44.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:44.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:44.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:44.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:44.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:44.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.400 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:31:44.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:44.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:44.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:44.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:44.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:44.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:44.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:44.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:44.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:44.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:44.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:44.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:44.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:44.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:44.877 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:31:45.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:45.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:45.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:45.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:45.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:45.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:45.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:45.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:45.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:45.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:45.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:45.355 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:31:45.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:45.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:45.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:45.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:45.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:45.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:45.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:45.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:45.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:45.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:45.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:45.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:45.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:45.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:31:45.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:45.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:45.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:45.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:46.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:46.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:46.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:46.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:46.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:46.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:46.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:46.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:46.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:46.310 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:31:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:46.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:46.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:46.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:46.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:46.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:46.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:46.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:46.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:46.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:46.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:46.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:31:46.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:31:46.787 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:31:46.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:46.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:31:46.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:31:46.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:46.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:47.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:31:47.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:47.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:47.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:47.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:47.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:47.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:47.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:47.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:47.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:47.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:47.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:47.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:47.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:47.260 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:31:47.260 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.260 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.260 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.261 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.262 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:47.262 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2960 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:52.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:52.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:52.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:52.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:52.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:52.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:52.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:52.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:52.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:52.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:52.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:31:52.273 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:31:52.274 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:31:52.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:52.274 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:52.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:52.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:31:52.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:52.275 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:31:52.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:52.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:31:52.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:52.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:31:52.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:52.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:31:52.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:31:52.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:52.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:52.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:52.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:31:52.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:52.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:31:52.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:31:52.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:31:52.281 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:31:52.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:52.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:52.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:31:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:31:52.819 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:31:52.821 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:31:52.823 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:31:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:52.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:52.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:52.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:52.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:53.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:53.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:53.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:31:53.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:53.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:53.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:53.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:53.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:53.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-03-11 01:31:54.181 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-03-11 01:31:54.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 01:31:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:54.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:54.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:54.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:54.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:54.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:54.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:54.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:54.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:54.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:54.262 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:31:54.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:54.262 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=428 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:31:59.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:59.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:59.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:59.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:59.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:59.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:59.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:59.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:59.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:59.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:31:59.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:31:59.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:31:59.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:31:59.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:59.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:59.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:59.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:31:59.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:31:59.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:31:59.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:59.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:31:59.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:31:59.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:59.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:59.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:31:59.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:59.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:31:59.294 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:31:59.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:59.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:31:59.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:31:59.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:59.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:31:59.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:59.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:31:59.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:31:59.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:31:59.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:59.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:31:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:31:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:31:59.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:31:59.304 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:31:59.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:31:59.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:31:59.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:31:59.831 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:31:59.832 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:31:59.833 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:31:59.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:59.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:31:59.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:31:59.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:31:59.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:59.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:31:59.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:31:59.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:31:59.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:31:59.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:31:59.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:31:59.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:31:59.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:31:59.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:31:59.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:31:59.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:31:59.880 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:31:59.880 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:04.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:32:04.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:32:04.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:04.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:04.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:04.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:04.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:04.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:04.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:04.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:04.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:04.892 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:04.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:32:04.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:04.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:32:04.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:32:04.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:04.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:04.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:32:04.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:04.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:04.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:32:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:04.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:32:04.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:32:04.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:04.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:04.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:04.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:32:04.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:04.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:32:04.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:32:04.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:32:04.900 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:32:04.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:04.905 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:32:05.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:32:05.420 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:32:05.421 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:32:05.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:05.422 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:32:05.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:05.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:05.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:05.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:05.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:05.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:05.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:05.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:05.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:05.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:05.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:32:05.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:32:05.463 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:32:05.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:05.463 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:32:10.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:32:10.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:32:10.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:10.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:10.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:10.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:10.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:10.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:10.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:10.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:10.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:32:10.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:32:10.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:32:10.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:10.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:10.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:10.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:32:10.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:10.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:32:10.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:10.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:32:10.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:10.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:32:10.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:10.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:32:10.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:32:10.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:10.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:10.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:10.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:32:10.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:10.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:32:10.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:32:10.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:32:10.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:32:10.485 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:32:10.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:32:10.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:32:11.010 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:32:11.011 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:32:11.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:11.013 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:32:11.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:11.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:11.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:11.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:11.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:11.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:11.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:11.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:11.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:11.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:11.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:11.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:32:11.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:32:11.146 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:32:16.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:32:16.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:32:16.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:16.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:16.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:16.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:16.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:32:16.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:16.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:16.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:32:16.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:32:16.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:32:16.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:32:16.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:16.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:16.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:32:16.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:32:16.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:32:16.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:32:16.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:16.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:32:16.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:32:16.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:16.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:16.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:32:16.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:32:16.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:32:16.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:32:16.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:16.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:32:16.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:32:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:32:16.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:32:16.173 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:32:16.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:16.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:32:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:32:16.701 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:32:16.701 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:32:16.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:16.704 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:32:16.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:16.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:16.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:16.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:16.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:16.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:16.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:16.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:16.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:16.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:16.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:16.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:16.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:16.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:32:17.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:17.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:17.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:17.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:17.615 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:32:18.090 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:32:18.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:18.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:18.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:18.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:18.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:32:19.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:32:19.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:19.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:19.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:19.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:19.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:32:19.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:32:20.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:20.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:20.475 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:32:20.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:20.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:20.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:20.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:20.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:20.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:20.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:20.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:20.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:20.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:20.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:20.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:20.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:20.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:20.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:20.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:20.952 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:32:21.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:21.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:32:21.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:32:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:32:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:32:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:32:21.908 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:32:22.386 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:32:22.864 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:32:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:32:23.819 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:32:24.297 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:32:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:32:25.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:25.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:25.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:25.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:25.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:25.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:25.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:25.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:25.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:25.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:25.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:25.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:25.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:25.252 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:32:25.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:25.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:25.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:25.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:25.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:25.730 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:32:26.208 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:32:26.685 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:32:27.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:32:27.641 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:32:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:32:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:32:29.075 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:32:29.553 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:32:29.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:29.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:29.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:29.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:29.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:29.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:29.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:29.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:29.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:29.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:29.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:29.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:29.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:29.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:29.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:29.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:29.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:30.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:30.030 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:32:30.508 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:32:30.986 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:32:31.464 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:32:31.941 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:32:32.420 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:32:32.897 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:32:33.375 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:32:33.853 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:32:34.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:34.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:34.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:34.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:34.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:34.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:34.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:34.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:34.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:34.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:34.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:34.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:34.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:34.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:34.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:34.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:34.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:34.331 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:32:34.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:34.809 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:32:35.286 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:32:35.764 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:32:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:32:36.719 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:32:37.197 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:32:37.675 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:32:38.152 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:32:38.629 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:32:38.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:38.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:38.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:38.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:38.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:38.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:38.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:38.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:38.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:38.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:38.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:38.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:38.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:38.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:38.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:38.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:38.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:39.107 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:32:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:39.585 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:32:40.063 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:32:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:32:41.019 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:32:41.497 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:32:41.975 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:32:42.453 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:32:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:32:43.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:43.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:43.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:43.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:43.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:43.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:43.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:43.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:43.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:43.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:43.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:43.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:43.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:43.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:43.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:43.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:43.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:43.408 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:32:43.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:43.887 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:32:44.364 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:32:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:32:45.321 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:32:45.799 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:32:46.277 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:32:46.755 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:32:47.233 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:32:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:47.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:47.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:47.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:47.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:47.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:47.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:47.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:47.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:47.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:47.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:47.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:47.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:47.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:47.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:47.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:47.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:47.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:47.711 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:32:48.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:48.189 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:32:48.667 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:32:49.145 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:32:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:32:50.102 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:32:50.580 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:32:51.059 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:32:51.537 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:32:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:52.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:52.015 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:32:52.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:52.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:52.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:52.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:52.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:52.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:52.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:52.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:52.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:52.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:52.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:52.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:52.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:52.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:52.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:52.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:52.493 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:32:52.970 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:32:53.448 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:32:53.926 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:32:54.404 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:32:54.882 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:32:55.360 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:32:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:32:56.316 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:32:56.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:56.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:56.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:56.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:56.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:32:56.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:32:56.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:32:56.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:56.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:56.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:56.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:32:56.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:32:56.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:32:56.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:56.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:32:56.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:32:56.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:56.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:32:56.794 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:32:57.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:32:57.272 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:32:57.750 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:32:58.228 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:32:58.706 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:32:59.183 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:32:59.662 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:33:00.140 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:33:00.618 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:33:01.095 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:33:01.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:01.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:01.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:01.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:01.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:01.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:01.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:01.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:01.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:01.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:01.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:01.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:01.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:01.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:01.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:01.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:01.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:01.573 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:33:02.051 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:33:02.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:02.530 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:33:03.008 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:33:03.486 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:33:03.964 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:33:04.443 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 01:33:04.921 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 01:33:05.399 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 01:33:05.877 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 01:33:06.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:06.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:06.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:06.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:06.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:06.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:06.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:06.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:06.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:06.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:06.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:06.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:06.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:06.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:06.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:06.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:06.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:06.354 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 01:33:06.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 01:33:07.306 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 01:33:07.784 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 01:33:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 01:33:08.741 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 01:33:09.219 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 01:33:09.697 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 01:33:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 01:33:10.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:10.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:10.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:10.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:10.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:10.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:10.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:10.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:10.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:10.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:10.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:10.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:10.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:10.653 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 01:33:10.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:10.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:10.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:10.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:10.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:11.130 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 01:33:11.609 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 01:33:12.087 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 01:33:12.565 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 01:33:13.044 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 01:33:13.522 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 01:33:14.001 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 01:33:14.478 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 01:33:14.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:14.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:14.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:14.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:14.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:14.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:14.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:14.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:14.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:14.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:14.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:14.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:14.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:14.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:14.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:14.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:14.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:14.956 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 01:33:15.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:15.434 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 01:33:15.912 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 01:33:16.391 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 01:33:16.869 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 01:33:17.347 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 01:33:17.825 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 01:33:18.303 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 01:33:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 01:33:19.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:19.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:19.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:19.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:19.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:19.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:19.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:19.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:19.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:19.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:19.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:19.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:19.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:19.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:19.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:19.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:19.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:19.258 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 01:33:19.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:19.736 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 01:33:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 01:33:20.692 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 01:33:21.170 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 01:33:21.648 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 01:33:22.126 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 01:33:22.603 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 01:33:23.081 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 01:33:23.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:23.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:23.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:23.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:23.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:23.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:23.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:23.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:23.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:23.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:23.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:23.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:23.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:23.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:23.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:23.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:23.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:23.558 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 01:33:23.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:24.037 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 01:33:24.514 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 01:33:24.991 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 01:33:25.470 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 01:33:25.948 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 01:33:26.426 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 01:33:26.903 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 01:33:27.381 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 01:33:27.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:27.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:27.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:27.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:27.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:27.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:27.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:27.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:27.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:27.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:27.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:27.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:27.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:27.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:27.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:27.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:27.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:27.858 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 01:33:28.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:28.336 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 01:33:28.814 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 01:33:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 01:33:29.770 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 01:33:30.247 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 01:33:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 01:33:31.203 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 01:33:31.681 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 01:33:32.159 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 01:33:32.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:32.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:32.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:32.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:32.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:32.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:32.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:32.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:32.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:32.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:32.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:32.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:32.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:32.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:32.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:32.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:32.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:32.636 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 01:33:33.114 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 01:33:33.592 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 01:33:34.070 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 01:33:34.548 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 01:33:35.026 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 01:33:35.505 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 01:33:35.983 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 01:33:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 01:33:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:36.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:36.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:36.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:36.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:36.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:36.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:36.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:36.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:36.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:36.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:36.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:36.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:36.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:36.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:36.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:36.936 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 01:33:37.414 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 01:33:37.892 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 01:33:38.370 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 01:33:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 01:33:39.325 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 01:33:39.803 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 01:33:40.281 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 01:33:40.759 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 01:33:40.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:40.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:40.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:40.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:40.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:40.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:40.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:40.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:40.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:40.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:40.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:40.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:40.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:40.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:40.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:40.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:40.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:41.236 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 01:33:41.714 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 01:33:42.192 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 01:33:42.670 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 01:33:43.147 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 01:33:43.625 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 01:33:44.102 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 01:33:44.580 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 01:33:45.058 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 01:33:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:45.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:45.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:45.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:45.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:45.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:33:45.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:33:45.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:33:45.219 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:33:50.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:33:50.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:33:50.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:33:50.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:33:50.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:33:50.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:50.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:50.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:33:50.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:50.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:33:50.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:33:50.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:33:50.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:33:50.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:33:50.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:50.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:33:50.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:33:50.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:33:50.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:33:50.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:33:50.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:33:50.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:33:50.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:33:50.241 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:33:50.241 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:33:50.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:33:50.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:33:50.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:33:50.244 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:33:50.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:50.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:33:50.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:33:50.245 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:50.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:33:55.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:33:55.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:33:55.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:33:55.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:33:55.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:55.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:33:55.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:33:55.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:55.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:33:55.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:33:55.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:33:55.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:33:55.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:33:55.260 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:55.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:33:55.260 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:33:55.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:33:55.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:33:55.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:55.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:33:55.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:33:55.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:33:55.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:55.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:33:55.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:33:55.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:33:55.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:33:55.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:55.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:33:55.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:33:55.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:33:55.264 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:33:55.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:33:55.264 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:33:55.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:33:55.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:33:55.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:33:55.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:33:55.267 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:33:55.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:55.272 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:33:55.756 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:33:55.786 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:33:55.788 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:33:55.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:55.789 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:33:55.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:55.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:55.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:55.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:55.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:55.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:55.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:55.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:55.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:55.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:55.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:55.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:55.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:55.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:55.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:55.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:55.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:55.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:55.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:55.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:55.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:55.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:55.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:56.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:56.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:56.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:56.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:33:56.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:56.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:56.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:56.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:56.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:56.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:56.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:56.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:56.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:56.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:56.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:56.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:56.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:56.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:56.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:56.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:56.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:56.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:56.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:56.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:56.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:56.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:56.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:56.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:56.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:56.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:56.710 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:33:56.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:56.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:56.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:56.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:56.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:57.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:57.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:57.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:57.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:57.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:57.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:57.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:57.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:57.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:57.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:33:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:57.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:57.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:57.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:57.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:57.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:57.664 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:33:57.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:57.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:57.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:57.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:57.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:57.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:57.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:57.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:57.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:57.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:57.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:57.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:57.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:57.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:57.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:33:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:58.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:58.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:58.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:58.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:58.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:58.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:58.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:58.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:58.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:58.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:58.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:58.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:58.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:58.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:58.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:58.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:33:58.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:58.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:58.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:58.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:58.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:58.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:58.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:58.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:58.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:58.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:58.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:58.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:58.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:58.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:58.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:58.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.096 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:33:59.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:33:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:33:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:33:59.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:33:59.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:59.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:59.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:59.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:59.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:59.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:59.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:59.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:59.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:59.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:59.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:59.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:59.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:59.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.574 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:33:59.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:59.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:59.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:59.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:33:59.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:33:59.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:33:59.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:59.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:59.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:33:59.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:33:59.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:33:59.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:33:59.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:33:59.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:33:59.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:33:59.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:00.052 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:34:00.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:00.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:00.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:00.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:00.530 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:34:00.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:00.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:00.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:00.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:00.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:00.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:00.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:00.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:00.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:00.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:00.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:00.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:00.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:00.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:00.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:00.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:00.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.007 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:34:01.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:01.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:01.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:01.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:01.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:01.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:01.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:01.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:01.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:01.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:01.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:01.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:01.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:01.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.485 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:34:01.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:01.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:01.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:01.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:01.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:01.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:01.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:01.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:01.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:01.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:01.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:01.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:01.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:01.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:01.964 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:34:02.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:02.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:02.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:02.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:02.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:02.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:02.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:02.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:02.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:02.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:02.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:02.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:02.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:02.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.441 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:34:02.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:02.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:02.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:02.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:02.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:02.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:02.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:02.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:02.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:02.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:02.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:02.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:02.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:02.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:02.919 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:34:03.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:03.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:03.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:03.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.396 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:34:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:03.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:03.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:03.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:03.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:03.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:03.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:03.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:03.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:03.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:03.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:03.873 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:34:04.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:04.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:04.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:04.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:04.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:04.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:04.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:04.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:04.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:04.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:04.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:04.351 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:34:04.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:04.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:04.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:04.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:04.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:04.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:04.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:04.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:04.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:04.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:04.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:04.828 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:34:04.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:04.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:04.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:04.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:04.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:05.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:05.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:05.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:05.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:05.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:05.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:05.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:05.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:05.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:05.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:05.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:05.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:34:05.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:34:05.293 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:34:05.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:05.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:05.294 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:10.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:34:10.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:34:10.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:10.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:10.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:10.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:10.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:10.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:34:10.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:10.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:34:10.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:34:10.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:34:10.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:34:10.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:34:10.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:10.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:10.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:34:10.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:34:10.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:34:10.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:34:10.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:34:10.320 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:34:10.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:10.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:34:10.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:34:10.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:34:10.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:10.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:10.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:34:10.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:34:10.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:34:10.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:34:10.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:34:10.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:34:10.326 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:34:10.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:10.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:34:10.814 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:34:10.858 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:34:10.860 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:34:10.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:10.864 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:34:10.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:10.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:10.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:10.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:10.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:10.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:10.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:10.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:10.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:10.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:10.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:10.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:10.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:11.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:34:11.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:11.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:11.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:11.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:11.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:11.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:11.770 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:34:11.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:11.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:11.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:11.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:11.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:11.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:11.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:11.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:11.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:11.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:11.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:11.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:12.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:12.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:12.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:12.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:12.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:34:12.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:12.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:12.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:12.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:12.725 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:34:12.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:12.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:13.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:34:13.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:13.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:13.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:13.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:13.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:13.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:13.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:13.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:13.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:13.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:13.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:13.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:13.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:13.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:13.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:13.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:13.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:13.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:13.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:13.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:34:14.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:14.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:14.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:34:14.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:14.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:14.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:14.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:14.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:14.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:14.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:14.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:14.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:14.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:14.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:14.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:14.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:14.635 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:34:14.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:14.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:14.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:14.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:14.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:15.113 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:34:15.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:15.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:15.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:15.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:15.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:15.591 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:34:16.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:16.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:16.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:16.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:16.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:16.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:16.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:16.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:34:16.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:16.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:16.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:16.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:16.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:16.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:16.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:16.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:16.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:16.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:34:17.024 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:34:17.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:17.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:17.502 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:34:17.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:17.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:17.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:17.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:17.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:17.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:17.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:17.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:17.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:17.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:17.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:17.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:17.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:17.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:17.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:17.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:17.980 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:34:18.458 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:34:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:18.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:18.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:34:19.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:19.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:19.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:19.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:19.154 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1885 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:19.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:19.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:19.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:19.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:19.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:19.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:19.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:19.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:19.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:19.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:19.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:19.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:19.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:19.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:34:19.892 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:34:20.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:20.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:20.370 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:34:20.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:20.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:20.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:20.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:20.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:20.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:20.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:20.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:20.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:20.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:20.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:20.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:20.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:20.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:20.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:20.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:20.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:20.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:20.848 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:34:21.326 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:34:21.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:21.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:21.804 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:34:22.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:22.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:22.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:22.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:22.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:22.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:22.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:22.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:22.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:22.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:22.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:22.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:22.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:22.282 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:34:22.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:22.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:22.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:22.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:22.760 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:34:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:23.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:23.239 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:34:23.717 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:34:23.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:23.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:23.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:23.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:23.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:23.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:23.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:23.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:23.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:23.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:23.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:23.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:23.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:23.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:23.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:23.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:23.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:23.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:24.194 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:34:24.672 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:34:25.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:25.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:34:25.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:25.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:25.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:25.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:25.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:25.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:25.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:25.629 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:34:25.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:25.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:25.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:25.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:25.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:25.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:25.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:25.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:25.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:25.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:26.106 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:34:26.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:26.584 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:34:26.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:27.063 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:34:27.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:27.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:27.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:27.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:27.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:27.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:27.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:27.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:27.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:27.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:27.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:27.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:27.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:27.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:27.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:27.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:27.540 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:34:28.019 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:34:28.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:28.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:28.497 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:34:28.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:28.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:28.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:28.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:28.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:28.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:28.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:28.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:28.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:28.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:28.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:28.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:28.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:28.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:28.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:28.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:28.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:28.974 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:34:29.452 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:34:29.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:29.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:29.930 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:34:30.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:30.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:30.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:30.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:30.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:30.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:30.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:30.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:30.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:30.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:30.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:30.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:30.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:30.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:30.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:30.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:30.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:30.408 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:34:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:34:31.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:31.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:31.364 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:34:31.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:31.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:31.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:31.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:31.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:31.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:31.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:31.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:31.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:31.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:31.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:31.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:31.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:31.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:31.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:31.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:34:32.320 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:34:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:32.797 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:34:32.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:32.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:32.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:32.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:33.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:33.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:33.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:33.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:33.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:33.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:33.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:33.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:33.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:33.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:33.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:33.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:33.275 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:34:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:34:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:34.230 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:34:34.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:34.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:34.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:34.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:34.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:34.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:34.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:34.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:34.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:34.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:34.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:34.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:34.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:34.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:34.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:34.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:34.706 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:34:35.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:35.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:35.184 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:34:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:35.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:35.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:35.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:35.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:35.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:35.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:35.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:35.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:35.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:35.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:35.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:35.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:35.662 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:34:35.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:35.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:35.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:35.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:36.140 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:34:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:36.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:34:37.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:37.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:37.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:37.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:37.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:37.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:37.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:37.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:37.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:37.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:37.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:37.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:37.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:37.096 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:34:37.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:37.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:37.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:37.574 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:34:38.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:38.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:38.052 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:34:38.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:38.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:38.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:38.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:38.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:38.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:38.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:38.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:38.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:38.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:38.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:38.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:38.529 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:34:38.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:38.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:38.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:38.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:38.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:39.007 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:34:39.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:39.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:39.485 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:34:39.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:39.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:39.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:39.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:39.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:39.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:39.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:34:39.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:34:39.942 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:39.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:34:44.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:34:44.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:34:44.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:44.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:44.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:44.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:44.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:34:44.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:34:44.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:44.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:34:44.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:34:44.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:34:44.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:34:44.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:34:44.958 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:44.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:34:44.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:34:44.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:34:44.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:34:44.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:44.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:34:44.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:34:44.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:34:44.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:44.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:34:44.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:34:44.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:34:44.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:34:44.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:34:44.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:34:44.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:34:44.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:34:44.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:44.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:34:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:34:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:34:44.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:34:44.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:34:44.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:34:44.970 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:34:44.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:34:44.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:34:44.975 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:34:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:34:45.504 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:34:45.506 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:34:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:45.509 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:34:45.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:45.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:45.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:45.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:45.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:45.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:45.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:45.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:45.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:45.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:45.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:45.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:45.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:45.934 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:34:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:45.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:45.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:45.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:46.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:34:46.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:34:46.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:46.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:46.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:46.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:47.368 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:34:47.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:34:47.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:47.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:47.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:47.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:48.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:34:48.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:34:48.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:48.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:48.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:48.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:49.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:34:49.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:49.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:49.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:49.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:49.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:49.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:49.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:49.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:49.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:49.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:49.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:49.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:49.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:49.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:49.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:49.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:49.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:49.755 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:34:49.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:34:49.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:34:49.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:34:49.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:34:50.233 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:34:50.711 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:34:51.189 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:34:51.667 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:34:52.145 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:34:52.622 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:34:53.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:34:53.577 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:34:53.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:53.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:53.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:53.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:53.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:53.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:53.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:53.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:53.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:53.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:53.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:53.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:53.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:53.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:53.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:53.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:53.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:54.054 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:34:54.533 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:34:55.010 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:34:55.488 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:34:55.966 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:34:56.444 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:34:56.921 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:34:57.399 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:34:57.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:57.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:57.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:57.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:57.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:34:57.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:34:57.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:34:57.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:57.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:57.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:57.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:34:57.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:34:57.877 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:34:57.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:34:57.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:34:57.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:34:57.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:57.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:34:58.355 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:34:58.833 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:34:59.311 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:34:59.789 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:35:00.266 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:35:00.744 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:35:01.222 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:35:01.700 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:35:02.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:02.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:02.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:02.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:02.159 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3671 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:35:02.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:02.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:02.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:02.178 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:35:02.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:02.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:02.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:02.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:02.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:02.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:02.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:02.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:02.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:02.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:35:03.133 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:35:03.612 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:35:04.090 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:35:04.568 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:35:05.046 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:35:05.524 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:35:06.003 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:35:06.480 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:35:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:06.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:06.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:06.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:06.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:06.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:06.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:06.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:06.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:06.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:06.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:06.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:06.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:06.957 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:35:06.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:06.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:06.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:06.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:07.435 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:35:07.913 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:35:08.391 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:35:08.869 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:35:09.346 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:35:09.824 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:35:10.303 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:35:10.781 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:35:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:35:11.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:11.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:11.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:11.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:11.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:11.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:11.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:11.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:11.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:11.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:11.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:11.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:11.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:11.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:11.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:11.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:11.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:11.736 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:35:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:35:12.692 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:35:13.170 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:35:13.648 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:35:14.126 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:35:14.604 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:35:15.082 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:35:15.560 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:35:15.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:15.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:15.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:15.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:15.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:15.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:15.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:15.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:15.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:15.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:15.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:15.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:15.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:35:15.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:15.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:15.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:15.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:15.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:16.038 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:35:16.517 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:35:16.995 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:35:17.473 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:35:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:35:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:35:18.907 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:35:19.386 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:35:19.864 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:35:20.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:20.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:20.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:20.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:20.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:20.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:20.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:20.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:20.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:20.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:20.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:20.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:20.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:20.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:20.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:20.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:20.341 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:35:20.819 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:35:21.297 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:35:21.775 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:35:22.253 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:35:22.731 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:35:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:35:23.688 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:35:24.166 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:35:24.644 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:35:24.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:24.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:24.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:24.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:24.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:24.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:24.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:24.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:24.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:24.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:24.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:24.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:24.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:35:24.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:24.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:24.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:24.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:24.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:25.122 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:35:25.600 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:35:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:35:26.556 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:35:27.034 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:35:27.511 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:35:27.989 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:35:28.468 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:35:28.946 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:35:29.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:29.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:29.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:29.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:29.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:29.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:29.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:29.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:29.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:29.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:29.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:29.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:29.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:29.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:29.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:29.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:29.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:29.424 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:35:29.902 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:35:30.380 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:35:30.857 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:35:31.335 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:35:31.814 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:35:32.292 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:35:32.771 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:35:33.249 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 01:35:33.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:33.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:33.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:33.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:33.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:33.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:33.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:33.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:33.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:33.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:33.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:33.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:33.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:33.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:33.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:33.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:33.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:33.727 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 01:35:34.206 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 01:35:34.684 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 01:35:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 01:35:35.640 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 01:35:36.117 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 01:35:36.596 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 01:35:37.074 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 01:35:37.552 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 01:35:37.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:37.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:37.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:37.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:37.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:37.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:37.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:37.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:37.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:37.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:37.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:37.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:37.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:37.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:37.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:37.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:37.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:38.030 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 01:35:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 01:35:38.986 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 01:35:39.464 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 01:35:39.942 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 01:35:40.420 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 01:35:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 01:35:41.376 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 01:35:41.854 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 01:35:42.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:42.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:42.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:42.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:42.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:42.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:42.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:42.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:42.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:42.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:42.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:42.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:42.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:42.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:42.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:42.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:42.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:42.332 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 01:35:42.810 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 01:35:43.288 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 01:35:43.766 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 01:35:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 01:35:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 01:35:45.200 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 01:35:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 01:35:46.148 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 01:35:46.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:46.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:46.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:46.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:46.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:46.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:46.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:46.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:46.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:46.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:46.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:46.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:46.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:46.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:46.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:46.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:46.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:46.626 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 01:35:47.104 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 01:35:47.582 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 01:35:48.060 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 01:35:48.538 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 01:35:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 01:35:49.494 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 01:35:49.971 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 01:35:50.449 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 01:35:50.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:50.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:50.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:50.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:50.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:50.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:50.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:50.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:50.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:50.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:50.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:50.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:50.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:50.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:50.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:50.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:50.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:50.926 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 01:35:51.404 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 01:35:51.882 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 01:35:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 01:35:52.837 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 01:35:53.315 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 01:35:53.793 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 01:35:54.271 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 01:35:54.748 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 01:35:54.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:54.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:54.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:54.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:54.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:54.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:54.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:54.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:54.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:54.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:54.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:54.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:55.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:55.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:55.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:55.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:55.223 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 01:35:55.701 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 01:35:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 01:35:56.656 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 01:35:57.133 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 01:35:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 01:35:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 01:35:58.569 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 01:35:58.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:58.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:58.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:58.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:58.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:35:58.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:35:58.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:35:58.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:58.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:58.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:58.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:35:58.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:35:59.047 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 01:35:59.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:35:59.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:35:59.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:35:59.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:59.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:35:59.525 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 01:36:00.003 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 01:36:00.482 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 01:36:00.960 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 01:36:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 01:36:01.917 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 01:36:02.395 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 01:36:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 01:36:03.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:03.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:03.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:03.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:03.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:03.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:03.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:03.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:03.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:03.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:03.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:03.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:03.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:03.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:03.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:03.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:03.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:03.351 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 01:36:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 01:36:04.307 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 01:36:04.785 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 01:36:05.263 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 01:36:05.741 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 01:36:06.219 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 01:36:06.697 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 01:36:07.175 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 01:36:07.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:07.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:07.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:07.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:07.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:07.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:07.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:07.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:07.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:07.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:07.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:07.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:07.652 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 01:36:07.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:07.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:07.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:07.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:07.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:08.130 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 01:36:08.607 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 01:36:09.085 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 01:36:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 01:36:10.041 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 01:36:10.518 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 01:36:10.996 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 01:36:11.474 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 01:36:11.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:11.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:11.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:11.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:11.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:11.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:11.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:11.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:11.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:36:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:36:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:36:11.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:36:11.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:36:11.938 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:11.938 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:36:16.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:36:16.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:36:16.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:36:16.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:36:16.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:36:16.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:16.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:16.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:36:16.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:16.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:36:16.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:36:16.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:36:16.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:36:16.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:36:16.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:16.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:36:16.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:36:16.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:36:16.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:36:16.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:16.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:36:16.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:36:16.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:36:16.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:16.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:36:16.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:36:16.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:36:16.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:36:16.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:36:16.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:36:16.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:36:16.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:36:16.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:36:16.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:36:16.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:36:16.969 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:36:16.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:16.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:16.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:16.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:36:16.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:36:16.970 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:36:16.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:16.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:16.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:36:21.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:36:21.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:36:21.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:36:21.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:36:21.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:21.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:36:21.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:36:21.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:21.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:36:21.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:36:21.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:36:21.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:36:21.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:36:21.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:21.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:36:21.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:36:21.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:36:21.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:36:21.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:36:21.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:36:21.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:36:21.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:36:21.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:36:21.992 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:36:21.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:21.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:36:21.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:36:21.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:36:21.995 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:36:21.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:22.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:36:22.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:36:22.525 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:36:22.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:22.525 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:36:22.526 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:36:22.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:22.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:22.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:22.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:22.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:22.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:22.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:22.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:22.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:22.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:22.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:22.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:22.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:22.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:36:22.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:22.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:23.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:23.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:23.438 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:36:23.916 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:36:23.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:24.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:24.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:24.394 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:36:24.872 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:36:25.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:25.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:25.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:25.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:25.350 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:36:25.828 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:36:26.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:26.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:26.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:26.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:26.306 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:36:26.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:26.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:26.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:26.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:26.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:26.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:26.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:26.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:26.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:26.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:26.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:26.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:26.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:26.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:26.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:26.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:26.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:36:27.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:36:27.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:36:27.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:36:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:36:27.260 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:36:27.738 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:36:28.216 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:36:28.694 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:36:29.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:36:29.649 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:36:30.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:36:30.605 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:36:30.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:30.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:30.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:30.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:30.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:30.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:30.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:30.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:30.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:30.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:30.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:30.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:31.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:31.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:31.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:31.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:31.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:31.082 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:36:31.560 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:36:32.038 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:36:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:36:32.994 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:36:33.472 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:36:33.949 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:36:34.428 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:36:34.906 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:36:35.384 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:36:35.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:35.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:35.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:35.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:35.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:35.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:35.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:35.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:35.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:35.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:35.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:35.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:35.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:35.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:35.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:35.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:35.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:35.861 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:36:36.339 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:36:36.817 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:36:37.295 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:36:37.773 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:36:38.250 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:36:38.728 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:36:39.205 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:36:39.682 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:36:39.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:39.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:39.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:39.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:39.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:39.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:39.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:39.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:39.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:39.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:39.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:39.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:39.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:39.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:39.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:39.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:39.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:40.160 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:36:40.638 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:36:41.116 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:36:41.594 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:36:42.071 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:36:42.549 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:36:43.027 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:36:43.504 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:36:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:36:44.460 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:36:44.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:44.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:44.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:44.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:44.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:44.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:44.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:44.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:44.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:44.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:44.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:44.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:44.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:44.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:44.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:44.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:44.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:44.938 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:36:45.416 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:36:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:36:46.371 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:36:46.850 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:36:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:36:47.806 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:36:48.283 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:36:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:36:48.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:48.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:48.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:48.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:48.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:48.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:48.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:48.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:48.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:48.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:48.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:48.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:48.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:49.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:49.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:49.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:49.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:49.239 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:36:49.717 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:36:50.195 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:36:50.673 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:36:51.151 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:36:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:36:52.107 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:36:52.585 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:36:53.064 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:36:53.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:53.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:53.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:53.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:53.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:53.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:53.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:53.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:53.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:53.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:53.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:53.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:53.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:36:53.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:53.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:53.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:53.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:53.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:53.538 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:36:54.017 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:36:54.495 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:36:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:36:55.451 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:36:55.929 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:36:56.407 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:36:56.886 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:36:57.364 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:36:57.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:57.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:57.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:57.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:57.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:36:57.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:36:57.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:36:57.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:57.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:57.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:57.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:36:57.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:36:57.842 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:36:57.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:36:57.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:36:57.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:36:57.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:57.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:36:58.320 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:36:58.798 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:36:59.276 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:36:59.754 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:37:00.232 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:37:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:37:01.189 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:37:01.667 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:37:02.145 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:37:02.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:02.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:02.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:02.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:02.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:02.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:02.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:02.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:02.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:02.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:02.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:02.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:02.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:37:02.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:02.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:02.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:02.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:02.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:02.622 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:37:03.100 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:37:03.579 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:37:04.056 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:37:04.534 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:37:05.012 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:37:05.490 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:37:05.968 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:37:06.446 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:37:06.924 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:37:07.402 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:37:07.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:07.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:07.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:07.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:07.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:07.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:07.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:07.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:07.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:07.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:07.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:07.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:07.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:07.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:07.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:07.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:07.880 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:37:08.357 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:37:08.835 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:37:09.312 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:37:09.790 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:37:10.268 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 01:37:10.746 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 01:37:11.224 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 01:37:11.703 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 01:37:12.181 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 01:37:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:12.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:12.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:12.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:12.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:12.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:12.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:12.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:12.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:12.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:12.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:12.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:12.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:12.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:12.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:12.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:12.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:12.659 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 01:37:13.137 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 01:37:13.615 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 01:37:14.094 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 01:37:14.572 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 01:37:15.050 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 01:37:15.528 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 01:37:16.006 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 01:37:16.484 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 01:37:16.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:16.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:16.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:16.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:16.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:16.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:16.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:16.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:16.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:16.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:16.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:16.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:16.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:16.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:16.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:16.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:16.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:16.962 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 01:37:17.440 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 01:37:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 01:37:18.397 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 01:37:18.875 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 01:37:19.353 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 01:37:19.832 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 01:37:20.309 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 01:37:20.788 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 01:37:21.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:21.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:21.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:21.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:21.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:21.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:21.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:21.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:21.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:21.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:21.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:21.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:21.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:21.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:21.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:21.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:21.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:21.265 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 01:37:21.743 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 01:37:22.221 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 01:37:22.699 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 01:37:23.177 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 01:37:23.655 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 01:37:24.133 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 01:37:24.611 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 01:37:25.089 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 01:37:25.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:25.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:25.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:25.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:25.400 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=13533 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:25.400 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=13533 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:25.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:25.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:25.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:25.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:25.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:25.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:25.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:25.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:25.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:25.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:25.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:25.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:25.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 01:37:26.042 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 01:37:26.520 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 01:37:26.998 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 01:37:27.476 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 01:37:27.954 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 01:37:28.432 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 01:37:28.910 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 01:37:29.388 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 01:37:29.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:29.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:29.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:29.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:29.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:29.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:29.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:29.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:29.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:29.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:29.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:29.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:29.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:29.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:29.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:29.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:29.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:29.865 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 01:37:30.342 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 01:37:30.820 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 01:37:31.298 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 01:37:31.777 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 01:37:32.254 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 01:37:32.731 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 01:37:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 01:37:33.686 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 01:37:34.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:34.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:34.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:34.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:34.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:34.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:34.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:34.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:34.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:34.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:34.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:34.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:34.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:34.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:34.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:34.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:34.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:34.164 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 01:37:34.642 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 01:37:35.120 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 01:37:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 01:37:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 01:37:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 01:37:37.030 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 01:37:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 01:37:37.987 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 01:37:38.464 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 01:37:38.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:38.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:38.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:38.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:38.517 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=16333 tn=1 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:38.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:38.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:38.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:38.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:38.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:38.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:38.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:38.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:38.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:38.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:38.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:38.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:38.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:38.942 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 01:37:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 01:37:39.897 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 01:37:40.375 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 01:37:40.854 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 01:37:41.332 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 01:37:41.811 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 01:37:42.289 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 01:37:42.767 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 01:37:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:42.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:42.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:42.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:42.833 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=17254 tn=1 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:42.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:42.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:42.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:42.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:42.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:42.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:42.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:42.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:42.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:42.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:42.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:42.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:42.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:43.245 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 01:37:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 01:37:44.201 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 01:37:44.679 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 01:37:45.157 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 01:37:45.635 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 01:37:46.113 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 01:37:46.591 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 01:37:47.069 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 01:37:47.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:47.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:47.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:47.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:47.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:47.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:47.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:37:47.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:47.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:47.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:47.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:37:47.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:37:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:47.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:37:47.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:37:47.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:47.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:47.547 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 01:37:48.025 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 01:37:48.502 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 01:37:48.980 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 01:37:49.458 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 01:37:49.935 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 01:37:50.413 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 01:37:50.891 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 01:37:51.369 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-11 01:37:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:37:51.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:37:51.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:37:51.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:37:51.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:37:51.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:37:51.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:37:51.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:37:51.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:37:51.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:37:51.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:37:51.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:37:51.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:37:51.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:37:51.491 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:51.491 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19102 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:37:56.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:37:56.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:37:56.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:37:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:37:56.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:37:56.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:37:56.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:37:56.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:37:56.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:37:56.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:37:56.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:37:56.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:37:56.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:37:56.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:37:56.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:37:56.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:37:56.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:37:56.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:37:56.505 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:37:56.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:37:56.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:37:56.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:37:56.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:37:56.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:37:56.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:37:56.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:37:56.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:37:56.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:37:56.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:37:56.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:37:56.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:37:56.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:37:56.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:37:56.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:37:56.514 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:37:56.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:37:56.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:37:56.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:37:56.515 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:37:56.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:38:01.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:38:01.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:38:01.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:38:01.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:38:01.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:38:01.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:38:01.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:38:01.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:01.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:38:01.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:38:01.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:38:01.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:38:01.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:38:01.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:01.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:38:01.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:38:01.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:38:01.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:38:01.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:38:01.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:38:01.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:38:01.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:38:01.541 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:38:01.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:38:01.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:38:01.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:38:01.544 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:38:01.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:01.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:38:02.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:38:02.066 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:38:02.068 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:38:02.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:02.069 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:38:02.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:02.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:02.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:02.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:02.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:02.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:02.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:02.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:02.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:02.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:02.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:02.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:02.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:02.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:38:02.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:02.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:02.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:02.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:38:03.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:03.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:03.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:03.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:03.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:03.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:03.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:03.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:03.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:03.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:03.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:03.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:03.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:03.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:03.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:03.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:03.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:03.465 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:38:03.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:03.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:03.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:03.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:03.943 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:38:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:38:04.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:04.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:04.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:04.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:04.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:04.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:04.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:04.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:04.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:04.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:04.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:04.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:04.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:04.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:04.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:04.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:04.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:04.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:04.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:04.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:04.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:04.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:38:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:38:05.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:05.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:05.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:05.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:05.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:05.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:05.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:05.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:05.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:05.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:05.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:05.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:05.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:05.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:05.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:05.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:05.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:38:05.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:05.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:05.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:05.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:05.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:38:06.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:06.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:06.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:06.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:06.806 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:38:07.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:07.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:07.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:07.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:07.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:07.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:07.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:07.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:07.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:07.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:07.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:07.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:07.284 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:38:07.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:07.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:07.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:07.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:07.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:07.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:38:08.240 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:38:08.717 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:38:08.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:08.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:08.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:08.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:08.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:08.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:08.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:08.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:08.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:08.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:08.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:08.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:08.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:08.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:08.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:09.195 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:38:09.673 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:38:10.150 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:38:10.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:10.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:10.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:10.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:10.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:10.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:10.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:10.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:10.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:10.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:10.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:10.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:10.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:10.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:10.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:10.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:10.627 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:38:11.105 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:38:11.583 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:38:11.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:11.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:11.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:11.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:11.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:11.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:11.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:11.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:11.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:11.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:11.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:11.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:11.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:11.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:11.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:11.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:11.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:12.061 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:38:12.539 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:38:13.017 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:38:13.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:13.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:13.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:13.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:13.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:13.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:13.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:13.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:13.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:13.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:13.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:13.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:13.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:13.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:13.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:13.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:13.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:13.495 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:38:13.973 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:38:14.451 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:38:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:38:14.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:14.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:14.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:14.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:14.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:14.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:14.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:14.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:14.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:14.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:14.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:14.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:14.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:14.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:15.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:15.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:15.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:15.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:15.408 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:38:15.886 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:38:16.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:16.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:16.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:16.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:16.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:16.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:16.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:16.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:16.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:16.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:16.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:16.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:16.363 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:38:16.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:16.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:16.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:16.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:16.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:16.841 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:38:17.319 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:38:17.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:17.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:17.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:17.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:17.797 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:38:17.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:17.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:17.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:17.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:17.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:17.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:17.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:17.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:17.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:17.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:17.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:17.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:17.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:18.275 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:38:18.754 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:38:19.232 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:38:19.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:19.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:19.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:19.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:19.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:19.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:19.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:19.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:19.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:19.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:19.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:19.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:19.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:19.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:19.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:19.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:19.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:19.707 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:38:20.184 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:38:20.661 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:38:20.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:20.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:20.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:20.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:20.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:20.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:20.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:20.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:20.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:20.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:20.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:20.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:20.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:20.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:20.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:20.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:20.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:21.139 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:38:21.617 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:38:22.096 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:38:22.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:22.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:22.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:22.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:22.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:22.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:22.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:22.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:22.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:22.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:22.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:22.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:22.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:22.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:22.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:22.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:22.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:22.573 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:38:23.050 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:38:23.527 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:38:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:23.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:23.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:23.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:23.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:23.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:23.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:23.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:23.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:23.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:23.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:23.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:23.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:23.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:23.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:23.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:23.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:38:24.482 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:38:24.960 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:38:25.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:25.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:25.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:25.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:25.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:25.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:25.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:25.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:25.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:25.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:25.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:25.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:25.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:25.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:25.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:25.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:25.438 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:38:25.916 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:38:26.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:26.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:26.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:26.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:26.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:26.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:26.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:26.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:26.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:26.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:26.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:26.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:26.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:26.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:26.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:26.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:26.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:26.393 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:38:26.872 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:38:27.350 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:38:27.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:27.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:27.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:27.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:27.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:27.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:27.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:27.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:27.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:27.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:27.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:27.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:27.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:38:27.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:27.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:27.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:27.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:28.304 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:38:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:38:29.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:29.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:29.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:29.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:29.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:29.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:29.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:29.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:29.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:29.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:29.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:29.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:29.255 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:38:29.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:29.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:29.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:29.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:29.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:29.732 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:38:30.209 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:38:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:30.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:30.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:30.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:30.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:30.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:30.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:30.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:30.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:38:30.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:38:30.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:38:30.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:38:30.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:38:30.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:38:30.676 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:30.676 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:35.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:38:35.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:38:35.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:38:35.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:38:35.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:38:35.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:38:35.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:38:35.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:38:35.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:35.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:38:35.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:38:35.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:38:35.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:38:35.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:38:35.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:35.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:38:35.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:38:35.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:38:35.697 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:38:35.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:35.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:38:35.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:38:35.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:38:35.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:35.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:38:35.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:38:35.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:38:35.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:38:35.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:38:35.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:38:35.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:38:35.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:35.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:38:35.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:38:35.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:38:35.703 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:38:35.703 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:38:35.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:38:35.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:38:36.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:38:36.230 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:38:36.233 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:38:36.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:36.233 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:38:36.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:36.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:36.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:36.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:36.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:36.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:36.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:36.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:36.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:36.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:36.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:36.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:36.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:36.668 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:38:36.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:36.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:36.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:36.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:37.146 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:38:37.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:38:37.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:37.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:37.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:37.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:38.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:38:38.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:38:38.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:38.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:38.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:38.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:38:39.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:39.535 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:38:39.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:38:40.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:40.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:40.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:40.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:40.089 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:40.089 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:38:40.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:40.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:40.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:40.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:40.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:40.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:40.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:40.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:40.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:40.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:40.491 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:38:40.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:38:40.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:38:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:38:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:38:40.969 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:38:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:38:41.925 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:38:42.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:38:42.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:38:43.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:43.359 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:38:43.837 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:38:43.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:43.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:43.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:43.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:44.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:44.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:44.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:44.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:44.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:44.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:44.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:44.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:44.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:44.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:44.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:44.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:44.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:38:44.793 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:38:45.271 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:38:45.749 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:38:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:38:46.705 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:38:47.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:47.183 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:38:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:47.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:47.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:47.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:47.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:47.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:47.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:47.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:47.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:47.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:47.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:47.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:47.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:47.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:47.661 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:38:48.138 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:38:48.616 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:38:49.094 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:38:49.572 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:38:50.050 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:38:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:38:50.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:51.006 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:38:51.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:51.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:51.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:51.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:51.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:51.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:51.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:51.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:51.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:51.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:51.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:51.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:51.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:51.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:51.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:51.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:51.484 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:38:51.962 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:38:52.439 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:38:52.917 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:38:53.394 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:38:53.871 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:38:54.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:38:54.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:54.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:54.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:54.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:54.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:54.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:54.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:54.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:54.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:54.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:54.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:54.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:54.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:54.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:54.827 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:38:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:38:55.783 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:38:56.261 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:38:56.738 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:38:57.215 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:38:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:38:57.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:58.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:38:58.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:58.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:58.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:58.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:38:58.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:38:58.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:38:58.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:58.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:58.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:58.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:38:58.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:38:58.171 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:38:58.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:38:58.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:38:58.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:38:58.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:58.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:38:58.649 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:38:59.126 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:38:59.604 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:39:00.082 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:39:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:39:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:39:01.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:01.516 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:39:01.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:01.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:01.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:01.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:01.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:01.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:01.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:01.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:01.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:01.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:01.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:01.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:01.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:01.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:01.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:01.993 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:39:02.471 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:39:02.948 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:39:03.425 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:39:03.904 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:39:04.382 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:39:04.860 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:39:04.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:05.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:05.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:05.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:05.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:05.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:05.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:05.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:05.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:05.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:39:05.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:39:05.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:39:05.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:39:05.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:39:05.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:39:05.269 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:05.269 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:10.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:39:10.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:39:10.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:39:10.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:39:10.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:39:10.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:39:10.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:39:10.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:39:10.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:39:10.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:39:10.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:39:10.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:39:10.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:39:10.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:39:10.288 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:39:10.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:39:10.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:39:10.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:39:10.289 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:39:10.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:39:10.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:39:10.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:39:10.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:39:10.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:39:10.295 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:39:10.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:39:10.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:39:10.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:39:10.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:39:10.299 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:39:10.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:39:10.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:39:10.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:39:10.828 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:39:10.831 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:39:10.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:10.833 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:39:10.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:10.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:10.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:10.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:10.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:10.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:10.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:10.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:10.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:10.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:10.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:10.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:11.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:39:11.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:11.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:11.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:11.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:11.743 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:39:12.221 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:39:12.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:12.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:12.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:12.699 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:39:13.177 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:39:13.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:13.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:13.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:13.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:13.655 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:39:13.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:14.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:39:14.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:14.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:14.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:14.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:14.610 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:39:14.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:14.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:14.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:14.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:14.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:14.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:14.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:14.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:14.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:14.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:14.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:14.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:14.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:14.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:14.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:15.088 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:39:15.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:15.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:15.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:15.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:15.566 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:39:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:39:16.523 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:39:17.001 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:39:17.479 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:39:17.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:17.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:39:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:39:18.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:18.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:18.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:18.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:18.585 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:18.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:18.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:18.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:18.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:18.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:18.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:18.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:18.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:18.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:18.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:18.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:18.913 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:39:19.390 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:39:19.868 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:39:20.346 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:39:20.824 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:39:21.302 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:39:21.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:21.779 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:39:22.257 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:39:22.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:22.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:22.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:22.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:22.481 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:22.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:22.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:22.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:22.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:22.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:22.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:22.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:22.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:22.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:22.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:22.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:22.736 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:39:22.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:23.213 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:39:23.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:23.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:23.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:23.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:23.455 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=2808 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:23.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:23.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:23.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:23.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:23.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:23.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:23.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:23.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:23.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:23.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:23.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:23.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:23.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:23.691 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:39:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:39:24.647 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:39:25.125 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:39:25.603 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:39:26.081 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:39:26.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:26.560 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:39:27.037 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:39:27.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:27.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:27.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:27.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:27.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:27.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:27.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:27.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:27.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:27.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:27.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:27.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:27.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:27.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:27.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:27.516 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:39:27.994 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:39:28.472 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:39:28.951 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:39:29.429 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:39:29.907 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:39:30.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:30.384 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:39:30.862 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:39:31.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:31.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:31.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:31.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:31.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:31.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:31.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:31.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:31.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:31.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:31.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:31.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:31.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:31.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:31.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:31.340 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:39:31.818 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:39:32.297 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:39:32.775 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:39:33.253 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:39:33.731 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:39:34.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:39:34.687 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:39:34.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:34.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:34.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:34.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:34.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:34.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:34.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:34.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:34.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:34.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:34.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:34.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:34.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:34.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:34.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:35.166 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:39:35.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:35.644 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:39:35.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:35.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:35.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:35.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:35.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:35.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:35.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:35.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:35.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:35.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:35.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:35.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:35.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:35.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:35.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:35.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:35.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:36.121 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:39:36.599 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:39:37.077 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:39:37.554 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:39:38.032 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:39:38.510 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:39:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:38.988 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:39.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:39.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:39.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:39.428 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=6217 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:39.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:39.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:39.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:39.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:39.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:39.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:39.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:39.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:39.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:39.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:39.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:39.466 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:39:39.943 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:39:40.421 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:39:40.899 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:39:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:39:41.854 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:39:42.332 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:39:42.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:42.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:42.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:42.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:42.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:42.772 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=6931 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:42.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:42.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:42.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:42.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:42.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:42.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:42.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:42.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:42.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:42.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:42.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:42.810 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:39:43.288 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:39:43.766 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:39:44.243 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:39:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:39:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:39:45.677 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:39:45.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:46.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:46.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:46.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:46.117 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=7645 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:46.117 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=7645 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:46.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:46.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:46.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:46.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:46.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:46.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:46.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:46.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:46.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:46.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:46.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:39:46.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:46.633 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:39:47.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:47.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:47.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:47.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:47.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:47.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:47.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:47.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:47.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:47.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:47.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:47.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:47.110 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:39:47.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:47.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:47.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:47.582 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:39:48.060 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:39:48.538 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:39:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:39:49.493 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:39:49.971 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:39:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:50.449 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:39:50.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:50.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:50.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:50.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:50.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:50.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:50.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:50.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:50.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:50.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:50.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:50.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:50.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:50.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:50.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:50.928 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:39:51.406 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:39:51.884 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:39:52.361 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:39:52.839 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:39:53.316 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:39:53.794 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:39:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:54.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:54.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:54.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:54.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:54.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:54.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:54.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:54.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:54.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:54.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:54.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:54.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:54.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:54.272 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:39:54.750 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:39:55.229 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:39:55.707 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:39:56.185 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:39:56.663 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:39:57.141 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:39:57.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:57.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:57.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:57.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:57.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:39:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:57.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:57.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:57.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:39:57.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:39:57.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:39:57.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:39:57.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:39:57.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:57.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:57.619 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:39:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:39:58.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:39:58.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:39:58.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:39:58.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:39:58.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:39:58.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:39:58.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:39:58.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:39:58.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:39:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:39:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:39:58.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:39:58.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:39:58.507 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:39:58.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:39:58.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:03.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:03.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:03.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:03.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:03.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:03.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:03.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:03.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:03.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:03.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:03.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:40:03.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:40:03.528 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:40:03.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:03.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:03.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:03.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:40:03.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:03.529 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:40:03.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:03.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:40:03.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:40:03.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:03.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:03.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:03.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:40:03.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:03.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:40:03.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:03.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:40:03.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:40:03.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:03.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:03.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:03.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:40:03.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:03.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:40:03.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:40:03.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:40:03.539 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:40:03.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:03.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:40:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:40:04.069 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:04.071 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:40:04.073 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:40:04.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:40:04.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:04.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:04.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:40:04.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:40:04.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:40:04.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:40:04.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:40:04.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:40:04.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:40:04.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:04.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:04.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:04.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:40:05.446 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:40:05.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:05.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:05.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:05.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:05.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:40:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:40:06.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:06.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:06.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:06.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:06.872 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:40:07.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:40:07.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:07.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:07.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:07.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:07.816 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:40:08.286 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:40:08.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:08.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:08.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:40:09.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:40:09.703 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:40:10.174 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:40:10.645 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:40:11.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:40:11.587 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:40:12.057 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:40:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:40:12.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:12.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:12.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:12.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:12.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:12.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:12.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:12.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:12.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:12.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:12.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:12.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:12.877 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:12.877 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:17.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:17.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:17.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:17.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:17.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:17.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:17.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:17.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:40:17.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:40:17.896 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:40:17.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:17.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:17.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:17.897 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:40:17.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:17.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:40:17.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:17.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:40:17.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:17.898 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:40:17.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:17.900 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:17.900 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:40:17.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:40:17.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:40:17.902 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:40:17.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:17.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:40:18.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:40:18.422 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:18.423 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:40:18.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:40:18.424 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:40:18.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:18.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:40:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:40:18.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:40:18.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:40:18.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:40:18.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:40:18.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:40:18.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:18.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:18.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:19.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:40:19.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:40:19.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:19.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:19.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:19.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:20.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:40:20.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:40:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:20.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:20.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:21.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:40:21.713 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:40:21.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:21.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:21.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:21.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:22.184 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:40:22.654 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:40:22.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:22.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:22.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:22.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:23.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:40:23.596 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:40:24.067 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:40:24.538 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:40:25.008 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:40:25.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:40:25.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:40:26.433 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:40:26.905 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:40:27.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:27.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:27.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:27.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:27.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:27.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:27.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:27.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:27.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:27.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:27.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:27.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:27.246 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:27.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:40:32.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:32.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:32.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:32.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:32.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:32.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:32.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:32.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:32.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:32.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:32.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:32.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:40:32.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:32.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:40:32.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:32.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:40:32.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:40:32.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:32.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:32.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:32.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:40:32.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:32.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:40:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:32.271 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:40:32.271 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:40:32.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:32.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:32.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:32.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:40:32.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:32.272 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:40:32.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:40:32.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:40:32.276 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:40:32.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:32.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:40:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:40:32.797 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:32.798 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:40:32.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:40:32.800 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:40:32.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:32.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:32.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:40:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:40:33.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:33.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:33.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:33.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:33.722 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:40:33.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:40:33.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:40:33.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:40:33.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:40:33.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:40:34.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:40:34.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:34.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:34.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:34.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:34.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:40:35.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:40:35.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:35.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:35.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:35.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:35.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:40:36.090 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:40:36.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:36.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:36.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:36.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:36.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:40:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:40:37.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:37.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:37.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:37.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:37.502 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:40:37.977 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:40:38.449 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:40:38.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:40:39.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:40:39.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:40:40.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:40:40.804 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:40:41.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:40:41.757 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:40:42.235 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:40:42.712 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:40:43.189 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:40:43.666 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:40:44.144 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:40:44.622 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:40:45.099 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:40:45.577 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:40:45.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:45.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:45.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:45.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:45.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:45.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:45.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:45.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:45.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:45.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:45.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:45.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:45.626 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:40:50.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:40:50.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:40:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:50.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:50.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:40:50.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:50.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:50.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:40:50.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:40:50.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:40:50.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:40:50.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:50.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:50.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:40:50.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:40:50.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:40:50.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:40:50.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:50.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:40:50.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:40:50.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:40:50.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:50.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:40:50.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:40:50.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:40:50.659 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:40:50.659 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:40:50.659 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:40:50.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:40:51.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:40:51.181 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:51.182 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:40:51.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:40:51.184 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:40:51.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:40:51.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:40:51.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:40:51.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:40:51.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:40:51.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:40:51.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:40:51.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:40:51.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:40:51.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:51.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:51.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:51.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:52.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:40:52.191 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:52.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:40:52.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:52.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:52.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:52.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:52.698 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:53.058 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:40:53.205 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:53.535 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:40:53.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:53.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:53.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:53.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:54.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:40:54.491 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:40:54.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:54.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:54.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:54.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:54.968 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:40:55.244 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:55.446 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:40:55.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:40:55.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:40:55.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:40:55.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:40:55.752 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:55.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:40:56.259 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:56.401 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:40:56.765 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:56.879 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:40:57.357 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:40:57.835 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:40:58.312 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:40:58.774 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:40:58.790 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:40:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:40:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:41:00.223 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:41:00.701 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:41:00.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:00.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:00.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:00.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:00.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:00.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:00.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:00.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:00.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:00.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:00.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:00.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:00.789 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:05.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:05.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:05.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:05.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:05.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:05.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:05.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:05.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:05.799 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:05.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:05.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:05.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:05.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:05.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:05.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:05.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:05.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:05.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:05.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:05.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:05.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:05.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:05.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:05.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:05.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:05.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:05.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:05.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:05.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:05.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:05.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:05.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:05.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:05.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:05.807 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:05.807 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:05.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:05.812 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:41:06.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:41:06.328 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:41:06.329 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:41:06.330 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:41:06.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:06.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:06.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:06.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:06.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:06.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:06.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:06.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:06.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:06.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:06.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:06.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:06.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:06.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:06.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:06.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:06.773 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:41:06.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:06.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:06.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:06.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:06.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:06.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:06.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:06.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:06.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:06.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.249 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:41:07.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:07.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.721 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:41:07.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:07.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:07.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:07.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:07.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:07.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:07.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:07.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:07.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:07.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:07.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:07.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:07.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:07.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:07.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:08.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:08.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:08.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:08.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.199 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:41:08.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:08.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:08.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:08.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:08.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.560 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=590 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:08.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:08.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:08.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:08.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:08.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.676 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:41:08.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:08.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:08.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:08.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:08.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:08.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:08.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:08.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:08.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:08.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:08.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:08.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:08.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:08.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:08.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:09.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:09.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:09.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:09.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:09.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:09.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:09.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:09.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:09.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:09.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:09.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.153 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:41:09.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:09.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:09.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:09.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:09.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:09.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:09.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:09.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:09.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:09.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:09.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:09.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:09.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:09.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:09.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:09.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:09.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:09.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:09.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:09.594 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:09.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=811 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:09.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=811 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:09.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=811 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:09.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=811 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:09.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=811 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:14.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:14.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:14.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:14.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:14.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:14.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:14.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:14.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:14.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:14.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:14.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:14.612 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:14.612 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:14.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:14.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:14.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:14.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:14.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:14.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:14.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:14.615 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:14.615 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:14.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:14.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:14.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:14.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:14.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:14.616 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:14.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:14.618 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:14.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:14.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:14.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:14.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:14.622 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:14.622 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:14.622 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:14.627 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:41:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:41:15.155 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:41:15.158 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:41:15.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:15.159 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:41:15.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:15.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:15.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:15.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:15.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:15.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:15.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:15.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:15.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 01:41:15.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:15.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:15.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:15.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:15.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:15.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:41:15.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:15.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:15.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:15.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:16.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:41:16.543 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:41:16.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:16.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:16.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:16.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:17.021 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:41:17.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:17.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:17.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:17.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:17.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:17.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:17.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:17.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:17.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:17.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:22.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:22.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:22.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:22.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:22.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:22.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:22.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:22.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:22.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:22.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:22.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:22.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:22.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:22.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:22.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:22.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:22.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:22.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:22.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:22.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:22.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:22.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:22.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:22.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:22.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:22.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:22.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:22.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:22.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:22.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:22.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:22.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:22.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:22.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:22.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:22.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:22.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:22.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:22.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:22.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:22.306 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:22.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:22.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:22.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:22.308 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:27.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:27.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:27.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:27.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:27.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:27.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:27.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:27.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:27.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:27.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:27.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:27.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:27.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:27.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:27.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:27.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:27.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:27.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:27.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:27.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:27.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:27.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:27.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:27.336 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:27.337 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:27.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:27.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:27.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:27.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:27.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:27.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:27.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:27.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:27.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:27.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:27.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:27.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:27.343 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:27.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:27.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:41:27.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:41:27.880 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:41:27.882 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:41:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:27.884 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:41:28.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:41:28.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:28.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:28.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:28.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:28.787 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:41:29.265 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:41:29.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:29.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:29.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:29.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:29.746 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:41:30.225 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:41:30.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:30.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:30.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:30.705 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:41:31.186 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:41:31.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:31.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:31.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:31.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:41:32.149 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:41:32.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:32.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:32.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:32.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:32.629 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:41:33.110 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:41:33.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:33.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:33.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:33.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:33.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:33.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:33.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:33.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:33.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:33.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:33.367 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:33.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:38.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:38.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:38.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:38.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:38.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:38.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:38.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:38.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:38.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:38.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:38.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:38.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:38.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:38.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:38.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:38.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:38.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:38.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:38.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:38.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:38.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:38.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:38.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:38.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:38.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:38.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:38.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:38.384 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:38.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:38.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:41:38.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:41:38.916 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:41:38.918 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:41:38.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:38.921 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:41:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:41:39.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:39.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:39.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:39.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:39.827 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:41:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:41:40.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:40.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:40.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:40.768 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:41:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:41:41.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:41.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:41.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:41.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:41.728 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:41:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:41:42.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:42.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:42.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:42.687 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:41:43.168 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:41:43.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:43.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:43.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:43.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:43.648 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:41:43.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:43.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:43.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:43.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:43.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:43.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:43.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:43.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:43.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:43.936 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:43.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1185 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:43.937 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1186 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:41:48.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:48.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:48.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:48.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:48.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:48.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:48.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:48.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:48.946 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:48.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:48.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:48.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:48.950 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:48.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:48.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:48.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:48.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:48.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:48.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:48.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:48.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:48.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:48.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:48.953 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:48.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:48.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:48.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:48.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:48.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:48.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:48.956 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:48.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:48.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:48.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:48.960 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:48.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:48.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:48.962 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:41:48.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:53.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:41:53.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:41:53.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:53.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:53.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:53.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:53.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:41:53.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:53.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:53.979 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:41:53.979 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:41:53.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:41:53.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:41:53.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:53.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:53.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:41:53.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:41:53.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:41:53.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:41:53.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:53.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:41:53.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:41:53.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:53.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:41:53.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:41:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:53.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:41:53.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:41:53.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:41:53.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:41:53.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:41:53.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:41:53.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:41:53.991 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:41:53.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:41:53.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:41:54.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:41:54.522 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:41:54.523 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:41:54.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:41:54.524 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:41:54.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:41:54.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:41:54.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:41:54.959 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:41:54.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:54.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:54.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:54.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:55.438 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:41:55.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:41:55.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:41:55.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:41:55.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:41:55.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:41:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:41:55.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:55.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:55.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:56.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:41:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:41:56.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:56.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:56.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:57.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:57.328 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:41:57.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:41:57.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:57.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:57.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:58.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:58.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:41:58.751 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:41:58.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:41:58.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:41:58.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:41:59.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:41:59.229 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:41:59.707 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:42:00.180 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:42:00.658 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:42:01.136 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:42:01.608 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:42:02.078 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:42:02.556 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:42:03.034 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:42:03.510 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:42:03.982 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:42:04.457 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:42:04.935 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:42:05.413 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:42:05.890 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:42:06.368 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:42:06.845 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:42:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:42:07.801 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:42:08.279 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:42:08.755 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:42:09.232 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:42:09.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:09.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:09.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:09.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:09.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:09.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:09.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:09.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:09.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:09.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:09.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:09.369 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:42:09.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:14.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:14.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:14.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:14.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:14.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:14.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:14.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:14.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:14.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:14.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:14.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:14.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:14.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:42:14.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:14.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:14.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:42:14.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:14.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:14.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:42:14.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:42:14.382 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:42:14.382 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:42:14.382 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:14.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:42:14.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:42:14.907 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:14.909 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:14.910 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:42:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:14.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:14.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:14.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:42:14.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:14.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:14.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:14.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:42:14.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:42:14.963 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:14.967 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:14.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:14.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:14.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:14.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:14.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:15.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:42:15.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:15.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:15.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:15.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:15.826 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:42:16.304 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:42:16.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:16.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:16.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:16.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:42:17.260 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:42:17.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:17.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:17.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:17.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:17.738 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:42:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:42:18.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:42:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:42:19.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:19.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:42:20.127 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:42:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:42:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:42:21.561 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:42:22.039 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:42:22.517 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:42:22.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:22.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:22.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:22.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:42:22.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:22.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:22.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:22.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:23.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:23.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:23.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:23.002 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:42:23.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:28.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:28.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:28.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:28.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:28.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:28.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:28.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:28.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:28.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:28.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:28.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:42:28.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:42:28.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:42:28.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:28.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:28.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:28.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:42:28.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:28.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:42:28.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:28.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:28.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:28.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:42:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:28.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:28.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:28.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:42:28.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:28.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:42:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:42:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:42:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:42:28.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:42:28.021 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:42:28.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:28.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:42:28.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:42:28.553 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:28.555 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:28.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:28.557 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:42:28.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:28.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:28.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:42:28.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:28.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:28.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:28.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:42:28.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:42:28.600 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:28.604 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:28.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:28.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:28.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:28.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:28.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:28.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:42:29.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:29.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:29.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:29.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:42:29.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:42:30.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:30.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:30.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:42:30.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:42:31.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:31.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:31.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:31.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:42:31.853 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:42:32.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:32.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:32.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:32.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:32.330 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:42:32.808 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:42:33.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:33.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:33.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:33.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:33.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:42:33.764 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:42:34.241 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:42:34.719 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:42:35.197 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:42:35.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:42:36.153 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:42:36.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:36.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:36.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:36.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:36.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:42:36.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:36.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:36.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:36.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:36.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:36.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:36.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:36.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:36.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:36.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:36.635 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:36.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:41.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:41.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:41.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:41.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:41.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:41.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:41.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:41.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:41.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:41.651 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:42:41.651 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:42:41.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:42:41.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:42:41.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:41.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:41.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:41.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:42:41.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:42:41.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:42:41.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:41.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:42:41.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:42:41.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:41.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:41.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:41.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:42:41.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:42:41.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:42:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:41.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:42:41.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:42:41.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:42:41.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:42:41.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:42:41.664 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:42:41.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:42:41.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:42:42.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:42:42.184 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:42.186 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:42.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:42.187 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:42:42.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:42.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:42.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:42:42.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:42.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:42.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:42.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:42:42.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:42:42.245 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:42.250 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:42.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:42.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:42:42.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:42.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:42.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:42.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:43.108 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:42:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:42:43.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:43.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:43.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:43.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:44.064 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:42:44.541 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:42:44.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:44.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:44.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:44.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:42:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:42:45.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:45.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:45.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:45.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:45.976 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:42:46.454 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:42:46.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:46.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:46.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:46.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:46.932 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:42:47.410 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:42:47.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:42:48.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:42:48.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:42:49.322 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:42:49.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:42:50.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:50.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:50.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:50.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:50.278 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:42:50.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:50.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:50.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:42:50.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:50.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:50.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:50.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:42:50.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:42:50.324 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:42:50.327 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:42:50.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:50.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:42:50.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:42:50.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:50.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:42:51.234 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:42:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:42:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:42:52.668 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:42:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:42:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:42:54.102 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:42:54.580 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:42:55.058 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:42:55.537 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:42:56.015 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:42:56.493 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:42:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:42:57.449 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:42:57.927 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:42:58.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:42:58.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:42:58.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:42:58.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:42:58.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:42:58.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:42:58.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:42:58.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:42:58.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:42:58.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:42:58.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:42:58.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:42:58.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:42:58.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:42:58.354 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:42:58.354 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:03.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:43:03.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:43:03.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:03.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:03.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:03.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:03.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:03.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:03.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:03.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:03.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:43:03.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:43:03.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:43:03.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:03.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:03.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:03.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:43:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:03.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:43:03.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:03.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:43:03.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:43:03.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:03.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:03.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:03.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:43:03.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:03.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:43:03.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:03.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:43:03.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:43:03.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:03.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:03.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:03.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:43:03.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:03.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:43:03.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:43:03.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:43:03.388 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:43:03.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:43:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:43:03.905 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:03.906 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:03.907 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:43:03.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:03.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:03.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:03.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:03.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:03.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:03.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:03.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:03.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:03.968 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:03.970 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:03.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:03.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:03.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:03.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:03.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:04.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:43:04.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:04.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:04.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:04.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:43:05.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:43:05.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:05.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:05.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:05.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:43:06.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:43:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:06.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:06.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:06.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:06.744 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:43:07.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:43:07.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:07.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:07.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:07.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:07.700 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:43:08.179 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:43:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:08.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:08.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:08.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:08.653 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:43:09.131 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:43:09.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:43:10.087 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:43:10.566 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:43:11.044 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:43:11.522 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:43:11.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:11.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:11.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:11.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:12.000 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:43:12.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:12.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:12.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:12.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:12.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:12.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:12.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:12.046 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:12.049 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:12.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:12.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:12.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:12.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:12.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:12.477 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:43:12.956 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:43:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:43:13.912 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:43:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:43:14.869 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:43:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:43:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:43:16.303 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:43:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:43:17.259 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:43:17.737 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:43:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:43:18.693 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:43:19.171 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:43:19.649 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:43:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:20.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:20.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:20.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:20.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:20.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:20.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:20.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:20.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:20.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:43:20.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:43:20.080 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:20.080 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:25.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:43:25.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:43:25.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:25.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:25.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:25.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:25.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:25.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:25.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:25.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:25.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:43:25.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:43:25.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:43:25.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:25.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:25.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:25.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:43:25.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:25.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:43:25.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:25.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:25.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:25.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:43:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:25.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:25.106 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:43:25.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:43:25.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:43:25.110 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:43:25.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:25.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:43:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:43:25.632 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:25.633 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:25.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:25.634 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:43:25.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:25.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:25.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:25.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:25.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:25.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:25.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:25.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:25.693 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:25.698 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:25.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:25.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:25.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:25.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:25.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:26.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:43:26.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:26.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:26.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:26.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:26.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:43:27.032 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:43:27.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:27.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:27.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:27.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:27.510 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:43:27.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:43:28.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:28.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:28.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:28.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:28.466 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:43:28.944 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:43:29.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:29.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:29.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:29.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:43:29.900 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:43:30.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:30.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:30.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:30.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:30.378 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:43:30.856 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:43:31.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:43:31.812 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:43:32.290 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:43:32.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:43:33.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:43:33.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:33.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:33.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:33.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:33.724 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:43:33.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:33.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:33.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:33.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:33.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:33.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:33.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:33.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:33.770 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:33.774 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:33.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:33.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:33.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:33.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:33.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:34.201 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:43:34.679 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:43:35.157 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:43:35.635 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:43:36.113 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:43:36.591 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:43:37.068 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:43:37.547 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:43:38.025 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:43:38.502 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:43:38.980 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:43:39.458 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:43:39.937 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:43:40.415 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:43:40.894 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:43:41.372 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:43:41.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:41.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:41.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:41.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:41.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:41.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:41.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:41.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:41.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:41.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:41.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:41.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:41.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:43:41.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:43:41.808 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:41.808 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:43:46.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:43:46.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:43:46.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:46.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:46.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:46.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:46.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:43:46.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:46.815 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:46.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:43:46.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:43:46.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:43:46.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:43:46.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:46.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:46.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:43:46.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:43:46.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:43:46.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:43:46.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:46.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:43:46.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:43:46.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:46.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:46.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:43:46.820 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:43:46.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:43:46.820 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:43:46.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:46.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:43:46.821 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:43:46.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:46.821 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:43:46.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:43:46.821 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:43:46.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:43:46.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:43:46.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.824 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:43:46.824 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:43:46.824 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:43:46.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:43:46.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:43:47.313 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:43:47.345 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:47.346 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:47.348 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:43:47.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:47.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:47.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:47.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:47.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:47.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:47.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:47.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:47.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:47.405 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:47.410 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:47.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:47.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:47.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:47.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:47.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:47.790 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:43:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:47.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:47.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:48.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:43:48.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:43:48.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:48.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:48.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:49.225 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:43:49.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:43:49.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:49.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:49.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:50.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:43:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:43:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:50.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:50.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:51.137 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:43:51.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:43:51.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:43:51.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:43:51.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:43:51.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:43:52.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:43:52.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:43:53.047 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:43:53.525 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:43:54.003 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:43:54.481 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:43:54.958 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:43:55.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:55.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:55.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:55.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:55.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:43:55.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:43:55.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:43:55.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:43:55.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:55.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:55.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:55.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:43:55.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:43:55.482 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:43:55.486 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:43:55.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:43:55.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:43:55.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:43:55.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:55.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:43:55.914 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:43:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:43:56.869 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:43:57.346 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:43:57.824 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:43:58.302 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:43:58.781 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:43:59.258 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:43:59.736 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:44:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:44:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:44:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:44:01.638 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:44:02.116 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:44:02.594 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:44:03.072 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:44:03.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:03.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:03.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:03.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:03.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:03.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:03.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:03.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:03.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:03.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:03.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:03.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:03.541 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:03.544 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:03.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:03.549 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:44:03.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:03.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:03.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:03.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:44:04.503 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:44:04.981 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:44:05.453 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:44:05.930 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:44:06.408 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:44:06.886 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:44:07.364 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:44:07.842 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:44:08.320 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:44:08.798 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:44:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:44:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:44:10.231 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:44:10.710 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:44:11.188 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:44:11.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:11.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:11.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:11.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:11.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:11.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:11.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:11.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:11.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:11.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:11.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:11.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:11.607 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:11.610 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:11.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:11.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:11.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:11.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:11.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:11.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:11.665 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:44:12.143 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:44:12.621 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:44:13.099 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:44:13.577 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:44:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:44:14.533 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:44:15.011 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:44:15.488 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:44:15.966 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:44:16.444 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:44:16.922 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:44:17.400 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:44:17.878 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:44:18.356 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:44:18.834 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:44:19.311 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:44:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:19.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:19.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:19.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:19.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:19.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:19.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:19.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:19.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:19.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:19.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:44:19.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:44:19.636 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:44:19.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:19.637 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.637 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.637 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.637 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.637 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:19.638 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:24.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:44:24.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:44:24.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:24.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:24.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:24.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:24.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:24.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:44:24.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:24.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:44:24.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:44:24.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:44:24.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:44:24.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:44:24.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:24.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:24.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:44:24.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:44:24.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:44:24.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:24.649 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:44:24.649 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:44:24.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:44:24.649 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:24.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:44:24.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:44:24.650 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:44:24.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:24.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:44:24.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:44:24.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:44:24.651 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:24.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:24.652 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:44:24.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:44:24.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:44:24.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:24.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:44:24.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:44:24.655 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:44:24.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:24.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:44:25.143 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:44:25.175 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:25.176 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:25.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:25.176 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:44:25.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:25.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:25.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:25.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:25.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:25.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:25.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:25.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:25.235 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:25.238 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:25.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:25.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:25.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:25.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:44:25.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:25.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:25.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:25.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:26.097 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:44:26.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:44:26.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:26.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:26.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:26.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:27.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:44:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:44:27.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:27.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:27.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:27.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:28.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:44:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:44:28.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:28.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:28.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:28.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:28.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:44:29.443 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:44:29.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:29.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:29.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:29.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:44:30.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:44:30.877 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:44:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:44:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:44:32.311 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:44:32.789 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:44:33.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:33.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:33.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:33.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:33.267 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:44:33.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:33.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:33.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:33.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:33.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:33.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:33.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:33.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:33.312 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:33.316 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:33.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:33.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:33.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:33.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:33.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:33.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:44:34.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:44:34.699 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:44:35.177 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:44:35.655 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:44:36.134 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:44:36.612 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:44:37.090 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:44:37.567 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:44:38.046 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:44:38.524 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:44:39.001 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:44:39.480 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:44:39.957 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:44:40.435 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:44:40.914 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:44:41.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:41.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:41.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:41.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:41.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:41.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:41.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:41.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:41.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:41.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:41.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:41.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:41.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:44:41.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:44:41.348 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:41.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:44:46.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:44:46.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:44:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:46.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:46.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:46.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:46.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:44:46.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:44:46.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:46.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:44:46.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:44:46.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:44:46.361 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:44:46.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:44:46.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:46.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:44:46.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:44:46.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:44:46.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:44:46.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:46.365 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:44:46.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:44:46.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:44:46.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:46.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:44:46.366 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:44:46.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:44:46.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:44:46.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:46.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:44:46.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:44:46.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:44:46.370 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:44:46.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:44:46.370 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:44:46.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:44:46.370 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:44:46.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:46.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:44:46.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:44:46.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:44:46.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:44:46.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:44:46.376 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:44:46.376 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:44:46.376 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:44:46.381 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:44:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:44:46.910 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:46.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:46.913 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:46.915 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:44:46.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:46.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:46.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:46.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:46.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:46.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:46.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:46.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:47.003 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:47.006 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:47.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:47.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:47.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:47.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:47.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:44:47.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:47.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:47.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:47.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:47.819 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:44:48.298 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:44:48.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:48.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:48.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:48.775 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:44:49.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:44:49.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:49.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:49.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:49.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:49.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:44:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:44:50.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:50.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:50.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:50.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:50.687 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:44:51.164 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:44:51.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:44:51.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:44:51.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:44:51.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:44:51.642 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:44:52.120 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:44:52.598 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:44:53.076 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:44:53.549 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:44:54.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:44:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:44:54.983 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:44:55.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:55.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:55.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:55.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:55.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:44:55.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:44:55.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:44:55.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:55.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:55.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:55.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:44:55.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:44:55.077 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:44:55.082 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:44:55.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:44:55.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:44:55.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:44:55.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:55.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:44:55.461 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:44:55.938 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:44:56.416 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:44:56.894 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:44:57.371 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:44:57.849 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:44:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:44:58.805 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:44:59.283 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:44:59.760 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:45:00.238 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:45:00.715 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:45:01.193 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:45:01.671 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:45:02.149 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:45:02.626 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:45:03.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:03.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:03.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:03.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:03.104 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:45:03.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:03.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:03.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:03.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:03.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:03.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:03.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:03.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:03.152 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:03.153 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:03.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:03.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:03.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:03.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:03.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:03.582 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:45:04.059 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:45:04.537 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:45:05.015 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:45:05.492 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:45:05.970 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:45:06.448 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:45:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:45:07.403 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:45:07.881 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:45:08.358 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:45:08.830 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:45:09.308 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:45:09.786 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:45:10.264 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:45:10.742 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:45:11.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:11.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:11.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:11.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:11.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:11.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:11.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:11.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:11.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:11.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:11.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:11.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:11.212 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:11.216 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:11.219 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:11.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:11.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:11.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:11.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:11.697 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:45:12.174 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:45:12.652 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:45:13.130 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:45:13.608 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:45:14.085 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:45:14.563 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:45:15.041 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:45:15.518 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:45:15.996 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:45:16.474 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:45:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:45:17.430 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:45:17.907 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:45:18.385 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:45:18.862 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:45:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:19.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:19.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:19.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:19.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:19.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:19.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:45:19.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:45:19.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:45:19.239 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:45:24.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:45:24.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:45:24.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:45:24.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:45:24.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:45:24.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:45:24.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:45:24.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:45:24.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:45:24.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:45:24.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:45:24.260 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:45:24.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:45:24.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:45:24.261 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:45:24.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:45:24.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:45:24.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:45:24.262 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:45:24.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:45:24.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:45:24.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:45:24.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:45:24.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:45:24.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:45:24.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:45:24.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:45:24.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:45:24.271 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:45:24.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:45:24.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:45:24.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:45:24.805 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:24.807 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:24.809 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:45:24.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:24.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:24.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:24.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:24.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:24.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:24.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:24.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:24.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:24.850 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:24.854 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:24.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:24.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:24.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:24.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:24.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:25.235 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:45:25.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:25.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:25.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:25.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:25.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:45:26.189 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:45:26.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:26.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:26.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:26.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:26.667 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:45:27.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:45:27.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:27.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:27.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:27.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:27.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:45:28.088 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:45:28.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:28.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:28.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:28.566 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:45:29.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:45:29.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:45:29.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:45:29.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:45:29.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:45:29.522 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:45:30.000 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:45:30.478 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:45:30.950 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:45:31.425 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:45:31.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:45:32.381 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:45:32.858 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:45:32.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:32.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:32.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:32.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:32.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:32.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:32.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:32.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:32.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:32.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:32.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:32.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:32.901 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:32.903 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:32.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:32.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:32.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:32.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:32.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:33.333 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:45:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:45:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:45:34.767 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:45:35.245 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:45:35.723 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:45:36.201 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:45:36.679 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:45:37.157 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:45:37.634 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:45:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:45:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:45:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:45:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:45:40.017 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:45:40.495 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:45:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:40.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:40.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:40.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:40.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:40.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:40.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:40.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:40.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:40.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:40.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:40.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:40.966 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:40.970 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:45:40.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:40.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:40.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:40.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:40.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:41.450 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:45:41.928 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:45:42.406 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:45:42.883 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:45:43.361 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:45:43.838 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:45:44.315 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:45:44.793 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:45:45.271 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:45:45.749 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:45:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:45:46.704 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:45:47.182 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:45:47.660 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:45:48.137 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:45:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:45:48.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:48.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:48.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:48.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:49.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:49.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:49.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:49.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:49.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:49.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:49.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:49.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:49.033 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:49.037 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:49.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:49.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:49.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:49.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:49.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:49.091 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:45:49.569 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:45:50.047 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:45:50.525 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:45:51.002 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:45:51.480 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:45:51.958 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:45:52.436 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:45:52.914 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:45:53.391 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:45:53.863 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:45:54.341 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:45:54.818 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:45:55.292 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:45:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:45:56.245 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:45:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:45:57.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:57.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:57.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:57.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:57.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:45:57.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:45:57.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:45:57.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:57.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:57.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:57.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:45:57.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:45:57.099 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:45:57.101 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:45:57.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:45:57.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:45:57.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:45:57.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:57.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:45:57.201 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:45:57.679 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:45:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:45:58.635 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:45:59.113 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:45:59.591 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:46:00.068 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:46:00.547 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:46:01.025 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:46:01.503 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:46:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:46:02.460 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:46:02.937 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:46:03.416 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:46:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:46:04.372 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:46:04.849 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:46:05.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:05.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:05.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:05.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:05.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:05.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:46:05.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:05.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:05.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:05.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:46:05.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:46:05.177 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:05.181 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:05.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:05.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:05.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:05.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:05.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:46:05.805 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:46:06.283 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:46:06.761 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:46:07.239 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:46:07.717 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:46:08.195 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:46:08.672 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:46:09.150 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:46:09.627 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:46:10.105 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:46:10.582 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:46:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:46:11.538 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:46:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:46:12.494 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 01:46:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 01:46:13.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:13.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:13.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:13.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:13.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:13.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:13.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:46:13.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:13.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:13.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:13.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:46:13.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:46:13.253 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:13.257 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:13.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:13.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:13.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:13.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:13.450 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 01:46:13.928 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 01:46:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 01:46:14.883 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 01:46:15.362 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 01:46:15.839 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 01:46:16.317 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 01:46:16.795 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 01:46:17.273 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 01:46:17.751 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 01:46:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 01:46:18.707 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 01:46:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 01:46:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 01:46:20.141 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 01:46:20.618 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 01:46:21.096 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 01:46:21.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:21.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:21.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:21.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:21.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:21.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:21.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:46:21.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:21.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:21.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:21.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:46:21.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:46:21.332 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:21.336 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:21.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:21.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:21.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:21.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:21.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:21.573 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 01:46:22.051 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 01:46:22.528 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 01:46:23.006 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 01:46:23.484 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 01:46:23.960 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 01:46:24.438 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 01:46:24.916 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 01:46:25.393 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 01:46:25.872 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 01:46:26.349 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 01:46:26.827 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 01:46:27.305 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 01:46:27.782 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 01:46:28.259 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 01:46:28.737 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 01:46:29.215 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 01:46:29.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:29.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:29.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:29.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:29.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:29.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:29.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:29.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:29.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:29.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:46:29.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:46:29.356 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:46:34.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:46:34.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:46:34.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:34.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:34.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:34.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:34.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:46:34.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:34.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:46:34.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:46:34.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:46:34.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:46:34.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:46:34.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:46:34.368 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:46:34.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:46:34.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:34.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:34.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:46:34.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:46:34.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:46:34.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:46:34.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:46:34.370 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:46:34.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:34.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:34.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:34.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:46:34.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:46:34.372 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:46:39.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:46:39.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:46:39.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:39.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:39.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:39.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:39.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:39.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:46:39.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:39.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:46:39.391 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:46:39.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:46:39.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:46:39.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:46:39.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:39.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:39.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:46:39.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:46:39.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:46:39.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:39.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:46:39.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:46:39.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:46:39.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:39.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:46:39.401 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:46:39.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:46:39.401 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:46:39.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:39.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:46:39.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:46:39.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:46:39.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:46:39.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:46:39.406 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:46:39.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:46:39.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:46:39.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:46:39.936 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:39.938 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:39.939 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:46:39.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:39.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:39.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:39.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:46:39.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:39.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:39.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:39.970 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:46:39.970 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:46:39.987 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:39.990 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:39.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:40.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:40.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:40.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:40.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:40.372 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:46:40.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:40.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:40.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:40.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:40.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:46:41.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:46:41.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:41.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:41.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:41.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:41.802 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:46:42.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:46:42.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:42.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:42.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:42.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:42.758 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:46:43.236 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:46:43.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:43.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:43.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:43.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:43.715 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:46:44.193 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:46:44.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:44.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:44.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:44.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:44.672 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:46:45.150 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:46:45.628 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:46:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:46:46.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:46:47.063 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:46:47.541 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:46:48.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:48.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:48.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:48.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:48.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:46:48.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:48.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:48.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:46:48.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:48.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:48.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:48.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:46:48.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:46:48.065 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:46:48.067 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:46:48.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:48.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:46:48.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:46:48.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:48.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:48.497 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:46:48.975 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:46:49.453 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:46:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:46:50.409 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:46:50.887 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:46:51.365 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:46:51.843 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:46:52.322 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:46:52.800 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:46:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:46:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:46:54.234 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:46:54.712 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:46:55.190 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:46:55.668 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:46:56.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:46:56.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:46:56.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:46:56.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:46:56.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:46:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:46:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:46:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:46:56.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:46:56.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:46:56.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:46:56.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:46:56.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:46:56.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:46:56.098 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.099 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.100 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.100 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.100 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:46:56.100 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:01.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:01.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:01.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:01.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:01.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:01.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:01.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:01.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:01.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:01.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:01.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:01.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:01.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:01.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:01.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:01.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:01.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:01.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:01.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:01.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:01.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:01.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:01.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:01.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:01.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:01.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:01.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:01.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:01.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:01.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:01.124 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:01.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:01.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:47:01.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:47:01.648 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:47:01.650 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:47:01.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:01.653 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:47:01.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:01.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:01.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:47:01.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:01.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:01.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:01.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:47:01.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:47:01.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:01.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:01.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:01.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:01.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:02.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:47:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:02.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:02.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:02.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:47:03.046 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:03.524 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:47:04.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:47:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:04.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:04.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:04.480 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:47:04.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:05.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:05.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:47:05.914 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:47:06.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:06.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:06.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:06.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:06.392 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:47:06.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:47:07.348 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:47:07.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:47:08.305 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:47:08.782 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:47:09.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:47:09.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:09.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:09.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:09.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:09.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:09.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:09.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:09.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:09.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:47:09.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:09.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:09.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:09.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:09.741 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:47:09.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:09.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:09.741 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:14.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:14.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:14.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:14.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:14.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:14.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:14.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:14.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:14.754 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:14.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:14.754 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:14.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:14.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:14.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:14.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:14.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:14.758 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:14.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:14.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:14.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:14.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:14.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:14.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:14.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:14.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:14.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:14.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:14.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:14.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:14.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:14.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:14.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:14.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.764 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:14.764 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:14.764 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:14.764 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:14.769 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:47:15.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:47:15.290 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:47:15.292 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:47:15.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:15.294 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:47:15.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:15.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:15.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:47:15.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:15.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:15.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:15.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:47:15.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:47:15.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:15.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:15.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:15.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:47:15.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:15.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:15.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:15.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:16.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:47:16.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:47:16.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:16.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:16.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:16.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:47:17.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:47:17.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:17.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:17.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:17.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:18.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:47:18.599 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:47:18.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:18.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:18.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:18.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:19.077 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:47:19.555 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:47:19.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:19.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:19.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:19.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:20.033 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:47:20.512 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:47:20.990 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:47:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:47:21.946 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:47:22.424 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:47:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:47:23.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:23.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:23.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:23.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:23.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:23.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:23.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:23.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:23.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:23.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:23.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:23.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:23.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:23.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:23.369 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:23.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:28.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:28.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:28.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:28.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:28.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:28.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:28.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:28.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:28.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:28.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:28.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:28.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:28.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:28.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:28.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:28.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:28.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:28.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:28.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:28.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:28.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:28.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:28.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:28.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:28.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:28.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:28.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:28.395 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:28.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:28.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:47:28.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:47:28.921 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:47:28.923 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:47:28.924 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:47:28.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:28.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:28.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:28.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:47:28.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:28.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:28.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:28.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:47:28.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:47:29.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:47:29.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:29.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:29.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:29.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:29.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:47:30.316 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:47:30.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:30.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:30.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:47:31.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:47:31.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:31.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:31.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:31.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:47:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:47:32.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:32.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:32.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:32.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:32.703 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:47:33.181 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:47:33.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:33.659 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:47:34.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:47:34.614 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:47:35.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:47:35.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:35.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:35.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:35.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:35.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:35.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:35.439 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:47:35.439 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1505 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:35.439 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:35.439 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:35.439 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:35.439 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:40.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:40.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:40.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:40.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:40.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:40.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:40.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:40.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:40.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:40.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:40.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:40.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:40.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:40.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:40.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:40.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:40.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:40.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:40.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:40.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:40.458 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:40.458 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:40.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:40.458 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:40.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:40.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:40.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:40.459 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:40.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:40.460 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:40.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:40.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:40.460 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:40.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:40.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:40.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:40.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:40.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:40.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:40.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:40.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:40.464 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:40.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:47:40.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:47:40.988 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:47:40.989 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:47:40.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:40.991 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:47:41.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:41.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:41.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:47:41.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:41.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:41.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:41.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:47:41.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:47:41.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:47:41.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:41.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:41.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:41.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:41.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:47:42.386 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:47:42.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:42.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:42.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:42.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:42.863 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:47:43.341 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:47:43.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:43.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:43.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:43.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:43.819 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:47:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:47:44.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:44.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:44.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:44.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:44.774 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:47:45.252 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:47:45.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:45.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:45.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:45.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:45.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:45.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:45.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:45.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:45.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:45.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:45.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:45.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:45.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:47:45.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:47:46.218 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:47:46.703 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:47:47.189 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:47:47.673 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:47:48.159 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:47:48.645 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:47:49.131 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:47:49.617 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:47:50.104 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:47:50.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:50.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:50.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:50.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:50.516 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:47:50.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:50.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:50.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:50.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:50.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:50.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:50.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:50.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:50.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:50.524 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:50.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:50.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:50.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:50.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:50.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:50.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:50.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:50.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:50.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:50.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:50.528 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:50.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:50.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:50.529 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:50.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:50.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:50.531 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:47:55.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:47:55.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:47:55.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:55.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:55.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:55.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:55.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:47:55.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:55.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:55.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:47:55.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:47:55.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:47:55.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:47:55.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:55.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:55.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:47:55.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:47:55.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:47:55.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:47:55.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:55.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:47:55.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:47:55.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:55.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:55.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:47:55.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:47:55.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:47:55.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:47:55.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:55.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:47:55.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:47:55.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:55.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:47:55.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:47:55.554 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:47:55.559 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:47:56.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:47:56.082 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:47:56.084 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:47:56.085 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:47:56.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:47:56.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:47:56.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:47:56.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:47:56.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:47:56.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:47:56.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:47:56.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:47:56.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:47:56.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:47:56.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:56.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:56.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:56.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:56.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:47:57.473 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:47:57.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:57.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:57.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:57.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:57.951 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:47:58.429 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:47:58.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:58.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:58.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:58.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:58.906 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:47:59.384 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:47:59.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:47:59.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:47:59.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:47:59.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:47:59.862 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:48:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:48:00.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:00.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:00.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:00.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:00.817 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:48:01.295 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:48:01.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:01.773 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:48:02.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:48:02.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:48:03.206 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:48:03.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:03.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:48:04.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:48:04.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:04.639 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:48:05.117 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:48:05.595 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:48:05.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:05.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:06.073 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:48:06.554 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:48:07.033 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:48:07.513 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:48:07.989 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:48:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:48:08.951 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:48:09.432 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:48:09.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:09.910 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:48:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:48:10.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:48:11.343 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:48:11.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:11.821 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:48:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:48:12.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:12.777 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:48:13.255 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:48:13.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:13.732 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:48:14.210 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:48:14.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:14.688 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:48:15.165 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:48:15.643 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:48:16.120 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:48:16.598 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:48:16.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:16.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:16.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:16.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:16.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:16.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:16.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:16.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:16.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:16.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:16.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:16.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:16.717 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:48:16.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:16.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4515 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:21.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:21.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:21.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:21.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:21.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:21.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:21.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:21.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:21.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:21.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:48:21.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:48:21.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:48:21.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:21.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:21.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:21.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:48:21.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:21.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:48:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:21.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:48:21.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:48:21.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:21.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:21.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:21.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:48:21.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:21.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:48:21.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:21.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:21.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:48:21.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:21.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:48:21.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:48:21.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:48:21.738 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:48:21.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:21.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:48:22.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:48:22.274 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:48:22.276 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:48:22.277 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:48:22.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:22.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:22.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:22.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:48:22.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:22.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:22.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:22.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:48:22.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:48:22.318 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:48:22.322 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:48:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 01:48:22.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:22.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:22.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:22.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:48:22.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:22.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:22.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:22.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:23.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 01:48:23.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:23.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:23.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:23.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:23.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:23.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:23.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:23.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:23.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:23.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:23.146 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:23.146 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:28.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:28.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:28.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:28.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:28.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:28.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:28.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:28.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:28.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:28.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:28.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:48:28.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:48:28.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:48:28.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:28.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:28.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:28.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:28.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:28.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:48:28.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:28.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:28.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:48:28.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:48:28.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:48:28.160 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:48:28.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:28.165 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:48:28.648 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:48:28.685 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:48:28.687 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:48:28.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:28.689 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:48:28.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:28.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:28.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:48:28.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:28.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:28.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:28.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:48:28.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:48:28.740 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:48:28.766 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:48:28.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 01:48:28.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:28.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:28.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:28.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:29.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:48:29.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:29.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:29.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:29.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:29.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 01:48:29.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:29.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:29.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:29.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:29.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:29.568 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:29.568 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:48:34.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:48:34.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:48:34.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:34.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:34.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:34.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:34.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:48:34.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:34.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:34.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:48:34.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:48:34.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:48:34.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:48:34.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:34.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:34.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:48:34.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:48:34.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:48:34.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:48:34.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:34.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:48:34.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:48:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:34.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:48:34.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:48:34.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:34.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:48:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:48:34.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:48:34.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:48:34.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:48:34.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:48:34.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:48:34.608 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:48:34.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:48:34.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:48:35.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:48:35.136 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:48:35.139 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:48:35.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:35.142 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:48:35.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:35.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:35.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:48:35.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:35.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:35.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:35.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:48:35.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:48:35.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:35.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:35.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:35.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:35.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:35.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:48:35.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:35.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:35.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:35.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:36.052 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:48:36.530 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:48:36.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:36.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:36.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:36.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:48:37.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:48:37.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:37.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:37.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:37.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:37.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:48:38.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:48:38.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:38.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:38.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:38.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:38.919 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:48:39.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:48:39.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:48:39.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:48:39.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:48:39.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:48:39.874 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:48:40.352 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:48:40.830 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:48:41.308 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:48:41.786 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:48:42.264 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:48:42.741 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:48:43.219 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:48:43.696 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:48:44.174 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:48:44.652 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:48:45.130 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:48:45.608 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:48:46.086 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:48:46.565 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:48:47.042 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:48:47.520 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:48:47.998 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:48:48.477 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:48:48.954 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:48:49.432 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:48:49.910 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:48:50.388 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:48:50.866 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:48:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:51.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:51.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:51.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:51.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:48:51.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:48:51.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:48:51.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:51.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:51.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:51.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:48:51.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:48:51.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:48:51.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:48:51.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:48:51.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:51.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:48:51.344 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:48:51.822 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:48:52.300 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:48:52.778 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:48:53.256 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:48:53.734 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:48:54.212 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:48:54.689 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:48:55.168 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:48:55.646 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:48:56.124 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:48:56.602 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:48:57.080 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:48:57.558 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:48:58.036 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:48:58.514 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:48:58.992 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:48:59.470 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:48:59.949 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:49:00.427 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:49:00.904 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:49:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:49:01.860 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:49:02.338 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:49:02.816 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:49:03.294 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:49:03.772 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:49:04.250 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:49:04.727 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:49:05.205 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:49:05.682 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:49:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:49:06.638 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:49:06.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:06.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:06.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:06.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:06.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:06.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:06.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:49:06.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:06.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:06.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:06.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:49:06.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:49:06.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:06.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:06.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:06.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:06.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:07.116 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:49:07.594 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:49:08.072 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:49:08.549 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:49:09.027 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 01:49:09.505 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 01:49:09.983 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 01:49:10.460 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 01:49:10.938 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 01:49:11.416 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 01:49:11.893 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 01:49:12.371 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 01:49:12.850 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 01:49:13.328 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 01:49:13.805 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 01:49:14.286 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 01:49:14.764 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 01:49:15.242 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 01:49:15.720 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 01:49:16.198 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 01:49:16.675 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 01:49:17.153 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 01:49:17.631 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 01:49:18.108 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 01:49:18.586 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 01:49:19.064 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 01:49:19.542 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 01:49:20.020 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 01:49:20.498 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 01:49:20.976 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 01:49:21.454 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 01:49:21.932 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 01:49:22.410 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 01:49:22.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:22.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:22.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:22.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:22.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:22.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:22.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:49:22.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:22.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:22.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:22.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:49:22.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:49:22.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:22.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:22.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:22.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:22.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:22.886 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 01:49:23.363 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 01:49:23.840 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 01:49:24.318 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 01:49:24.796 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 01:49:25.274 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 01:49:25.750 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 01:49:26.228 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 01:49:26.706 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 01:49:27.183 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 01:49:27.661 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 01:49:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 01:49:28.617 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 01:49:29.095 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 01:49:29.573 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 01:49:30.051 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 01:49:30.529 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 01:49:31.007 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 01:49:31.484 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 01:49:31.962 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 01:49:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 01:49:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 01:49:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 01:49:33.873 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 01:49:34.351 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 01:49:34.829 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 01:49:35.306 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 01:49:35.784 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 01:49:36.257 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 01:49:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 01:49:37.205 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 01:49:37.683 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 01:49:38.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:38.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:38.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:38.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:38.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:38.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:38.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:38.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:38.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:38.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:38.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:38.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:38.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:49:38.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:49:38.129 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:49:38.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:38.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:38.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:38.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:38.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:38.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:43.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:49:43.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:49:43.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:43.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:43.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:43.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:43.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:43.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:49:43.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:43.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:49:43.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:49:43.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:49:43.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:49:43.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:49:43.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:43.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:43.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:49:43.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:49:43.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:49:43.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:43.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:49:43.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:49:43.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:49:43.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:43.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:43.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:49:43.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:49:43.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:49:43.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:49:43.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:49:43.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:49:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:49:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:49:43.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:49:43.155 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:49:43.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:49:43.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:49:43.157 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:43.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:49:48.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:49:48.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:48.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:48.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:48.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:48.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:48.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:49:48.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:48.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:49:48.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:49:48.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:49:48.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:49:48.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:49:48.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:48.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:49:48.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:49:48.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:49:48.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:48.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:49:48.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:49:48.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:49:48.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:48.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:48.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:49:48.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:49:48.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:49:48.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:48.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:49:48.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:49:48.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:49:48.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:49:48.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:48.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:49:48.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:49:48.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:49:48.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:49:48.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:49:48.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:49:48.187 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:49:48.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:49:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:49:48.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:49:48.708 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:49:48.709 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:49:48.711 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:49:48.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:48.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:48.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:48.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:49:48.742 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:49:48.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:48.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:48.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:48.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:49:48.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:49:48.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:48.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:49:48.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:49:48.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:48.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:49.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:49:49.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:49.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:49.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:49.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:49.631 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:49:50.109 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:49:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:50.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:50.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:50.586 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:49:51.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:49:51.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:51.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:51.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:49:52.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:49:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:52.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:52.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:52.497 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:49:52.975 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:49:53.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:53.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:53.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:53.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:53.453 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:49:53.931 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:49:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:49:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:49:55.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:49:55.843 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:49:56.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:49:56.799 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:49:57.277 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:49:57.755 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:49:58.233 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:49:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:49:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:49:59.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:49:59.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:49:59.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:49:59.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:49:59.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:49:59.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:49:59.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:49:59.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:49:59.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:49:59.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:49:59.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:49:59.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:49:59.176 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:49:59.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:49:59.176 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.176 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:49:59.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:04.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:04.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:04.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:04.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:04.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:04.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:04.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:04.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:04.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:04.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:04.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:50:04.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:50:04.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:50:04.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:04.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:04.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:04.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:50:04.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:04.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:50:04.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:04.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:50:04.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:50:04.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:04.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:04.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:04.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:50:04.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:04.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:50:04.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:04.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:50:04.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:50:04.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:04.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:04.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:04.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:50:04.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:04.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:50:04.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:50:04.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:50:04.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:50:04.198 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:50:04.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:50:04.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:04.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:50:04.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:50:04.721 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:50:04.723 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:04.724 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:50:04.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:04.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:04.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:04.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:50:04.746 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:04.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:04.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:04.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:04.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:50:04.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:50:04.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:04.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:04.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:04.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:04.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:05.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:50:05.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:05.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:05.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:05.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:05.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:50:06.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:50:06.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:06.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:06.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:50:07.077 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:50:07.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:07.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:07.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:07.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:07.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:50:08.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:50:08.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:08.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:08.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:08.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:08.510 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:50:08.988 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:50:09.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:09.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:09.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:09.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:09.466 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:50:09.944 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:50:10.422 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:50:10.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:50:11.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:50:11.856 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:50:12.334 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:50:12.811 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:50:13.289 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:50:13.768 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:50:14.245 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:50:14.724 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:50:15.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:15.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:15.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:15.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:15.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:15.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:15.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:15.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:15.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:15.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:15.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:15.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:15.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:15.187 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:50:15.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:15.187 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:20.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:20.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:20.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:20.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:20.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:20.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:20.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:20.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:20.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:20.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:20.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:50:20.205 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:50:20.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:50:20.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:20.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:20.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:20.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:50:20.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:20.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:50:20.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:20.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:20.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:50:20.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:20.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:50:20.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:50:20.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:20.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:20.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:20.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:50:20.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:20.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:50:20.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:20.213 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:50:20.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:50:20.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:50:20.214 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:50:20.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:20.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:50:20.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:50:20.748 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:50:20.750 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:20.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:20.752 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:50:20.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:20.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:20.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:50:20.785 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:20.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:20.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:20.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:20.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:50:20.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:50:20.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:20.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:20.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:20.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:20.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:21.181 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:50:21.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:21.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:21.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:21.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:21.658 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:50:21.674 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:22.137 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:50:22.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:22.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:22.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:22.614 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:50:23.092 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:50:23.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:23.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:23.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:23.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:23.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:50:24.047 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:50:24.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:24.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:24.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:24.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:24.525 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:50:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:50:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:25.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:25.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:25.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:25.480 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:50:25.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:50:26.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:50:26.913 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:50:27.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:50:27.869 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:50:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:50:28.825 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:50:29.303 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:50:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:50:30.259 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:50:30.736 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:50:31.214 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:50:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:50:32.168 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:50:32.646 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:50:33.124 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:50:33.602 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:50:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:50:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:50:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:50:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:50:35.992 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:50:36.469 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:50:36.947 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:50:37.425 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:50:37.903 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:50:38.381 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:50:38.859 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:50:39.336 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:50:39.814 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:50:40.292 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:50:40.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:40.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:40.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:40.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:40.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:40.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:40.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:40.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:40.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:40.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:40.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:40.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:40.406 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:40.407 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:45.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:45.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:45.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:45.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:45.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:45.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:45.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:45.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:45.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:45.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:50:45.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:50:45.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:50:45.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:50:45.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:45.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:45.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:45.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:50:45.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:50:45.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:50:45.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:45.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:50:45.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:50:45.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:45.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:45.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:45.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:50:45.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:50:45.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:50:45.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:45.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:50:45.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:50:45.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:45.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:50:45.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:45.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:50:45.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:50:45.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:50:45.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:50:45.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:50:45.435 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:50:45.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:50:45.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:50:45.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:50:45.968 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:50:45.970 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:45.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:45.972 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:50:46.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:46.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:50:46.013 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:50:46.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:46.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:46.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:46.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:50:46.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:50:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:46.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:50:46.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:50:46.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:46.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:46.394 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:50:46.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:46.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:46.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:46.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:46.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:50:47.349 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:50:47.375 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:47.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:47.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:47.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:47.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:50:48.305 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:50:48.348 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:48.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:48.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:48.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:48.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:48.783 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:50:49.261 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:50:49.323 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:49.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:49.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:49.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:49.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:49.739 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:50:50.216 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:50:50.297 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:50.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:50.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:50.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:50.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:50.694 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:50:51.172 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:50:51.271 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:51.650 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:50:52.128 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:50:52.246 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:52.607 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:50:53.085 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:50:53.221 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:53.563 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:50:54.041 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:50:54.195 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:54.519 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:50:54.997 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:50:55.170 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:55.475 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:50:55.953 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:50:56.144 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:50:56.430 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:50:56.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:50:56.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:50:56.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:50:56.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:50:56.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:50:56.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:50:56.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:50:56.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:50:56.908 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:50:56.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:50:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:50:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:50:56.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:50:56.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:50:56.911 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:50:56.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.912 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:50:56.913 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2452 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:01.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:01.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:01.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:01.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:01.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:01.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:01.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:01.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:01.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:01.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:01.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:01.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:01.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:01.931 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:51:01.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:01.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:01.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:51:01.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:01.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:51:01.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:51:01.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:01.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:01.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:51:01.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:01.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:01.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:51:01.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:51:01.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:51:01.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:51:01.938 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:51:01.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:01.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:51:02.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:51:02.464 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:02.466 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:02.468 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:02.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:02.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:02.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:02.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:02.500 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:02.502 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:02.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:02.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:02.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:02.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:02.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:02.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:02.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:02.526 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:02.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:02.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:02.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:02.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:51:02.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:02.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:02.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:02.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:03.380 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:51:03.396 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:51:03.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:51:03.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:03.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:03.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:03.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:51:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:51:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:04.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:04.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:04.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:05.292 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:51:05.770 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:51:05.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:05.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:05.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:05.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:06.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:51:06.725 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:51:06.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:06.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:06.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:06.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:07.203 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:51:07.680 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:51:08.157 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:51:08.635 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:51:09.113 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:51:09.591 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:51:10.069 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:51:10.546 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:51:11.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:51:11.502 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:51:11.979 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:51:12.457 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:51:12.941 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:51:13.143 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:13.420 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:51:13.897 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:51:14.375 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:51:14.853 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:51:15.331 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:51:15.809 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:51:16.287 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:51:16.765 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:51:17.244 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:51:17.721 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:51:18.200 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:51:18.677 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:51:18.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:18.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:18.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:18.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:19.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:19.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:19.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:19.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:19.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:19.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:19.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:19.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:19.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:19.012 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:51:19.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:19.012 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.012 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.012 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.013 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.013 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.013 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:19.013 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:24.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:24.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:24.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:24.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:24.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:24.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:24.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:24.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:24.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:24.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:24.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:51:24.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:51:24.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:51:24.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:24.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:24.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:24.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:51:24.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:24.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:51:24.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:24.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:51:24.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:51:24.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:24.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:24.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:24.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:51:24.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:24.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:51:24.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:24.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:51:24.035 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:51:24.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:24.035 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:24.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:24.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:51:24.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:24.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:51:24.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:24.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:51:24.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:51:24.041 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:51:24.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:24.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:51:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:51:24.576 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:24.578 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:24.580 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:24.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:24.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:24.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:24.622 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:24.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:24.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:24.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:24.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:24.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:24.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:24.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:24.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:24.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:24.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:51:25.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:25.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:25.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:25.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:25.485 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:51:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:51:25.988 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:51:26.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:26.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:26.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:26.441 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:51:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:51:27.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:27.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:27.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:27.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:27.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:51:27.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:51:28.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:28.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:28.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:28.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:28.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:51:28.830 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:51:29.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:29.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:29.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:29.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:29.308 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:51:29.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:51:30.264 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:51:30.741 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:51:31.219 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:51:31.696 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:51:32.174 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:51:32.651 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:51:33.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:51:33.607 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:51:34.085 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:51:34.563 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:51:34.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:34.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:34.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:34.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:34.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:34.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:34.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:34.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:34.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:34.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:34.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:34.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:34.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:34.704 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:51:34.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:34.705 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:39.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:39.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:39.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:39.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:39.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:39.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:39.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:39.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:39.718 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:39.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:39.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:51:39.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:51:39.722 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:51:39.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:39.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:39.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:39.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:51:39.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:39.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:51:39.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:39.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:51:39.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:51:39.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:39.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:39.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:39.726 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:51:39.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:39.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:51:39.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:39.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:39.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:51:39.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:39.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:51:39.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:51:39.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:51:39.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:51:39.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:51:39.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:51:39.732 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:51:39.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:39.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:51:40.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:51:40.258 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:40.260 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:40.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:40.262 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:40.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:40.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:40.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:40.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:40.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:40.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:40.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:40.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:40.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:40.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:40.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:51:40.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:40.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:40.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:40.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:40.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:40.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:40.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:40.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:40.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:40.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:40.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:40.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:40.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:40.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:40.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:40.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:40.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:40.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.175 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:51:41.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:41.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:41.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:41.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:41.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:41.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:41.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:41.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:41.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:41.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:41.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:41.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:41.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:41.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:41.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:41.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:41.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:41.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:41.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:41.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:41.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:41.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:41.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:41.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:41.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:41.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:41.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:41.652 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:51:41.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:41.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:41.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:41.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:42.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:42.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:42.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:42.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:42.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:42.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:42.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:42.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:42.060 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:42.060 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:47.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:47.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:47.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:47.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:47.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:47.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:47.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:47.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:47.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:47.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:47.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:51:47.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:51:47.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:51:47.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:47.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:47.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:47.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:51:47.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:47.080 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:51:47.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:47.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:51:47.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:51:47.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:47.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:47.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:47.084 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:51:47.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:47.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:51:47.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:47.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:51:47.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:51:47.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:47.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:47.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:47.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:51:47.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:47.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:51:47.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:51:47.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:51:47.090 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:51:47.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:47.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:51:47.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:51:47.621 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:47.623 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:47.625 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:47.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:47.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:47.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:47.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:47.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:47.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:47.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:47.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:47.670 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:47.675 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 01:51:47.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:47.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:47.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:47.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:47.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:48.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:51:48.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:48.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:48.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:48.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:48.534 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:51:48.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:48.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:48.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:48.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:48.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:48.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:48.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:48.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:48.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:48.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:48.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:48.563 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:51:48.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:48.563 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:51:53.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:51:53.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:51:53.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:53.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:53.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:53.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:53.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:51:53.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:53.579 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:53.579 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:51:53.579 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:51:53.582 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:51:53.582 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:51:53.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:53.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:53.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:51:53.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:51:53.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:51:53.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:51:53.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:53.586 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:51:53.586 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:51:53.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:53.587 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:53.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:51:53.588 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:51:53.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:51:53.588 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:51:53.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:53.589 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:51:53.589 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:51:53.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:53.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:51:53.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:51:53.590 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:51:53.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:51:53.590 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:51:53.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:51:53.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:51:53.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:51:53.594 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:51:53.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:51:53.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:51:54.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:51:54.124 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:51:54.126 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:51:54.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:54.128 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:51:54.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:54.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:54.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:54.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:54.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:54.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:54.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:54.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:54.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:54.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:54.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:54.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:54.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:51:54.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:54.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:54.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:54.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:55.039 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:51:55.517 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:51:55.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:55.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:55.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:55.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:55.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:51:56.473 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:51:56.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:56.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:56.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:56.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:56.951 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:51:57.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:57.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:57.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:57.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:57.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:51:57.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:51:57.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:51:57.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:57.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:57.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:57.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:51:57.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:51:57.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:57.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:51:57.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:51:57.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:57.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:51:57.428 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:51:57.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:51:57.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:57.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:57.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:57.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:57.906 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:51:58.384 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:51:58.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:51:58.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:51:58.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:51:58.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:51:58.862 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:51:59.340 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:51:59.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:52:00.297 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:52:00.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:00.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:00.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:00.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:00.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:00.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:00.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:00.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:00.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:00.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:00.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:00.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:00.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:00.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:00.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:00.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:00.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:00.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:52:01.252 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:52:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:52:02.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:52:02.685 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:52:03.163 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:52:03.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:52:03.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:03.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:03.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:03.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:03.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:03.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:03.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:03.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:03.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:03.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:03.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:03.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:03.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:03.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:03.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:03.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:03.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:04.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:04.118 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:52:04.596 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:52:05.074 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:52:05.551 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:52:06.029 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:52:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:52:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:52:07.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:07.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:07.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:07.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:07.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:07.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:07.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:07.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:07.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:07.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:07.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:07.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:07.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:07.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:07.052 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:07.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:12.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:12.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:12.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:12.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:12.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:12.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:12.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:12.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:12.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:12.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:12.067 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:52:12.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:52:12.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:52:12.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:12.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:12.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:12.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:52:12.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:12.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:52:12.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:12.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:52:12.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:52:12.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:12.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:12.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:12.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:52:12.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:12.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:52:12.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:12.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:52:12.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:12.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:52:12.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:52:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:52:12.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:52:12.080 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:52:12.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:12.085 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:52:12.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:52:12.604 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:52:12.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:12.607 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:52:12.608 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:52:12.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:12.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:12.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:12.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:12.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:12.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:12.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:12.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:13.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:52:13.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:13.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:13.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:13.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:13.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:52:14.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:52:14.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:14.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:14.480 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:52:14.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:52:15.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:15.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:15.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:15.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:15.436 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:52:15.913 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:52:16.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:16.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:16.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:16.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:16.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:52:16.869 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:52:17.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:17.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:17.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:17.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:17.346 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:52:17.824 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:52:18.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:52:18.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:52:19.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:52:19.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:52:20.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:52:20.689 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:52:21.167 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:52:21.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:52:22.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:52:22.599 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:52:23.077 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:52:23.554 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:52:24.031 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:52:24.509 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:52:24.987 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:52:25.465 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:52:25.943 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:52:26.421 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:52:26.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:26.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:26.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:26.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:26.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:26.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:26.718 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:26.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:31.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:31.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:31.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:31.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:31.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:31.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:31.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:31.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:31.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:52:31.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:52:31.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:52:31.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:31.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:31.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:31.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:52:31.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:31.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:52:31.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:31.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:52:31.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:52:31.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:31.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:31.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:31.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:52:31.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:31.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:52:31.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:31.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:52:31.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:52:31.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:31.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:31.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:31.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:52:31.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:31.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:52:31.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:31.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:52:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:52:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:52:31.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:52:31.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:52:31.750 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:52:31.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:31.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:52:32.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:52:32.274 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:52:32.276 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:52:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:32.277 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:52:32.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:32.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:32.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:32.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:32.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:32.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:32.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:32.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:32.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:32.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:32.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:32.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:32.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:52:32.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:32.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:32.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:32.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:33.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:52:33.670 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:52:33.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:33.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:33.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:33.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:52:34.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:34.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:34.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:34.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:34.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:34.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:34.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:34.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:34.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:34.627 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:52:34.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:34.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:34.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:34.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:35.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:52:35.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:52:35.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:35.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:35.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:35.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:36.055 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:52:36.534 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:52:36.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:36.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:36.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:36.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:37.011 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:52:37.489 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:52:37.967 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:52:38.445 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:52:38.922 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:52:39.400 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:52:39.877 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:52:40.354 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:52:40.832 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:52:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:52:41.786 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:52:42.263 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:52:42.740 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:52:43.218 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:52:43.696 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:52:44.174 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:52:44.651 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:52:45.129 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:52:45.607 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:52:46.085 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:52:46.562 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:52:47.040 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:52:47.518 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:52:47.996 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:52:48.474 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:52:48.952 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:52:49.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:49.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:49.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:49.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:49.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:49.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:49.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:49.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:49.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:49.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:49.255 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:49.256 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:52:54.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:52:54.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:52:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:54.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:54.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:54.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:52:54.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:54.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:54.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:52:54.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:52:54.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:52:54.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:52:54.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:54.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:54.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:52:54.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:52:54.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:52:54.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:52:54.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:54.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:52:54.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:52:54.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:54.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:54.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:52:54.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:52:54.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:52:54.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:52:54.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:54.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:52:54.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:52:54.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:54.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:52:54.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:52:54.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:52:54.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:52:54.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:52:54.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:54.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:52:54.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:52:54.282 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:52:54.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:52:54.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:52:54.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:52:54.808 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:52:54.809 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:52:54.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:52:54.810 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:52:54.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:52:54.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:52:54.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:52:54.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:52:54.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:52:54.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:52:54.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:52:54.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:52:55.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:52:55.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:55.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:55.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:55.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:55.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:52:56.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:52:56.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:56.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:56.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:56.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:56.680 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:52:57.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:52:57.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:57.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:57.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:57.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:57.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:52:58.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:52:58.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:58.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:58.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:58.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:52:59.069 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:52:59.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:52:59.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:52:59.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:52:59.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:52:59.546 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:53:00.024 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:53:00.502 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:53:00.980 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:53:01.457 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:53:01.935 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:53:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:53:02.890 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:53:03.368 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:53:03.845 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:53:04.323 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:53:04.801 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:53:05.278 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:53:05.756 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:53:06.233 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:53:06.711 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:53:07.189 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:53:07.667 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:53:08.142 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:53:08.619 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:53:09.097 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:53:09.575 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:53:10.053 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:53:10.531 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:53:11.009 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:53:11.487 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:53:11.965 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:53:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:53:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:53:13.398 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:53:13.876 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:53:14.354 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:53:14.832 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:53:15.308 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:53:15.786 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:53:16.264 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:53:16.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:53:16.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:53:16.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:16.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:16.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:16.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:16.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:53:16.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:53:16.306 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:53:16.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:16.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4703 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:21.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:53:21.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:53:21.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:21.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:21.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:21.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:21.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:21.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:53:21.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:21.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:53:21.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:53:21.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:53:21.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:53:21.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:53:21.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:21.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:21.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:53:21.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:53:21.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:53:21.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:21.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:53:21.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:53:21.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:53:21.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:21.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:21.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:53:21.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:53:21.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:53:21.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:21.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:53:21.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:53:21.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:53:21.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:21.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:21.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:53:21.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:53:21.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:53:21.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:53:21.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:53:21.331 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:53:21.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:21.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:53:21.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:53:21.857 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:53:21.859 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:53:21.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:53:21.860 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:53:21.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:53:21.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:53:21.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:53:21.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:53:21.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:53:21.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:53:21.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:53:21.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:53:22.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:53:22.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:22.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:22.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:22.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:22.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:53:23.251 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:53:23.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:23.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:23.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:23.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:23.729 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:53:24.207 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:53:24.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:24.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:24.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:24.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:24.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:53:25.163 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:53:25.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:25.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:25.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:25.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:53:26.118 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:53:26.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:26.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:26.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:26.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:26.596 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:53:27.074 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:53:27.552 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:53:28.030 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:53:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:53:28.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:53:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:53:29.940 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:53:30.418 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:53:30.896 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:53:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:53:31.850 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:53:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:53:32.806 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:53:33.284 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:53:33.761 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:53:34.239 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:53:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:53:35.194 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:53:35.672 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:53:36.150 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:53:36.627 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:53:37.105 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:53:37.582 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:53:38.060 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:53:38.537 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:53:39.014 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:53:39.492 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:53:39.970 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:53:40.447 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:53:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:53:41.402 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:53:41.880 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:53:42.358 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:53:42.836 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:53:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:53:43.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:53:43.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:53:43.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:43.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:43.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:43.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:43.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:43.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:43.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:43.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:43.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:53:43.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:53:43.355 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:43.355 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4702 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:53:48.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:53:48.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:53:48.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:48.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:48.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:48.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:48.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:53:48.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:53:48.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:48.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:53:48.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:53:48.364 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:53:48.364 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:53:48.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:53:48.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:48.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:53:48.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:53:48.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:53:48.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:53:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:48.366 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:53:48.366 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:53:48.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:53:48.366 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:48.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:53:48.367 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:53:48.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:53:48.367 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:53:48.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:48.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:53:48.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:53:48.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:53:48.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:53:48.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:53:48.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:53:48.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:53:48.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:53:48.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:53:48.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:53:48.372 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:53:48.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:53:48.377 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:53:48.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:53:48.901 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:53:48.903 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:53:48.904 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:53:48.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:53:48.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:53:48.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:53:48.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:53:48.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:53:48.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:53:48.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:53:48.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:53:48.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:53:49.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:53:49.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:49.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:49.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:49.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:49.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:53:50.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:53:50.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:50.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:50.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:50.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:53:51.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:53:51.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:51.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:51.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:51.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:51.722 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:53:52.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:53:52.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:52.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:52.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:52.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:52.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:53:53.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:53:53.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:53:53.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:53:53.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:53:53.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:53:53.633 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:53:54.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:53:54.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:53:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:53:55.544 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:53:56.022 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:53:56.500 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:53:56.978 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:53:57.455 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:53:57.933 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:53:58.411 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:53:58.888 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:53:59.366 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:53:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:54:00.321 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:54:00.799 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:54:01.277 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:54:01.755 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:54:02.232 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:54:02.710 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:54:03.188 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:54:03.666 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:54:04.144 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:54:04.622 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:54:05.099 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:54:05.578 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:54:06.055 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:54:06.533 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:54:07.011 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:54:07.489 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:54:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:54:08.444 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:54:08.921 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:54:09.399 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:54:09.877 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:54:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:54:10.832 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:54:11.310 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:54:11.788 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:54:12.266 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:54:12.744 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:54:13.222 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:54:13.699 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:54:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:54:14.656 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:54:15.133 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:54:15.611 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:54:16.089 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:54:16.567 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:54:17.045 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:54:17.522 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:54:18.001 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:54:18.479 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:54:18.956 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:54:19.434 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:54:19.912 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:54:20.389 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:54:20.867 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:54:21.345 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:54:21.823 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:54:22.301 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:54:22.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:54:22.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:54:22.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:22.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:22.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:22.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:22.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:54:22.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:54:22.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:54:22.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:54:22.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:54:22.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:54:22.405 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:22.405 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:27.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:54:27.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:54:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:54:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:54:27.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:54:27.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:54:27.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:54:27.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:54:27.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:54:27.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:54:27.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:54:27.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:54:27.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:54:27.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:54:27.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:54:27.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:54:27.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:54:27.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:54:27.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:54:27.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:27.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:54:27.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:54:27.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:54:27.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:54:27.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:54:27.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:54:27.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:54:27.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:54:27.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:54:27.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:54:27.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:54:27.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:54:27.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:54:27.428 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:54:27.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:54:27.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:54:27.917 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:54:27.952 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:54:27.953 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:54:27.955 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:54:27.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:54:27.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:54:27.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:54:27.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:54:27.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:54:27.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:54:27.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:54:27.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:54:27.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:54:28.394 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:54:28.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:28.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:28.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:28.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:28.871 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:54:29.349 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:54:29.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:29.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:29.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:29.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:29.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:54:30.304 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:54:30.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:30.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:30.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:30.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:30.781 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:54:31.259 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:54:31.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:31.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:31.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:31.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:31.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:54:32.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:54:32.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:32.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:32.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:32.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:54:33.171 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:54:33.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:54:34.126 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:54:34.604 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:54:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:54:35.560 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:54:36.038 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:54:36.516 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:54:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:54:37.472 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:54:37.949 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:54:38.427 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:54:38.904 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:54:39.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:54:39.860 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:54:40.338 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:54:40.816 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:54:41.292 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:54:41.764 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:54:42.242 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:54:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:54:43.198 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:54:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:54:44.153 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:54:44.631 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:54:45.109 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:54:45.586 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:54:46.064 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:54:46.542 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:54:47.020 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:54:47.497 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:54:47.974 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:54:48.452 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:54:48.930 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:54:49.407 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:54:49.884 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:54:50.359 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:54:50.837 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:54:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:54:51.792 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:54:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:54:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:54:53.225 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:54:53.703 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:54:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:54:54.658 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:54:55.136 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:54:55.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:54:55.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:54:55.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:54:55.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:54:55.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:54:55.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:54:55.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:54:55.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:54:55.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:54:55.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:54:55.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:54:55.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:54:55.456 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:54:55.456 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5987 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:00.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:00.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:00.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:00.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:00.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:00.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:00.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:00.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:00.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:00.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:00.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:00.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:00.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:00.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:00.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:00.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:00.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:00.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:00.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:00.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:00.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:00.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:00.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:00.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:00.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:00.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:00.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:00.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:00.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:00.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:00.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:00.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:00.479 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:00.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:00.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:00.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:01.003 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:01.004 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:01.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:01.006 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:01.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:01.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:01.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:01.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:01.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:01.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:01.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:01.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:01.019 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:01.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:01.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:06.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:06.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:06.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:06.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:06.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:06.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:06.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:06.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:06.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:06.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:06.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:06.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:06.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:06.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:06.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:06.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:06.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:06.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:06.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:06.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:06.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:06.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:06.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:06.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:06.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:06.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:06.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:06.044 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:06.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:06.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:06.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:06.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.047 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:06.047 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:06.047 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:06.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:06.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:06.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:06.573 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:06.574 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:06.576 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:06.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:06.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:06.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:06.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:06.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:06.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:06.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:06.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:06.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:06.590 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:06.591 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:11.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:11.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:11.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:11.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:11.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:11.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:11.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:11.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:11.604 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:11.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:11.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:11.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:11.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:11.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:11.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:11.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:11.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:11.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:11.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:11.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:11.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:11.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:11.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:11.611 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:11.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:11.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:11.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:11.611 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:11.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:11.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:11.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:11.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:11.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:11.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:11.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:11.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:11.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:11.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:11.618 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:11.618 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:11.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:11.623 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:12.106 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:12.150 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:12.152 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:12.154 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:12.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:12.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:12.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:12.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:12.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:12.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:12.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:12.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:12.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:12.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:12.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:12.172 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:12.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:17.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:17.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:17.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:17.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:17.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:17.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:17.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:17.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:17.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:17.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:17.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:17.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:17.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:17.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:17.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:17.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:17.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:17.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:17.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:17.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:17.191 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:17.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:17.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:17.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:17.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:17.193 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:17.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:17.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:17.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:17.194 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:17.194 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:17.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:17.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:17.197 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:17.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:17.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:17.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:17.715 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:17.715 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:17.716 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:17.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:17.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:17.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:55:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:55:17.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:55:17.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:55:17.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:55:17.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:55:18.163 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:55:18.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:18.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:18.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:18.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:18.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:55:19.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:55:19.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:19.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:19.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:19.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:19.596 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:55:20.073 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:55:20.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:20.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:20.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:20.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:20.551 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:55:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:55:21.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:21.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:21.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:21.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:21.506 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:55:21.984 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:55:22.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:22.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:22.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:22.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:22.462 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:55:22.940 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:55:23.418 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:55:23.895 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:55:24.373 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:55:24.851 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:55:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:55:25.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:25.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:25.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:25.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:25.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:25.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:25.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:25.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:25.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:25.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:25.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:25.744 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:25.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:25.746 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:30.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:30.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:30.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:30.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:30.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:30.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:30.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:30.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:30.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:30.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:30.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:30.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:30.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:30.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:30.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:30.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:30.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:30.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:30.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:30.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:30.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:30.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:30.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:30.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:30.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:30.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:30.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:30.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:30.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:30.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:30.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:30.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:30.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:30.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:30.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:30.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:30.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:30.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:30.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:30.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:30.774 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:30.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:31.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:31.297 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:31.297 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:31.298 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:31.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:31.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:31.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:55:31.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:55:31.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:55:31.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:55:31.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:55:31.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:55:31.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:55:31.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:31.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:31.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:32.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:55:32.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:55:32.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:32.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:32.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:32.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:33.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:55:33.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:55:33.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:33.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:33.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:33.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:34.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:55:34.606 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:55:34.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:34.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:34.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:34.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:35.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:55:35.562 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:55:35.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:35.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:35.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:35.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:55:36.517 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:55:36.995 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:55:37.472 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:55:37.950 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:55:38.428 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:55:38.906 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:55:39.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:39.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:39.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:39.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:39.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:39.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:39.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:39.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:39.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:39.323 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:39.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:39.324 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:44.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:44.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:44.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:44.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:44.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:44.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:44.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:44.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:44.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:44.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:44.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:44.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:44.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:44.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:44.341 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:44.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:44.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:44.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:44.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:44.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:44.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:44.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:44.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:44.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:44.344 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:44.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:44.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:44.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:44.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:44.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:44.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:44.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:44.347 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:44.347 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:44.347 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:44.352 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:44.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:44.865 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:44.866 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:44.867 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:44.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:44.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:44.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:55:44.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:55:44.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:55:44.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:55:44.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:55:44.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:55:45.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:55:45.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:45.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:45.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:45.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:45.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:55:46.267 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:55:46.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:46.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:46.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:46.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:46.744 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:55:47.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:55:47.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:47.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:47.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:47.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:47.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:55:48.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:55:48.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:48.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:48.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:48.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:48.655 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:55:49.133 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:55:49.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:49.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:49.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:49.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:49.611 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:55:50.089 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:55:50.566 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:55:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:55:51.522 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:55:52.000 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:55:52.477 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:55:52.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:52.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:52.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:52.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:52.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:52.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:52.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:52.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:52.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:52.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:52.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:52.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:52.890 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:52.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:55:57.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:55:57.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:55:57.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:57.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:57.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:57.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:57.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:55:57.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:57.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:57.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:55:57.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:55:57.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:55:57.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:55:57.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:57.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:57.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:55:57.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:55:57.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:55:57.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:55:57.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:57.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:55:57.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:55:57.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:57.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:55:57.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:55:57.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:55:57.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:55:57.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:55:57.911 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:55:57.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:55:57.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:55:58.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:55:58.439 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:55:58.440 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:55:58.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:55:58.441 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:55:58.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:55:58.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:55:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:55:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:55:58.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:55:58.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:55:58.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:55:58.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:55:58.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:55:58.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:58.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:58.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:58.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:55:59.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:55:59.833 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:55:59.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:55:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:55:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:55:59.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:56:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:56:00.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:00.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:00.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:00.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:01.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:56:01.745 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:56:01.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:01.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:01.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:01.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:02.222 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:56:02.699 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:56:02.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:02.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:02.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:02.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:03.177 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:56:03.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:56:04.132 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:56:04.610 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:56:05.088 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:56:05.566 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:56:06.043 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:56:06.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:06.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:06.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:06.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:06.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:06.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:06.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:06.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:06.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:06.510 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:06.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:11.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:11.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:11.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:11.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:11.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:11.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:11.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:11.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:11.520 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:11.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:11.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:56:11.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:56:11.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:56:11.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:11.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:11.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:11.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:56:11.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:11.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:56:11.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:11.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:56:11.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:56:11.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:11.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:11.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:11.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:56:11.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:11.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:56:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:11.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:11.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:56:11.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:56:11.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:56:11.532 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:56:11.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:11.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:56:12.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:56:12.056 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:56:12.057 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:56:12.058 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:56:12.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:12.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:56:12.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:56:12.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:56:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:56:12.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:12.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:12.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:12.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:12.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:56:13.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:56:13.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:13.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:13.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:13.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:13.932 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:56:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:56:14.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:14.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:14.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:14.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:14.888 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:56:15.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:56:15.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:15.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:15.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:15.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:56:16.319 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:56:16.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:16.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:16.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:16.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:16.797 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:56:17.275 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:56:17.753 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:56:18.231 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:56:18.709 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:56:19.186 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:56:19.664 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:56:20.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:20.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:20.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:20.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:20.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:20.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:20.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:20.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:20.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:20.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:20.078 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:20.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:25.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:25.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:25.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:25.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:25.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:25.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:25.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:25.092 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:25.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:25.093 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:56:25.095 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:25.096 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:25.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:56:25.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:25.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:56:25.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:56:25.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:25.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:25.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:25.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:56:25.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:25.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:56:25.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:25.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:56:25.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:56:25.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:25.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:25.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:25.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:56:25.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:25.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:56:25.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:56:25.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:56:25.107 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:56:25.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:25.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:56:25.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:56:25.634 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:56:25.636 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:56:25.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:56:25.638 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:56:25.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:25.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:25.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:56:25.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:56:25.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:56:25.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:56:25.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:56:25.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:56:26.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:56:26.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:26.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:26.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:26.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:26.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:56:27.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:56:27.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:27.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:27.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:27.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:27.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:56:27.982 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:56:28.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:28.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:28.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:28.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:28.460 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:56:28.938 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:56:29.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:29.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:29.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:29.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:56:29.893 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:56:30.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:30.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:30.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:30.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:56:30.849 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:56:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:56:31.805 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:56:32.283 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:56:32.761 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:56:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:56:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:56:34.194 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:56:34.671 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:56:35.149 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:56:35.626 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:56:36.104 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:56:36.582 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:56:37.060 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:56:37.537 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:56:38.015 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:56:38.493 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:56:38.970 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:56:39.448 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:56:39.925 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:56:40.403 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:56:40.881 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:56:41.359 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:56:41.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:41.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:41.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:41.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:41.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:41.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:41.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:41.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:41.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:41.708 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:41.709 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:46.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:46.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:46.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:46.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:46.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:46.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:46.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:46.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:46.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:46.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:56:46.718 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:56:46.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:56:46.721 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:56:46.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:46.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:46.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:46.722 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:56:46.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:56:46.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:56:46.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:46.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:56:46.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:56:46.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:46.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:46.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:46.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:56:46.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:56:46.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:56:46.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:46.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:56:46.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:56:46.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:46.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:56:46.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:46.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:56:46.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:56:46.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:56:46.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:56:46.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:56:46.731 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:56:46.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:56:46.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:56:47.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:56:47.260 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:56:47.262 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:56:47.264 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:56:47.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:47.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:56:47.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:56:47.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:56:47.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:56:47.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:47.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:47.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:47.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:48.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:56:48.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:56:48.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:48.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:48.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:48.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:49.128 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:56:49.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:56:49.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:49.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:49.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:50.083 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:56:50.560 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:56:50.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:50.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:50.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:56:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:56:51.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:51.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:51.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:51.993 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:56:52.471 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:56:52.948 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:56:53.426 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:56:53.903 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:56:54.381 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:56:54.858 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:56:55.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:56:55.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:56:55.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:56:55.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:56:55.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:56:55.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:56:55.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:56:55.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:56:55.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:56:55.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:56:55.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:56:55.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:56:55.330 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:56:55.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:00.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:00.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:00.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:00.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:00.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:00.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:00.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:00.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:00.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:00.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:00.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:00.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:00.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:00.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:00.341 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:00.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:00.342 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:00.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:00.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:00.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:00.343 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:00.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:00.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:00.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:00.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:00.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:00.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:00.344 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:00.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:00.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:00.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:00.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:00.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:00.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:00.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:00.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:00.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:00.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:00.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:00.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:00.350 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:00.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:00.839 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:00.879 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:00.882 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:00.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:00.884 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:00.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:00.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:00.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:00.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:57:00.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:57:00.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:57:00.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:57:00.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:57:01.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:57:01.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:01.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:01.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:01.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:01.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:57:02.272 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:57:02.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:02.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:02.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:02.750 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:57:03.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:57:03.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:03.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:03.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:03.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:03.706 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:57:04.184 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:57:04.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:04.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:04.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:04.662 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:57:05.139 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:57:05.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:05.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:05.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:05.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:57:06.095 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:57:06.572 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:57:07.050 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:57:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:57:08.004 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:57:08.481 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:57:08.959 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:57:09.436 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:57:09.914 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:57:10.392 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:57:10.869 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:57:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:57:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:57:12.303 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:57:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:57:13.259 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:57:13.736 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:57:14.214 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:57:14.692 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:57:15.170 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:57:15.648 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:57:16.125 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:57:16.603 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:57:16.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:16.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:16.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:16.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:16.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:16.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:16.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:16.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:16.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:16.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:16.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:16.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:16.960 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:16.960 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:16.960 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:16.960 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:16.961 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:16.961 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:16.961 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3547 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:21.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:21.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:21.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:21.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:21.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:21.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:21.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:21.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:21.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:21.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:21.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:21.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:21.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:21.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:21.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:21.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:21.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:21.980 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:21.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:21.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:21.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:21.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:21.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:21.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:21.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:21.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:21.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:21.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:21.984 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:21.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:21.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:22.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:22.508 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:22.510 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:22.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:22.512 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:22.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:22.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:22.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:22.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:22.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:22.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:22.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:22.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:22.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:22.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:22.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:22.543 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:22.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:22.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:22.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:22.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:27.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:27.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:27.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:27.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:27.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:27.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:27.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:27.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:27.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:27.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:27.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:27.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:27.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:27.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:27.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:27.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:27.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:27.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:27.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:27.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:27.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:27.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:27.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:27.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:27.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:27.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:27.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:27.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:27.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:27.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:27.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:27.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:27.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:27.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:27.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:27.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:27.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:27.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:27.574 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:27.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:27.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:28.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:28.100 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:28.102 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:28.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:28.104 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:28.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:28.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:28.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:28.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:28.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:28.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:28.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:28.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:28.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:28.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:28.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:28.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:28.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:28.156 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:28.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:33.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:33.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:33.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:33.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:33.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:33.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:33.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:33.164 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:33.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:33.164 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:33.167 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:33.167 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:33.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:33.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:33.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:33.168 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:33.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:33.168 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:33.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:33.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:33.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:33.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:33.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:33.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:33.171 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:33.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:33.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:33.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:33.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:33.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:33.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:33.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:33.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:33.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:33.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:33.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:33.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:33.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:33.179 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:33.179 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:33.179 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:33.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:33.184 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:33.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:33.711 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:33.713 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:33.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:33.715 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:33.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:33.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:33.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:33.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:33.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:33.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:33.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:33.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:33.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:33.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:33.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:33.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:33.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:33.757 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:33.757 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:38.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:38.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:38.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:38.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:38.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:38.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:38.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:38.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:38.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:38.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:38.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:38.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:38.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:38.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:38.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:38.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:38.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:38.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:38.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:38.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:38.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:38.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:38.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:38.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:38.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:38.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:38.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:38.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:38.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:38.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:38.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:38.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:38.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:38.781 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:38.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:38.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:38.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:39.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:39.313 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:39.315 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:39.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:39.318 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:39.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:39.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:39.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:39.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:39.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:39.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:39.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:39.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:39.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:39.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:39.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:39.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:39.363 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:39.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:39.363 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.363 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.363 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.363 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.364 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.364 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:39.364 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:44.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:44.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:44.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:44.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:44.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:44.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:44.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:44.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:44.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:44.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:44.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:44.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:44.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:44.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:44.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:44.376 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:44.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:44.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:44.379 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:44.379 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:44.379 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:44.384 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:44.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:44.905 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:44.908 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:44.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:44.909 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:44.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:44.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:44.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:44.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:44.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:44.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:44.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:44.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:44.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:44.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:44.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:44.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:44.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:44.964 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:44.964 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:57:49.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:49.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:49.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:49.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:49.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:49.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:49.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:49.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:49.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:49.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:49.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:49.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:49.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:49.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:49.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:49.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:49.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:49.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:49.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:49.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:49.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:49.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:49.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:49.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:49.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:49.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:49.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:49.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:49.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:49.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:49.997 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:49.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:49.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:50.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:50.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:50.526 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:50.528 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:50.530 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:50.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:50.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:50.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:50.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:50.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:50.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:50.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:50.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:50.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:50.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:50.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:50.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:50.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:50.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:50.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:50.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:50.585 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:57:55.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:57:55.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:57:55.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:55.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:55.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:55.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:55.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:57:55.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:55.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:55.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:57:55.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:57:55.605 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:57:55.605 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:57:55.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:55.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:55.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:57:55.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:57:55.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:57:55.607 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:57:55.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:55.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:55.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:57:55.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:57:55.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:55.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:57:55.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:57:55.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:57:55.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:57:55.614 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:57:55.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:57:55.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:57:56.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:57:56.147 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:57:56.149 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:57:56.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:57:56.150 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:57:56.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:57:56.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:57:56.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:57:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:57:56.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:57:56.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:57:56.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:57:56.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:57:56.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:57:56.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:56.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:56.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:56.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:57:57.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:57:57.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:57.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:57.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:57.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:58.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:57:58.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:57:58.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:58.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:58.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:58.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:58.964 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:57:59.442 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:57:59.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:57:59.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:57:59.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:57:59.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:57:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:58:00.397 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:58:00.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:00.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:00.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:00.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:00.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:58:01.353 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:58:01.831 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:58:02.309 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:58:02.786 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:58:03.265 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:58:03.742 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:58:04.220 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 01:58:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 01:58:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 01:58:05.654 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 01:58:06.132 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 01:58:06.610 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 01:58:07.088 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 01:58:07.566 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 01:58:08.043 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 01:58:08.520 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 01:58:08.998 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 01:58:09.476 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 01:58:09.954 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 01:58:10.431 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 01:58:10.910 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 01:58:11.388 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 01:58:11.866 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 01:58:12.343 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 01:58:12.821 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 01:58:13.299 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 01:58:13.777 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 01:58:14.255 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 01:58:14.733 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 01:58:15.211 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 01:58:15.689 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 01:58:16.167 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 01:58:16.644 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 01:58:17.122 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 01:58:17.601 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 01:58:18.078 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 01:58:18.556 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 01:58:19.034 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 01:58:19.511 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 01:58:19.989 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 01:58:20.467 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 01:58:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 01:58:21.422 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 01:58:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 01:58:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 01:58:22.855 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 01:58:23.333 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 01:58:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 01:58:24.288 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 01:58:24.765 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 01:58:25.243 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 01:58:25.721 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 01:58:26.199 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 01:58:26.677 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 01:58:27.155 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 01:58:27.632 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 01:58:28.110 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 01:58:28.588 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 01:58:29.066 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 01:58:29.543 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 01:58:29.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:58:29.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:58:29.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:29.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:29.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:29.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:29.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:29.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:29.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:29.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:29.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:29.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:29.648 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:29.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7266 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:34.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:34.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:34.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:34.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:34.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:34.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:34.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:34.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:34.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:34.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:34.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:58:34.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:58:34.664 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:58:34.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:34.664 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:34.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:34.665 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:58:34.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:34.666 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:58:34.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:34.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:58:34.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:58:34.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:34.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:34.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:34.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:58:34.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:34.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:58:34.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:34.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:34.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:58:34.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:58:34.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:58:34.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:58:34.675 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:58:34.675 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:34.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:58:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:58:35.197 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:58:35.199 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:58:35.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:58:35.201 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:58:35.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:58:35.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:35.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:35.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:35.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:36.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:58:36.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:58:36.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:36.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:36.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:36.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:37.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:58:37.542 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:58:37.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:37.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:37.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:37.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:38.022 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:58:38.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:58:38.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:38.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:38.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:38.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:38.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:38.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:38.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:38.231 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=760 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:38.231 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:43.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:43.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:43.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:43.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:43.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:43.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:43.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:43.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:43.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:43.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:43.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:58:43.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:58:43.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:58:43.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:43.269 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:43.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:43.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:58:43.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:43.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:58:43.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:43.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:58:43.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:58:43.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:43.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:43.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:43.273 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:58:43.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:43.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:58:43.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:43.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:43.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:58:43.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:58:43.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:58:43.280 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:58:43.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:43.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:58:43.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:58:43.811 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:58:43.813 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:58:43.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:58:43.814 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:58:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:58:44.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:44.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:44.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:44.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:44.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:58:45.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:58:45.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:45.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:45.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:45.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:45.691 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:58:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:58:46.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:46.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:46.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:46.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:46.654 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:58:47.135 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:58:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:47.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:47.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:58:48.096 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:58:48.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:48.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:48.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:48.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:48.576 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:58:49.057 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:58:49.538 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:58:49.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:49.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:49.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:49.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:49.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:49.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:49.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:49.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:49.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:49.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:49.829 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:49.829 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1391 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:58:54.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:58:54.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:58:54.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:54.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:54.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:54.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:54.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:58:54.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:54.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:54.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:58:54.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:58:54.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:58:54.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:58:54.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:54.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:54.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:58:54.849 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:58:54.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:58:54.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:58:54.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:54.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:58:54.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:58:54.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:54.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:58:54.854 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:58:54.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:58:54.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:58:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:54.856 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:58:54.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:58:54.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:54.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:58:54.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:58:54.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:58:54.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:58:54.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:58:54.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:54.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:58:54.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:58:54.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:58:54.863 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:58:54.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:58:54.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:58:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:58:55.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:58:55.400 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:58:55.402 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:58:55.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:58:55.404 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:58:55.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:58:55.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:55.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:55.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:55.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:58:56.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:58:56.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:56.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:56.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:56.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:57.269 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:58:57.749 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:58:57.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:57.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:57.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:57.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:58.230 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:58:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:58:58.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:58.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:58.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:58.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:58:59.192 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:58:59.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:58:59.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:58:59.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:58:59.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:58:59.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:00.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:59:00.634 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:59:01.113 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:59:01.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:01.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:01.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:01.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:01.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:01.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:01.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:01.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:01.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:01.423 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:01.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:01.424 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:06.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:06.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:06.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:06.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:06.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:06.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:06.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:06.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:06.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:06.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:06.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:06.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:06.440 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:06.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:06.440 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:06.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:06.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:06.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:06.442 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:06.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:06.443 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:06.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:06.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:06.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:06.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:06.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:06.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:06.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:06.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:06.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:06.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:06.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:06.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:06.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:06.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:06.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:06.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:06.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:06.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:06.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:06.450 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:06.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:06.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:06.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:06.988 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:06.990 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:06.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:06.992 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:07.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:59:07.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:07.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:07.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:07.900 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:59:08.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:59:08.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:08.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:08.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:08.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:08.859 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:59:09.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:59:09.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:09.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:09.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:09.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:59:10.292 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:59:10.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:10.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:10.769 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:59:11.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:59:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:11.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:11.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:11.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:11.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:59:12.208 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:59:12.689 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:59:13.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:13.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:13.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:13.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:13.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:13.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:13.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:13.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:13.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:13.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:13.009 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:13.009 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:18.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:18.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:18.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:18.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:18.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:18.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:18.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:18.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:18.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:18.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:18.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:18.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:18.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:18.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:18.024 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:18.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:18.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:18.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:18.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:18.026 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:18.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:18.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:18.028 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:18.028 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:18.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:18.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:18.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:18.031 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:18.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:18.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:18.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:18.556 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:18.558 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:18.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:18.560 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:19.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:59:19.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:19.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:19.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:19.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:59:19.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:59:20.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:20.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:20.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:20.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:20.439 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:59:20.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:59:21.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:21.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:21.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:21.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:59:21.880 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:59:22.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:22.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:22.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:22.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:22.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:59:22.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:22.838 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 01:59:23.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:23.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:23.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:23.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:23.319 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 01:59:23.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 01:59:24.274 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 01:59:24.751 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 01:59:25.230 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 01:59:25.709 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 01:59:26.189 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:26.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:26.593 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:26.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:26.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:26.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:26.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:26.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:31.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:31.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:31.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:31.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:31.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:31.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:31.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:31.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:31.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:31.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:31.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:31.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:31.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:31.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:31.612 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:31.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:31.613 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:31.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:31.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:31.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:31.614 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:31.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:31.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:31.615 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:31.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:31.615 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:31.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:31.615 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:31.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:31.617 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:31.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:31.617 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:31.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:31.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:31.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:31.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:31.621 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:31.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:31.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:32.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:32.158 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:32.161 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:32.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:32.162 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:32.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:59:32.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:32.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:32.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:32.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:33.070 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:59:33.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:59:33.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:33.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:33.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:33.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:34.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 01:59:34.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 01:59:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:34.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:34.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:34.990 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 01:59:35.469 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 01:59:35.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:35.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:35.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:35.943 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 01:59:36.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:36.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:36.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:36.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:36.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:36.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:36.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:36.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:36.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:36.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:36.173 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:36.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=970 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:41.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:41.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:41.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:41.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:41.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:41.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:41.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:41.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:41.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:41.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:41.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:41.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:41.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:41.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:41.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:41.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:41.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:41.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:41.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:41.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:41.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:41.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:41.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:41.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:41.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:41.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:41.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:41.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:41.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:41.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:41.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:41.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:41.202 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:41.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:41.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:41.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:41.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:41.727 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:41.728 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:41.729 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:41.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:41.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:41.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:41.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:41.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:41.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:41.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:41.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:41.743 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:41.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:41.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:41.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:46.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:46.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:46.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:46.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:46.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:46.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:46.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:46.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:46.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:46.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:46.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:46.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:46.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:46.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:46.747 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:46.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:46.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:46.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:46.749 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:46.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:46.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:46.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:46.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:47.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:47.270 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:47.270 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:47.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:47.272 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:47.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:47.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:47.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:47.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:47.292 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:47.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:47.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:47.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:52.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:52.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:52.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:52.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:52.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:52.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:52.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:52.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:52.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:52.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:52.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:52.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:52.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:52.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:52.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:52.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:52.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:52.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:52.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:52.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:52.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:52.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:52.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:52.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:52.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:52.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:52.318 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:52.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:52.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:52.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:52.846 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:52.849 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:52.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:52.850 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:52.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:52.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:52.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:52.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:52.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:52.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:52.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:52.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:52.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:52.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:52.867 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:52.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 01:59:57.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 01:59:57.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 01:59:57.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:57.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:57.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:57.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:57.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 01:59:57.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:57.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:57.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 01:59:57.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 01:59:57.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 01:59:57.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 01:59:57.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:57.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:57.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 01:59:57.884 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 01:59:57.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 01:59:57.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 01:59:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:57.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 01:59:57.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 01:59:57.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:57.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:57.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 01:59:57.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 01:59:57.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 01:59:57.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 01:59:57.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:57.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 01:59:57.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 01:59:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:57.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 01:59:57.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 01:59:57.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 01:59:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 01:59:57.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 01:59:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:57.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 01:59:57.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 01:59:57.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 01:59:57.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 01:59:57.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 01:59:57.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 01:59:57.894 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 01:59:57.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 01:59:57.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 01:59:58.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 01:59:58.431 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 01:59:58.434 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 01:59:58.436 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 01:59:58.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 01:59:58.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 01:59:58.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 01:59:58.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 01:59:58.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 01:59:58.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 01:59:58.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 01:59:58.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 01:59:58.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 01:59:58.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 01:59:58.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:58.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:58.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:58.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 01:59:59.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 01:59:59.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 01:59:59.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 01:59:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 01:59:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 01:59:59.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:00.301 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:00.778 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:00.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:00.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:00.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:00.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:01.256 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:00:01.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:01.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:01.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:01.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:01.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:01.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:01.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:01.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:01.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:01.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:01.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:01.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:01.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:01.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:01.536 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:00:01.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:01.536 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:06.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:06.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:06.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:06.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:06.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:06.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:06.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:06.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:06.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:06.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:06.548 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:00:06.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:00:06.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:00:06.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:06.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:06.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:06.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:00:06.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:06.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:00:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:06.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:00:06.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:00:06.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:06.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:06.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:06.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:00:06.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:06.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:00:06.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:06.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:00:06.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:00:06.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:06.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:06.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:06.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:00:06.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:06.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:00:06.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:00:06.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:00:06.562 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:00:06.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:00:06.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:06.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:00:07.050 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:00:07.095 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:00:07.098 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:00:07.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:07.100 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:00:07.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:07.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:07.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:00:07.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:07.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:07.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:07.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:00:07.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:00:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:00:07.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:07.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:07.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:07.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:08.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:00:08.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:00:08.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:08.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:08.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:08.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:08.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:09.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:09.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:09.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:09.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:09.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:09.915 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:00:10.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:10.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:10.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:10.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:10.394 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:00:10.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:10.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:10.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:10.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:10.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:00:10.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:10.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:10.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:10.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:10.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:10.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:10.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:10.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:10.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:10.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:10.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:10.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:10.892 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:00:10.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:10.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:15.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:15.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:15.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:15.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:15.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:15.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:15.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:15.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:15.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:15.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:15.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:00:15.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:00:15.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:00:15.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:15.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:15.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:00:15.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:15.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:00:15.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:15.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:00:15.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:00:15.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:15.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:15.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:15.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:00:15.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:15.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:00:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:15.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:15.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:00:15.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:00:15.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:00:15.921 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:00:15.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:15.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:00:16.410 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:00:16.458 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:00:16.460 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:00:16.462 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:00:16.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:16.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:16.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:16.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:00:16.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:16.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:16.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:16.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:00:16.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:00:16.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:00:16.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:16.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:16.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:16.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:17.365 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:00:17.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:00:17.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:17.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:17.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:17.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:18.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:18.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:18.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:18.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:19.277 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:00:19.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:19.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:19.755 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:00:19.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:19.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:19.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:19.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:20.232 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:00:20.710 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:00:20.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:20.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:20.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:20.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:21.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:00:21.665 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:00:22.143 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:00:22.620 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:00:23.098 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:00:23.575 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:00:24.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:00:24.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:24.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:24.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:24.531 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:00:24.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:24.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:24.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:24.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:24.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:24.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:24.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:24.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:24.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:24.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:24.543 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:24.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:00:29.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:29.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:29.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:29.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:29.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:29.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:29.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:29.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:29.557 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:29.557 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:29.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:00:29.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:00:29.561 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:00:29.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:29.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:29.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:29.562 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:00:29.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:29.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:00:29.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:29.564 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:00:29.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:29.564 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:00:29.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:29.566 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:00:29.566 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:00:29.566 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:29.566 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:29.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:29.566 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:00:29.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:29.567 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:00:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:00:29.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:00:29.570 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:00:29.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:29.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:00:30.059 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:00:30.108 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:00:30.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:30.111 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:00:30.114 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:30.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:30.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:00:30.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:00:30.536 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:00:30.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:30.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:30.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:30.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:00:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:00:31.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:31.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:31.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:31.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:32.447 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:32.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:32.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:32.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:32.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:32.925 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:00:33.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:33.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:33.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:33.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:33.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:00:33.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:33.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:33.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:33.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:00:34.359 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:00:34.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:34.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:34.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:34.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:00:35.314 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:00:35.792 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:00:36.270 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:00:36.748 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:00:37.226 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:00:37.704 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:00:38.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:38.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:38.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:38.181 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:00:38.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:38.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:38.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:38.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:38.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:38.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:38.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:38.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:38.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:38.187 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:00:38.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:43.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:43.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:43.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:43.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:43.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:43.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:43.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:43.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:43.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:43.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:43.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:00:43.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:00:43.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:00:43.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:43.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:43.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:43.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:00:43.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:43.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:00:43.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:43.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:00:43.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:00:43.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:43.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:43.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:43.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:00:43.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:43.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:00:43.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:43.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:43.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:43.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:00:43.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:43.208 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:00:43.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:00:43.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:00:43.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:00:43.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:00:43.209 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:00:43.209 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:00:43.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:43.214 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:00:43.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:00:43.737 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:00:43.739 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:00:43.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:43.741 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:00:43.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:43.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:43.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:00:43.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:43.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:43.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:43.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:00:43.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:00:44.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:00:44.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:44.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:44.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:00:45.131 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:00:45.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:45.609 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:46.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:46.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:46.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:46.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:46.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:46.565 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:00:46.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:46.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:46.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:46.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:47.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:00:47.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:47.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:47.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:47.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:47.521 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:00:47.998 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:00:48.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:48.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:48.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:48.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:48.476 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:00:48.954 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:00:49.432 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:00:49.910 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:00:50.388 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:00:50.866 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:00:51.344 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:00:51.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:51.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:51.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:51.822 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:00:51.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:51.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:51.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:51.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:51.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:51.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:51.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:51.831 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:00:56.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:00:56.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:00:56.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:56.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:56.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:56.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:56.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:00:56.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:56.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:56.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:00:56.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:00:56.851 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:00:56.851 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:00:56.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:56.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:56.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:00:56.853 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:00:56.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:00:56.853 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:00:56.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:56.854 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:00:56.854 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:00:56.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:56.854 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:56.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:00:56.855 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:00:56.855 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:00:56.855 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:00:56.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:56.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:00:56.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:00:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:00:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:00:56.861 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:00:56.861 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:00:56.861 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:00:56.866 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:00:57.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:00:57.389 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:00:57.391 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:00:57.394 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:00:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:00:57.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:00:57.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:00:57.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:00:57.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:57.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:57.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:57.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:00:57.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:00:57.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:00:57.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:00:57.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:57.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:00:57.827 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:00:57.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:57.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:57.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:57.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:58.305 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:00:58.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:00:58.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:58.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:58.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:58.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:00:59.260 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:00:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:00:59.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:00:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:00:59.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:00:59.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:01:00.694 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:01:00.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:00.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:00.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:00.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:01:01.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:01:01.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:01.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:01.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:01.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:02.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:01:02.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:02.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:02.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:02.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:02.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:02.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:02.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:02.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:02.454 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:02.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.454 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:02.455 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:01:07.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:07.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:07.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:07.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:07.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:07.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:07.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:07.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:07.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:07.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:07.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:07.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:07.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:07.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:07.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:07.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:07.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:07.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:07.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:07.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:07.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:07.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:07.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:07.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:07.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:07.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:07.482 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:07.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:07.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:07.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:07.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:08.023 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:08.026 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:08.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:08.028 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:08.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:08.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:08.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:08.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:08.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:08.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:08.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:08.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:08.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:01:08.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:08.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:08.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:08.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:08.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:01:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:01:09.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:09.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:09.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:09.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:09.833 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:01:10.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:01:10.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:10.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:10.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:01:11.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:11.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:11.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:11.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:11.241 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:01:11.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:11.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:11.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:11.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:01:12.177 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:01:12.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:12.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:12.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:12.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:12.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:01:13.114 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:01:13.581 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:01:13.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:13.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:13.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:13.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:13.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:13.629 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:18.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:18.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:18.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:18.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:18.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:18.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:18.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:18.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:18.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:18.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:18.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:18.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:18.638 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:18.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:18.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:18.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:18.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:18.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:18.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:18.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:18.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:18.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:18.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:18.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:18.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:18.642 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:18.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:18.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:18.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:19.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:19.156 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:19.157 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:19.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:19.157 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:19.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:19.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:19.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:19.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:01:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:19.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:19.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:19.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:20.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:01:20.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:01:20.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:20.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:20.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:20.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:20.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:01:21.462 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:01:21.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:21.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:21.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:21.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:21.930 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:01:22.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:22.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:22.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:22.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:22.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:22.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:22.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:22.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:22.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:22.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:22.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:22.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:22.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:22.243 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:27.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:27.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:27.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:27.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:27.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:27.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:27.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:27.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:27.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:27.248 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:27.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:27.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:27.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:27.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:27.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:27.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:27.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:27.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:27.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:27.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:27.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:27.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:27.253 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:27.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:27.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:27.766 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:27.767 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:27.767 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:27.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:27.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:27.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:27.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:01:28.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:28.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:28.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:28.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:28.664 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:01:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:01:29.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:29.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:29.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:29.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:29.603 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:01:30.073 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:01:30.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:30.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:30.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:30.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:30.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:01:30.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:30.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:30.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:30.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:30.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:30.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:30.858 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:35.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:35.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:35.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:35.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:35.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:35.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:35.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:35.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:35.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:35.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:35.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:35.865 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:35.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:35.866 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:35.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:35.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:35.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:35.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:35.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:35.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:35.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:35.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:35.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:35.871 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:35.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:36.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:36.386 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:36.386 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:36.386 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:36.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:36.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:36.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:36.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:36.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:36.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:36.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:36.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:36.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:36.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:36.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:36.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:36.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:36.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:36.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:36.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:36.662 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:41.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:41.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:41.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:41.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:41.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:41.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:41.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:41.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:41.666 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:41.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:41.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:41.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:41.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:41.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:41.668 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:41.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:41.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:41.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:41.669 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:41.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:41.669 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:41.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:41.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:41.670 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:41.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:42.146 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:42.183 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:42.183 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:42.184 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:42.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:42.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:42.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:42.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:42.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:42.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:42.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:42.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:42.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:42.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:42.227 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:01:47.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:47.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:47.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:47.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:47.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:47.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:47.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:47.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:47.232 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:47.232 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:01:47.232 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:47.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:01:47.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:01:47.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:47.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:01:47.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:47.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:47.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:01:47.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:01:47.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:01:47.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:01:47.236 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:01:47.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:01:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:01:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:01:47.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:01:47.749 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:01:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:01:47.750 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:01:47.750 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:01:47.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:47.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:01:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:01:47.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:01:47.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:01:47.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:01:47.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:01:48.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:01:48.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:48.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:48.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:48.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:48.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:01:49.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:01:49.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:49.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:49.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:49.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:49.589 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:01:50.059 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:01:50.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:50.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:50.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:50.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:01:51.001 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:01:51.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:51.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:51.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:51.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:51.472 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:01:51.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:01:52.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:52.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:52.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:52.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:52.413 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:01:52.884 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:01:53.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:01:53.825 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:01:54.296 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:01:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:01:55.238 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:01:55.709 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:01:56.180 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:01:56.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:01:56.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:01:56.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:01:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:01:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:01:56.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:01:56.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:01:56.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:01:56.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:01:56.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:01:56.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:01:56.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:01:56.510 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:01.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:01.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:01.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:01.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:01.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:01.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:01.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:01.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:01.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:01.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:01.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:01.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:01.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:01.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:01.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:01.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:01.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:01.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:01.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:01.517 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:01.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:01.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:01.518 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:01.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:01.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:02:01.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:02:02.031 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:02:02.031 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:02:02.032 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:02.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:02:02.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:02:02.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:02:02.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:02:02.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:02:02.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:02:02.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:02:02.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:02:02.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:02:02.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:02.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:02.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:02.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:02:03.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:02:03.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:03.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:03.877 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:02:04.348 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:02:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:04.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:04.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:04.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:04.819 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:02:05.290 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:02:05.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:05.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:05.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:05.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:05.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:02:06.231 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:02:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:06.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:06.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:06.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:02:07.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:02:07.644 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:02:08.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:02:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:02:09.056 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:02:09.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:02:09.997 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:02:10.468 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:02:10.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:02:10.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:02:10.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:10.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:10.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:10.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:10.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:10.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:10.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:10.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:10.762 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:10.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:10.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:15.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:15.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:15.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:15.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:15.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:15.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:15.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:15.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:15.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:15.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:15.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:15.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:15.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:15.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:15.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:15.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:15.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:15.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:15.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:15.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:15.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:15.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:15.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:15.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:15.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:15.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:15.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:15.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:15.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:15.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:15.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:15.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:15.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:15.786 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:15.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:02:16.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:02:16.316 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:02:16.318 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:02:16.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:16.321 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:16.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:02:16.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:02:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:02:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:02:16.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:02:16.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:02:16.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:02:16.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:02:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:02:16.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:16.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:17.228 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:02:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:02:17.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:17.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:17.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:17.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:02:18.656 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:02:18.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:18.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:18.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:18.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:02:19.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:02:19.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:02:19.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:02:19.367 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:02:19.414 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.455 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.495 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.532 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.573 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.596 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:02:19.617 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.653 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.696 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.734 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.771 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:19.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:19.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:19.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:19.812 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.854 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:19.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:02:19.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:02:19.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:19.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:19.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:19.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:19.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:19.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:19.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:19.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:19.894 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:24.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:24.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:24.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:24.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:24.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:24.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:24.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:24.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:24.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:24.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:24.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:24.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:24.907 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:24.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:24.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:24.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:24.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:24.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:24.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:24.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:24.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:24.911 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:24.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:24.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:24.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:02:25.397 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:02:25.433 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:02:25.434 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:02:25.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:25.436 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:25.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:25.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:25.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:25.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:25.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:25.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:25.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:25.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:25.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:25.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:25.573 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:25.573 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:30.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:30.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:30.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:30.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:30.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:30.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:30.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:30.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:30.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:30.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:30.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:30.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:30.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:30.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:30.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:30.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:30.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:30.583 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:30.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:30.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:02:31.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:02:31.104 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:02:31.105 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:02:31.105 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:31.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:31.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:02:31.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:31.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:31.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:31.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:32.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:02:32.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:02:32.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:32.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:32.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:32.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:32.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:02:33.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:02:33.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:33.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:33.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:33.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:02:34.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:02:34.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:34.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:34.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:34.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:34.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:02:35.327 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:02:35.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:35.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:35.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:35.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:35.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:02:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:02:36.749 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:02:37.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:02:37.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:02:38.163 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:02:38.632 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:02:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:02:39.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:02:40.047 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:02:40.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:40.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:40.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:40.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:40.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:40.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:40.128 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:45.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:45.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:45.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:45.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:45.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:45.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:45.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:45.133 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:45.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:45.134 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:45.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:45.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:45.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:45.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:45.136 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:45.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:45.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:45.137 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:45.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:45.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:02:45.613 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:02:45.664 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:02:45.665 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:02:45.665 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:02:45.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:46.082 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:02:46.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:46.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:46.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:46.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:02:47.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:02:47.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:47.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:47.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:47.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:47.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:02:47.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:02:48.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:48.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:48.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:48.456 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:02:48.932 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:02:49.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:49.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:49.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:49.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:49.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:02:49.885 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:02:50.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:50.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:50.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:50.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:50.361 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:02:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:02:51.313 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:02:51.788 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:02:52.263 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:02:52.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:02:53.213 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:02:53.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:02:54.151 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:02:54.623 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:02:54.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:02:54.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:54.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:54.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:54.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:54.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:54.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:54.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:54.681 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:02:54.681 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:54.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2055 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:02:59.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:02:59.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:02:59.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:59.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:59.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:59.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:59.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:02:59.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:59.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:59.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:02:59.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:02:59.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:02:59.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:02:59.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:59.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:59.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:02:59.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:02:59.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:02:59.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:02:59.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:59.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:02:59.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:02:59.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:02:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:02:59.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:02:59.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:02:59.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:59.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:02:59.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:02:59.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:02:59.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:02:59.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:02:59.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:02:59.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:02:59.710 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:02:59.710 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:02:59.710 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:02:59.715 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:00.193 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:00.241 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:00.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:00.244 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:00.245 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:00.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:00.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:00.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:00.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:00.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:01.133 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:01.606 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:01.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:01.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:01.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:01.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:02.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:02.544 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:03:02.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:02.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:02.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:02.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:03.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:03:03.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:03.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:03.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:03.282 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:03.282 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:03.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:08.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:08.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:08.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:08.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:08.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:08.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:08.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:08.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:08.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:08.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:08.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:08.288 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:08.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:08.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:08.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:08.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:08.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:08.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:08.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:08.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:08.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:08.291 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:08.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:08.296 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:08.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:08.804 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:08.804 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:08.805 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:08.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:08.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:08.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:08.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:03:08.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:08.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:08.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:08.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:03:08.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:03:08.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:08.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:08.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:08.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:08.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:09.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:09.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:09.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:09.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:09.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:09.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:09.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:09.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:09.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:09.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:09.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:09.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:09.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:09.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:09.265 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:09.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:09.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:14.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:14.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:14.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:14.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:14.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:14.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:14.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:14.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:14.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:14.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:14.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:14.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:14.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:14.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:14.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:14.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:14.281 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:14.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:14.282 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:14.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:14.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:14.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:14.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:14.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:14.285 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:14.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:14.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:14.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:14.289 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:14.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:14.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:14.815 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:14.817 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:14.818 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:14.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:14.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:14.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:14.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:14.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:14.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:14.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:14.829 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:19.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:19.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:19.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:19.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:19.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:19.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:19.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:19.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:19.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:19.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:19.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:19.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:19.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:19.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:19.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:19.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:19.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:19.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:19.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:19.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:19.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:19.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:19.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:19.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:19.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:19.852 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:19.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:19.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:19.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:19.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:19.856 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:19.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:19.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:20.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:20.380 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:20.381 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:20.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:20.382 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:20.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:20.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:20.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:20.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:20.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:21.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:21.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:21.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:22.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:22.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:22.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:22.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:22.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:22.399 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:22.399 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=542 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:27.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:27.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:27.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:27.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:27.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:27.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:27.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:27.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:27.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:27.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:27.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:27.415 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:27.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:27.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:27.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:27.416 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:27.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:27.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:27.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:27.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:27.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:27.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:27.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:27.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:27.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:27.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:27.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:27.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:27.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:27.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:27.420 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:27.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:27.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:27.944 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:27.946 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:27.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:27.947 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:27.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:27.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:27.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:03:27.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:27.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:27.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:27.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:03:27.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:03:28.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:28.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:28.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:28.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:28.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:28.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:29.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:29.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:29.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:29.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:29.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:29.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:30.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:03:30.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:30.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:30.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:30.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:30.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:03:30.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:30.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:30.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:30.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:30.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:30.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:30.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:30.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:30.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:30.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:30.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:30.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:30.801 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:30.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:35.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:35.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:35.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:35.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:35.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:35.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:35.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:35.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:35.815 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:35.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:35.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:35.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:35.818 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:35.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:35.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:35.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:35.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:35.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:35.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:35.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:35.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:35.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:35.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:35.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:35.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:35.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:35.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:35.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:35.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:35.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:35.824 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:35.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:35.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:35.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:35.828 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:35.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:36.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:36.353 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:36.354 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:36.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:36.356 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:36.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:36.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:36.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:03:36.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:36.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:36.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:36.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:03:36.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:03:36.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:36.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:36.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:36.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:36.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:37.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:37.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:37.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:37.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:38.226 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:38.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:38.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:38.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:38.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:38.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:38.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:38.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:38.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:38.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:38.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:38.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:38.489 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:38.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:38.489 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:38.490 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:43.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:43.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:43.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:43.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:43.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:43.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:43.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:43.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:43.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:43.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:43.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:43.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:43.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:43.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:43.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:43.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:43.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:43.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:43.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:43.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:43.507 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:43.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:43.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:43.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:43.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:43.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:43.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:43.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:43.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:43.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:43.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:43.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:43.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:43.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:43.515 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:43.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:43.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:44.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:44.050 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:44.052 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:44.055 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:44.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:44.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:44.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:03:44.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:44.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:44.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:44.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:03:44.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:03:44.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:44.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:44.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:44.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:44.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:44.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:45.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:45.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:45.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:45.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:45.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:45.914 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:46.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:03:46.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:46.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:46.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:46.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:46.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:03:46.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:46.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:46.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:46.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:46.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:46.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:46.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:46.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:46.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:46.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:46.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:46.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:46.893 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:46.893 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:03:51.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:51.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:51.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:51.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:51.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:51.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:51.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:51.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:51.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:51.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:51.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:51.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:51.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:51.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:51.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:51.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:51.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:51.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:51.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:51.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:51.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:51.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:51.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:51.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:51.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:51.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:51.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:51.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:51.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:51.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:51.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:51.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:51.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:51.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:51.925 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:51.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:51.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:03:52.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:03:52.456 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:03:52.458 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:03:52.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:03:52.460 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:03:52.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:52.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:52.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:03:52.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:03:52.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:03:52.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:03:52.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:03:52.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:03:52.890 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:03:52.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:52.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:52.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:52.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:53.367 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:03:53.845 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:03:53.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:53.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:53.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:53.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:54.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:03:54.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:03:54.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:03:54.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:54.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:54.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:54.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:54.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:54.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:54.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:54.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:54.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:54.581 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:03:54.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:59.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:03:59.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:03:59.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:59.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:59.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:59.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:59.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:03:59.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:59.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:59.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:03:59.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:03:59.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:03:59.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:03:59.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:59.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:59.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:03:59.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:03:59.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:03:59.599 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:59.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:03:59.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:03:59.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:03:59.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:03:59.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:03:59.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:59.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:03:59.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:03:59.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:03:59.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:03:59.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:03:59.606 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:03:59.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:03:59.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:00.093 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:00.141 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:00.143 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:00.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:00.145 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:00.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:00.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:00.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:00.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:04:00.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:04:00.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:04:00.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:04:00.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:04:00.570 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:04:00.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:00.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:00.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:00.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:01.048 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:04:01.526 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:04:01.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:01.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:01.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:01.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:02.003 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:04:02.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:04:02.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:02.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:02.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:02.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:02.958 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:04:03.436 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:04:03.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:03.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:03.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:03.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:03.913 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:04:03.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:03.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:03.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:03.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:03.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:03.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:03.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:03.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:03.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:03.942 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.943 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.943 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:03.943 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:08.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:08.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:08.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:08.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:08.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:08.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:08.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:08.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:08.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:08.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:08.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:08.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:08.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:08.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:08.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:08.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:08.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:08.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:08.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:08.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:08.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:08.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:08.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:08.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:08.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:08.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:08.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:08.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:08.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:08.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:08.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:08.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:08.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:08.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:08.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:08.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:08.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:08.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:08.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:08.988 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:08.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:08.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:09.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:09.520 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:09.523 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:09.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:09.525 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:09.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:09.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:09.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:09.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:04:09.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:04:09.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:04:09.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:04:09.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:04:09.952 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:04:09.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:09.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:09.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:09.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:10.430 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:04:10.908 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:04:10.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:10.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:10.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:11.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:11.386 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:04:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:04:11.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:11.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:12.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:12.341 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:04:12.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:12.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:12.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:12.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:12.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:12.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:12.602 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:12.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:12.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.603 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:12.603 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:17.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:17.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:17.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:17.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:17.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:17.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:17.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:17.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:17.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:17.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:17.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:17.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:17.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:17.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:17.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:17.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:17.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:17.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:17.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:17.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:17.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:17.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:17.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:17.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:17.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:17.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:17.628 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:17.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:18.148 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:18.149 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:18.150 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:18.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:04:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:18.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:18.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:18.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:19.052 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:04:19.530 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:04:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:19.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:19.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:19.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:19.999 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:04:20.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:20.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:20.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:20.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:20.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:20.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:20.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:20.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:20.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:20.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:20.162 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:20.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=547 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:25.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:25.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:25.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:25.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:25.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:25.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:25.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:25.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:25.180 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:25.180 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:25.181 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:25.185 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:25.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:25.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:25.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:25.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:25.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:25.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:25.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:25.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:25.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:25.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:25.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:25.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:25.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:25.190 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:25.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:25.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:25.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:25.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:25.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:25.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:25.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:25.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:25.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:25.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:25.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:25.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:25.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:25.197 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:25.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:25.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:25.729 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:25.730 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:25.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:25.731 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:25.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:25.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:25.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:25.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:25.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:26.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:04:26.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:26.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:26.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:26.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:26.623 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:04:27.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:04:27.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:27.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:27.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:27.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:27.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:04:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:04:28.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:28.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:28.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:28.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:28.539 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:04:28.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:28.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:28.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:28.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:28.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:28.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:28.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:28.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:28.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:28.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:28.800 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:28.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:28.800 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.800 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.800 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.800 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:28.801 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:33.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:33.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:33.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:33.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:33.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:33.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:33.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:33.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:33.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:33.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:33.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:33.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:33.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:33.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:33.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:33.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:33.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:33.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:33.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:33.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:33.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:33.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:33.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:33.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:33.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:33.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:33.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:33.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:33.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:33.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:33.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:33.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:33.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:33.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:33.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:33.835 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:33.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:33.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:33.840 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:34.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:34.392 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:34.395 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:34.397 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:34.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:34.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:34.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:34.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:34.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:34.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:34.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:34.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:34.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:34.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:34.445 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:34.445 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:34.446 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:34.446 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:34.446 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:34.446 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:34.446 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:39.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:39.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:39.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:39.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:39.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:39.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:39.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:39.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:39.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:39.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:39.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:39.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:39.480 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:39.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:39.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:39.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:39.481 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:39.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:39.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:39.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:39.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:39.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:39.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:39.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:39.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:39.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:39.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:39.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:39.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:39.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:39.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:39.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:39.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:39.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:39.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:39.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:39.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:39.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:39.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:39.496 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:39.496 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:39.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:39.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:40.029 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:40.032 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:40.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:40.034 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:40.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:40.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:40.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:40.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:40.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:40.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:04:40.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:40.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:40.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:40.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:40.922 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:04:41.397 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:04:41.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:41.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:41.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:41.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:04:42.359 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:04:42.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:42.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:42.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:42.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:42.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:04:43.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:43.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:43.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:43.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:43.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:43.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:43.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:43.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:43.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:43.086 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:48.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:48.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:48.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:48.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:48.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:48.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:48.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:48.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:48.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:48.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:48.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:48.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:48.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:48.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:48.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:48.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:48.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:48.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:48.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:48.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:48.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:48.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:48.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:48.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:48.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:48.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:48.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:48.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:48.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:48.116 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:48.644 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:48.647 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:48.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:48.649 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:48.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:04:48.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:04:48.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:04:48.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:48.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:48.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:48.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:48.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:48.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:48.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:48.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:48.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:48.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:48.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:48.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:48.712 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:48.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:48.713 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:53.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:53.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:53.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:53.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:53.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:53.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:53.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:53.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:53.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:53.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:53.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:53.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:53.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:53.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:53.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:53.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:53.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:53.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:53.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:53.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:53.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:53.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:53.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:53.732 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:53.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:53.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:53.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:53.734 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:53.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:53.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:54.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:54.256 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:54.257 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:54.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:54.259 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:54.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:54.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:54.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:54.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:54.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:54.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:54.269 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:54.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:54.270 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:59.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:59.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:59.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:59.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:59.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:59.288 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:59.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:04:59.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:04:59.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:04:59.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:04:59.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:59.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:59.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:59.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:04:59.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:04:59.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:04:59.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:59.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:59.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:04:59.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:04:59.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:59.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:04:59.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:04:59.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:04:59.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:04:59.301 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:04:59.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:04:59.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:04:59.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:04:59.827 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:04:59.828 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:04:59.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:04:59.829 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:04:59.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:04:59.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:04:59.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:04:59.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:04:59.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:04:59.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:04:59.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:04:59.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:04:59.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:04:59.840 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:04:59.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:04:59.840 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:04.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:04.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:04.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:04.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:04.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:04.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:04.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:04.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:04.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:04.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:04.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:04.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:04.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:04.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:04.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:04.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:04.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:04.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:04.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:04.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:04.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:04.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:04.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:04.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:04.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:04.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:04.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:04.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:04.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:04.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:04.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:04.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:04.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:04.866 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:04.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:04.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:05.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:05.391 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:05.393 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:05.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:05.394 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:05.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:05.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:05.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:05.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:05.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:05.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:05.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:05.408 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:05.408 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:10.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:10.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:10.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:10.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:10.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:10.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:10.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:10.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:10.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:10.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:10.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:10.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:10.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:10.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:10.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:10.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:10.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:10.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:10.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:10.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:10.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:10.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:10.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:10.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:10.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:10.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:10.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:10.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:10.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:10.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:10.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:10.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:10.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:10.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:10.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:10.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:10.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:10.436 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:10.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:10.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:10.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:10.971 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:10.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:10.974 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:10.976 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:10.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:10.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:10.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:10.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:10.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:10.988 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:10.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:10.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:10.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:10.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:15.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:15.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:15.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:15.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:15.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:15.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:16.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:16.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:16.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:16.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:16.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:16.003 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:16.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:16.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:16.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:16.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:16.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:16.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:16.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:16.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:16.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:16.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:16.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:16.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:16.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:16.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:16.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:16.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:16.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:16.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:16.013 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:16.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:16.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:16.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:16.536 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:16.537 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:16.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:16.538 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:16.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:05:17.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:17.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:17.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:17.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:17.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:05:17.938 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:05:18.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:18.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:18.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:18.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:18.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:05:18.898 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:05:19.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:19.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:19.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:19.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:05:19.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:19.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:19.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:05:19.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:05:19.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:05:19.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:05:19.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:05:19.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:05:19.858 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:05:20.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:20.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:20.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:20.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:20.336 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:05:20.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:05:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:21.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:21.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:21.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:21.293 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:05:21.771 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:05:21.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:21.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:21.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:21.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:21.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:21.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:21.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:21.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:21.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:21.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:21.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:21.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:21.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:21.903 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:21.903 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.903 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.904 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.904 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.904 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.904 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:21.904 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:26.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:26.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:26.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:26.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:26.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:26.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:26.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:26.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:26.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:26.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:26.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:26.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:26.922 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:26.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:26.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:26.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:26.923 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:26.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:26.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:26.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:26.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:26.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:26.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:26.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:26.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:26.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:26.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:26.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:26.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:26.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:26.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:26.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:26.931 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:26.931 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:26.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:26.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:27.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:27.458 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:27.458 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:27.460 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:27.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:27.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:27.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:27.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:05:27.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:27.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:27.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:27.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:27.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:27.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:27.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:27.509 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:27.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:32.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:32.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:32.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:32.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:32.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:32.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:32.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:32.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:32.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:32.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:32.511 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:32.511 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:32.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:32.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:32.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:32.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:32.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:32.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:32.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:32.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:32.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:32.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:32.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:32.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:32.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:32.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:32.516 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:32.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:33.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:33.046 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:33.048 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:33.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:33.051 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:33.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:33.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:33.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:05:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:33.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:33.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:33.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:33.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:33.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:33.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:33.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:33.108 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:33.108 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:38.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:38.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:38.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:38.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:38.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:38.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:38.117 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:38.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:38.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:38.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:38.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:38.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:38.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:38.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:38.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:38.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:38.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:38.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:38.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:38.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:38.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:38.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:38.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:38.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:38.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:38.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:38.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:38.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:38.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:38.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:38.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:38.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:38.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:38.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:38.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:38.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:38.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:38.131 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:38.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:38.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:38.659 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:38.661 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:38.662 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:38.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:38.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:38.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:05:38.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:38.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:38.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:38.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:38.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:38.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:38.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:38.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:38.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:38.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:38.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:38.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:38.720 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:38.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:38.720 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:38.721 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:43.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:43.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:43.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:43.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:43.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:43.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:43.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:43.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:43.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:43.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:43.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:43.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:43.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:43.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:43.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:43.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:43.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:43.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:43.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:43.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:43.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:43.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:43.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:43.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:43.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:43.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:43.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:43.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:43.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:43.740 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:43.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:43.741 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:43.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:43.743 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:43.743 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:43.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:43.748 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:44.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:44.270 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:44.271 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:44.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.274 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:44.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:05:44.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:05:44.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:05:44.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:44.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:44.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:44.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:44.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:44.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:44.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:44.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:44.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:44.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:44.338 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:44.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:49.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:49.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:49.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:49.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:49.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:49.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:49.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:49.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:49.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:49.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:49.347 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:49.349 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:49.349 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:49.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:49.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:49.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:49.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:49.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:49.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:49.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:49.352 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:49.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:49.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:49.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:49.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:49.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:49.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:49.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:49.357 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:49.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:49.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:49.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:49.890 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:49.892 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:49.895 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:49.904 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 02:05:49.904 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 200
2026-03-11 02:05:49.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 02:05:50.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:50.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:05:50.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:50.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:50.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:50.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:50.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:50.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:05:51.279 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:05:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:51.535 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 02:05:51.535 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 0
2026-03-11 02:05:51.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 02:05:51.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:51.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:51.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:51.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:51.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:51.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:51.543 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:51.543 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:56.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:56.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:56.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:56.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:56.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:56.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:56.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:56.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:56.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:56.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:05:56.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:05:56.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:05:56.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:05:56.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:56.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:56.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:05:56.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:05:56.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:56.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:56.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:56.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:05:56.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:05:56.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:05:56.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:56.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:05:56.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:05:56.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:05:56.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:05:56.561 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:05:56.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:05:57.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:05:57.091 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:05:57.095 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:05:57.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:57.097 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:05:57.099 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 02:05:57.099 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 200
2026-03-11 02:05:57.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 02:05:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:05:57.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:05:57.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:57.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:57.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:57.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:57.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:57.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:05:58.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:05:58.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.731 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 02:05:58.731 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 0
2026-03-11 02:05:58.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 02:05:58.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:58.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:58.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:58.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:58.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:05:58.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:05:58.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:05:58.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:05:58.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:05:58.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:05:58.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:05:58.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:05:58.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:05:58.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:05:58.745 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:05:58.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:05:58.745 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:03.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:03.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:03.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:03.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:03.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:03.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:03.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:03.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:03.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:03.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:03.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:06:03.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:06:03.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:06:03.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:03.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:03.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:03.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:06:03.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:03.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:06:03.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:03.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:03.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:06:03.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:03.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:06:03.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:06:03.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:03.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:03.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:03.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:06:03.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:03.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:06:03.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:06:03.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:06:03.771 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:06:03.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:03.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:03.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:06:04.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:06:04.296 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:06:04.297 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:06:04.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:04.299 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:06:04.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:04.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:04.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:04.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:04.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:04.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:04.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:04.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:04.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:04.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:04.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:04.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:04.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:04.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:04.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:04.348 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:04.348 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:09.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:09.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:09.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:09.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:09.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:09.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:09.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:09.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:09.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:09.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:06:09.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:09.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:09.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:06:09.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:09.363 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:09.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:06:09.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:09.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:06:09.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:06:09.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:09.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:09.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:09.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:06:09.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:09.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:06:09.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:09.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:06:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:06:09.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:06:09.369 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:06:09.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:06:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:09.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:09.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:06:09.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:06:09.903 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:06:09.905 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:06:09.907 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:06:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:09.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:09.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:09.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:09.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:09.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:09.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:09.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:09.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:09.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:09.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:09.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:09.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:09.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:09.953 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:06:09.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:09.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:09.953 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:09.954 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:14.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:14.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:14.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:14.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:14.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:14.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:14.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:14.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:14.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:14.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:06:14.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:06:14.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:06:14.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:06:14.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:14.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:14.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:14.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:06:14.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:06:14.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:06:14.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:14.972 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:06:14.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:06:14.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:06:14.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:14.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:06:14.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:06:14.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:14.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:06:14.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:06:14.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:06:14.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:06:14.979 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:06:14.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:06:14.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:06:15.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:06:15.511 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:06:15.513 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:06:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:15.515 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:06:15.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:15.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:15.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:15.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:15.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:15.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:15.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:15.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:15.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:15.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:15.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:15.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:15.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:15.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:15.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:15.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:15.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:15.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:15.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:15.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:15.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:15.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:15.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:15.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:15.945 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:06:15.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:15.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:15.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:15.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:16.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:06:16.900 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:06:16.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:16.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:16.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:16.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:17.378 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:06:17.856 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:06:17.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:17.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:17.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:17.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:18.335 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:06:18.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:18.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:18.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:18.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:18.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:18.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:18.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:18.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:18.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:18.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:18.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:18.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:18.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:18.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:18.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:18.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:18.813 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:06:18.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:18.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:18.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:18.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:18.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:18.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:18.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:18.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:18.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:18.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:18.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:18.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:18.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:18.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:18.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:19.290 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:06:19.768 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:06:19.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:19.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:19.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:20.246 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:06:20.723 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:06:21.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:06:21.680 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:06:21.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:21.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:21.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:21.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:21.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:21.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:21.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:21.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:21.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:21.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:21.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:21.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:21.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:21.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:21.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:21.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:21.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:22.156 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:06:22.634 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:06:23.112 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:06:23.589 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:06:24.067 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:06:24.545 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:06:24.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:24.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:24.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:24.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:24.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:24.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:24.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:24.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:24.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:24.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:24.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:24.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:24.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:24.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:24.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:24.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:25.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:25.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:25.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:25.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:25.023 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:06:25.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:25.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:25.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:25.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:25.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:25.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:25.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:25.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:25.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:25.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:25.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:25.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:25.500 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:06:25.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:06:26.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:26.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:26.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:26.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:26.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:26.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:26.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:26.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:26.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:26.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:26.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:26.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:26.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:26.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:26.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:26.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:26.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:26.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:26.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:26.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:26.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:26.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:26.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:26.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:26.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:26.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:26.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:26.451 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:06:26.929 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:06:27.408 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:06:27.886 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:06:28.364 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:06:28.843 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:06:29.320 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:06:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:29.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:29.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:29.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:29.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:29.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:29.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:29.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:29.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:29.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:29.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:29.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:29.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:29.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:29.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:29.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:29.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:29.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:29.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:29.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:29.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:29.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:29.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:29.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:29.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:29.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:29.797 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:06:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:06:30.754 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:06:31.231 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:06:31.709 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:06:32.188 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:06:32.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:32.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:32.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:32.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:32.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:32.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:32.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:32.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:32.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:32.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:32.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:32.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:32.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:32.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:32.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:32.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:32.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:06:33.144 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:06:33.622 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:06:34.099 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:06:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:06:35.056 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:06:35.533 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:06:35.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:35.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:35.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:35.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:35.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:35.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:35.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:35.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:35.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:35.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:35.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:35.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:35.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:35.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:35.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:35.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:35.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:35.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:35.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:35.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:35.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:35.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:35.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:35.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:35.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:35.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:35.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:35.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.011 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:06:36.489 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:06:36.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:36.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:36.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:36.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:36.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:36.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:36.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:36.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:36.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:36.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:36.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:36.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:36.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:36.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:36.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:36.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:06:36.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:36.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:36.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:36.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:36.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:36.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:36.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:36.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:37.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:37.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:37.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:37.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:37.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:37.444 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:06:37.922 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:06:38.400 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:06:38.877 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:06:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:06:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:06:40.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:40.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:40.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:40.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:40.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:40.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:40.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:40.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:40.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:40.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:40.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:40.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:40.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:40.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:40.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:40.309 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:06:40.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:40.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:40.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:40.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:40.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:40.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:40.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:40.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:40.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:40.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:40.787 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:06:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:06:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:06:42.220 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:06:42.697 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:06:43.175 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:06:43.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:43.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:43.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:43.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:43.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:43.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:43.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:43.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:43.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:43.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:43.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:43.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:43.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:43.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:43.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:43.652 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:06:44.130 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:06:44.608 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:06:45.086 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:06:45.564 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:06:46.042 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:06:46.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:46.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:46.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:46.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:46.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:46.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:46.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:46.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:46.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:46.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:46.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:46.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:46.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:46.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:46.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:46.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:46.519 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:06:46.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:46.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:46.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:46.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:46.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:46.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:46.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:46.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:46.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:46.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:46.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:46.997 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:06:47.475 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:06:47.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:47.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:47.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:47.517 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=6947 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:47.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:47.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:47.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:47.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:47.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:47.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:47.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:47.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:47.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:47.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:47.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:47.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:47.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:47.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:47.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:47.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:47.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:47.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:47.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:47.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:47.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:47.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:47.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:47.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:47.951 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:06:48.428 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:06:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:06:49.384 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:06:49.862 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:06:50.341 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:06:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:50.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:50.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:50.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:50.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:50.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:50.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:50.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:50.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:50.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:50.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:50.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:50.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:50.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.818 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:06:50.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:50.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:50.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:50.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:50.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:50.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:50.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:50.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:50.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:50.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:50.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:50.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:51.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:51.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:51.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:51.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:51.294 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:06:51.773 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:06:52.251 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:06:52.729 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:06:53.206 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:06:53.684 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:06:54.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:54.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:54.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:54.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:54.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:54.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:54.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:54.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:54.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:54.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:54.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:54.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:54.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:54.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:54.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:54.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:54.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:54.161 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:06:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:06:55.117 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:06:55.595 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:06:56.072 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:06:56.550 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:06:57.029 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:06:57.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:57.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:57.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:57.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:57.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:57.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:57.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:57.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:57.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:57.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:57.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:57.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:57.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:57.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:57.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:57.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:57.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:57.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:57.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:06:57.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:57.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:57.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:06:57.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:06:57.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:57.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:06:57.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:06:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.505 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:06:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:06:57.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:06:57.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:06:57.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:06:57.972 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=9181 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:06:57.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:06:57.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:06:57.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:06:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:06:57.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:06:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:06:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:06:57.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:06:57.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:06:57.987 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:06:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:06:57.987 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9183 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.988 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:06:57.989 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9184 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:02.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:02.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:02.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:02.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:02.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:02.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:02.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:02.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:02.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:02.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:03.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:03.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:03.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:03.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:03.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:03.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:03.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:03.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:03.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:03.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:03.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:03.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:03.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:03.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:03.006 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:03.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:03.006 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:03.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:03.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:03.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:03.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:03.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:03.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:03.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:03.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:03.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:03.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:03.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:03.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:03.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:03.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:03.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:03.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:03.012 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:03.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:03.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:03.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:03.544 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:03.546 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:03.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.548 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:03.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:03.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:03.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:03.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:03.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:03.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:03.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:03.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:03.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:03.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:03.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:03.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:03.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:03.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:03.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:03.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:03.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:03.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:03.971 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:04.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:04.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:04.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:04.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:04.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:04.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:04.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:04.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:04.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:04.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:04.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:04.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:04.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:04.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:04.065 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:04.065 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:09.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:09.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:09.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:09.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:09.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:09.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:09.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:09.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:09.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:09.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:09.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:09.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:09.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:09.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:09.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:09.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:09.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:09.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:09.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:09.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:09.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:09.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:09.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:09.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:09.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:09.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:09.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:09.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:09.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:09.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:09.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:09.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:09.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:09.098 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:09.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:09.103 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:09.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:09.623 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:09.624 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:09.625 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:09.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:09.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:09.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:09.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:09.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:09.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:09.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:09.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:09.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:09.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:09.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:09.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:09.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:10.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:10.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:10.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:10.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:10.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:10.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:10.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:10.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:10.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:10.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:10.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:10.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:10.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:10.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:10.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:10.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:10.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:10.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:10.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:10.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:10.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:10.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:10.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:07:11.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:11.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:11.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:11.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:11.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:11.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:11.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:11.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:11.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:11.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:11.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:11.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:11.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:11.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:11.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:11.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:11.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:11.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:11.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:11.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:11.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:11.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:11.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:11.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:11.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:11.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:11.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:11.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:11.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:11.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:07:11.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:11.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:11.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:11.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:11.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:11.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:11.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:11.898 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:16.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:16.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:16.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:16.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:16.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:16.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:16.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:16.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:16.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:16.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:16.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:16.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:16.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:16.923 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:16.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:16.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:16.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:16.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:16.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:16.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:16.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:16.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:16.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:16.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:16.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:16.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:16.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:16.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:16.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:16.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:16.932 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:16.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:16.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:17.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:17.458 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:17.459 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:17.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:17.461 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:17.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:17.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:17.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:17.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:17.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:17.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:17.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:17.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:17.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:17.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:17.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:17.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:17.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:17.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:17.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:17.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:17.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:17.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:17.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:17.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:17.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:17.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:17.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:17.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:17.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:17.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:17.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:17.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:17.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:18.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:18.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:18.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:18.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:18.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:18.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:18.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:18.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:18.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:18.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:18.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:18.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:18.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:18.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:18.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:18.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:18.375 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:18.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:18.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:18.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:18.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:18.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:18.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:18.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:18.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:18.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:18.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:18.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:18.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:18.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:18.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:18.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:18.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:18.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:18.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:18.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:18.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:18.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:18.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:18.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:18.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:18.782 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.783 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:18.784 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:23.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:23.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:23.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:23.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:23.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:23.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:23.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:23.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:23.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:23.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:23.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:23.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:23.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:23.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:23.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:23.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:23.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:23.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:23.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:23.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:23.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:23.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:23.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:23.794 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:23.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:23.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:23.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:23.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:23.797 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:23.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:23.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:24.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:24.323 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:24.325 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:24.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.327 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:24.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:24.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:24.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:24.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:24.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:24.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:24.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:24.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:24.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:24.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:24.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:24.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:24.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:24.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:24.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:24.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:24.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:24.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:24.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:24.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:24.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:24.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:24.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:24.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:24.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:24.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:24.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:24.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:24.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:25.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:25.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:25.232 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:25.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:25.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:25.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:25.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:25.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:25.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:25.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:25.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:25.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:25.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:25.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:25.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:25.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:25.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:25.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:25.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:25.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:25.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:25.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:25.634 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:25.634 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:25.634 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:25.634 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:25.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:25.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:25.635 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:30.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:30.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:30.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:30.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:30.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:30.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:30.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:30.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:30.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:30.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:30.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:30.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:30.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:30.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:30.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:30.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:30.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:30.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:30.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:30.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:30.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:30.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:30.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:30.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:30.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:30.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:30.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:30.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:30.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:30.650 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:30.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:30.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:30.654 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:30.654 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:30.654 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:30.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:30.659 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:31.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:31.179 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:31.181 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:31.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:31.182 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:31.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:31.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:31.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:31.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:31.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:31.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:31.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:31.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:31.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:31.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:31.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:31.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:31.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:31.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:31.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:31.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:31.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:32.096 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:32.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:07:32.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:32.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:32.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:32.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:33.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:07:33.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:33.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:33.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:33.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:33.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:33.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:33.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:33.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:33.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:33.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:33.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:33.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:33.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:33.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:33.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:33.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:33.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:33.522 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:07:33.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:33.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:33.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:33.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:34.000 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:07:34.475 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:07:34.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:34.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:34.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:34.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:34.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:07:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:35.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:35.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:35.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:35.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:35.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:35.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:35.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:35.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:35.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:35.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:35.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:35.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:35.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:35.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:35.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:35.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:35.430 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:07:35.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:35.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:35.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:35.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:35.908 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:07:36.386 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:07:36.864 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:07:36.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:36.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:36.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:36.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:36.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:36.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:36.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:36.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:36.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:36.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:36.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:36.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:36.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:36.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:36.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:36.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:36.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:07:37.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:07:38.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:07:38.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:38.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:38.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:38.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:38.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:07:38.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:38.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:38.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:38.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:38.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:38.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:38.780 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:38.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:38.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:43.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:43.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:43.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:43.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:43.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:43.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:43.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:43.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:43.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:43.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:43.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:43.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:43.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:43.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:43.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:43.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:43.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:43.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:43.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:43.797 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:43.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:43.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:43.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:43.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:43.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:43.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:43.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:43.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:43.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:43.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:43.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:43.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:43.803 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:43.803 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:43.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:43.808 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:44.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:44.328 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:44.330 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:44.332 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:44.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:44.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:44.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:44.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:44.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:44.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:44.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:44.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:44.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:44.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:44.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:44.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:44.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:44.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:44.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:44.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:44.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:44.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:45.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:45.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:07:45.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:45.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:45.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:45.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:46.202 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:07:46.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:46.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:46.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:46.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:46.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:46.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:46.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:46.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:46.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:46.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:46.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:46.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:46.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:46.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:46.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:46.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:46.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:07:46.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:46.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:46.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:46.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:07:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:07:47.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:47.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:47.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:47.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:48.114 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:07:48.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:48.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:48.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:48.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:48.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:48.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:48.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:48.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:48.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:48.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:48.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:48.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:48.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:48.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:48.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:48.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:48.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:48.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:07:48.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:48.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:48.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:48.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:49.070 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:07:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:07:50.025 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:07:50.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:50.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:50.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:50.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:50.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:50.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:50.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:50.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:50.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:50.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:50.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:50.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:50.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:50.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:50.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:50.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:50.502 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:07:50.980 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:07:51.458 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:07:51.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:51.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:51.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:51.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:51.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:51.936 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:07:51.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:51.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:51.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:51.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:51.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:51.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:51.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:51.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:51.940 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:07:51.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.941 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:51.942 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:07:56.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:07:56.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:07:56.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:56.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:56.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:56.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:56.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:07:56.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:56.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:56.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:07:56.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:07:56.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:07:56.952 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:07:56.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:56.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:56.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:07:56.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:07:56.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:07:56.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:07:56.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:56.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:07:56.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:07:56.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:56.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:56.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:07:56.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:07:56.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:07:56.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:07:56.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:56.958 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:07:56.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:07:56.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:07:56.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:07:56.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:07:56.962 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:07:56.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:07:56.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:07:56.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:07:57.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:07:57.492 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:07:57.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:57.494 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:07:57.495 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:07:57.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:57.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:57.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:57.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:57.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:57.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:57.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:57.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:57.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:57.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:57.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:57.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:57.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:57.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:57.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:57.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:57.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:57.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:57.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:57.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:57.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:57.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:57.924 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:07:57.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:57.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:57.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:57.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:58.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:07:58.879 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:07:58.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:58.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:58.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:07:59.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:07:59.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:07:59.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:59.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:59.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:59.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:59.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:07:59.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:07:59.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:07:59.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:59.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:59.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:59.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:07:59.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:07:59.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:07:59.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:07:59.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:07:59.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:59.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:07:59.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:07:59.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:07:59.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:07:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:00.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:00.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:00.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:00.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:00.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:00.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:00.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:00.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:00.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:00.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:00.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:00.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:00.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:00.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:00.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:00.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:00.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:00.312 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:08:00.790 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:08:00.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:00.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:00.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:00.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:01.268 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:08:01.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:08:01.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:01.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:01.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:01.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:02.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:08:02.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:02.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:02.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:02.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:02.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:02.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:02.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:02.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:02.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:02.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:02.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:02.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:02.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:02.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:02.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:02.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:02.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:02.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:02.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:02.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:02.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:02.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:02.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:02.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:02.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:08:02.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:02.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:02.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:02.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:03.177 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:08:03.655 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:08:04.133 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:08:04.611 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:08:04.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:04.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:04.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:04.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:05.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:05.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:05.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:05.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:05.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:05.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:05.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:05.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:05.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:05.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:05.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.089 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:08:05.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:05.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:05.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:05.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:05.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:05.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:05.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:05.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:05.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:05.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:05.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:05.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:05.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:05.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:05.567 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:08:06.045 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:08:06.522 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:08:07.000 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:08:07.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:07.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:07.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:07.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:07.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:07.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:07.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:07.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:07.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:07.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:07.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:07.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:07.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:07.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:07.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:07.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:07.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:07.478 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:08:07.955 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:08:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:08.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:08.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:08.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:08.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:08.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:08.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:08.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:08.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:08.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:08.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:08.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:08.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:08.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:08.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:08.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:08.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:08.430 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:08:08.906 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:08:09.384 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:08:09.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:09.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:09.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:09.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:09.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:09.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:09.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:09.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:09.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:09.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:09.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:09.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:09.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:09.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:09.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:09.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:09.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:09.861 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:08:10.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:08:10.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:10.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:10.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:10.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:10.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:10.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:10.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:10.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:10.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:10.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:10.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:10.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:10.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:10.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:10.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:10.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:10.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:10.813 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:08:11.290 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:08:11.768 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:08:12.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:12.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:12.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:12.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:12.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:12.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:12.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:12.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:12.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:12.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:12.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:12.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:12.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.246 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:08:12.723 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:08:12.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:12.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:12.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:12.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:12.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:12.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:12.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:12.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:12.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:12.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:12.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:12.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:12.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:12.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:13.200 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:08:13.675 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:08:14.150 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:08:14.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:14.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:14.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:14.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:14.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:14.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:14.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:14.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:14.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:14.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:14.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:14.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:14.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:14.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:14.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:14.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:14.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:14.628 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:08:15.106 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:08:15.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:15.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:15.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:15.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:15.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:15.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:15.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:15.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:15.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:15.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:15.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:15.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:15.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:15.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:15.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:15.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:15.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:15.584 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:08:16.062 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:08:16.540 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:08:16.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:16.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:16.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:16.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:16.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:16.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:16.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:16.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:16.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:16.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:16.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:16.950 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:16.951 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:16.951 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:16.951 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:16.951 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:21.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:21.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:21.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:21.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:21.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:21.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:21.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:21.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:21.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:21.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:21.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:08:21.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:08:21.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:08:21.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:21.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:21.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:21.966 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:08:21.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:21.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:08:21.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:21.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:08:21.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:08:21.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:21.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:21.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:21.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:08:21.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:21.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:08:21.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:21.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:08:21.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:08:21.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:21.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:21.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:08:21.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:21.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:08:21.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:08:21.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:08:21.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:08:21.976 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:08:21.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:21.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:08:22.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:08:22.510 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:08:22.512 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:08:22.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.515 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:08:22.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:22.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:22.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:22.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:22.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:22.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:22.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:22.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:22.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:22.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:22.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:22.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:22.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:22.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:22.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:22.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.939 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:08:22.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:22.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:22.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:22.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:22.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:22.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:22.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:22.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:23.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:23.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:23.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:23.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:23.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:23.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:23.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:23.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:23.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.416 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:08:23.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:23.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:23.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:23.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:23.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:23.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:23.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:23.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:23.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:23.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:23.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:23.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:23.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:23.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:23.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:23.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:23.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:23.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:23.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:23.752 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:28.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:28.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:28.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:28.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:28.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:28.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:28.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:28.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:28.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:28.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:28.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:08:28.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:08:28.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:08:28.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:28.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:28.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:28.771 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:08:28.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:28.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:08:28.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:28.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:08:28.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:28.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:08:28.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:28.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:28.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:08:28.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:08:28.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:08:28.781 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:08:28.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:28.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:08:29.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:08:29.318 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:08:29.320 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:08:29.322 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:08:29.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:29.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:29.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:29.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:29.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:29.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:29.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:29.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:29.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:29.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:29.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:29.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.743 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:08:29.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:29.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:29.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:29.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:29.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:29.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:29.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:29.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:29.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:29.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:29.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:29.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:29.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:29.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:29.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:29.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:29.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:29.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:29.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.221 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:08:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:30.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:30.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:30.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:30.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:30.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:30.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:30.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:30.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:30.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:30.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:30.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:30.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:30.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.698 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:08:30.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:30.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:30.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:30.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:30.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:30.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:30.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:30.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:30.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:30.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:30.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:30.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:30.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:30.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:30.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:31.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:31.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:31.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:31.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:08:31.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:31.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:31.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:31.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:31.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:31.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:31.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:31.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:31.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:31.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:31.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:31.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:31.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:31.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:31.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:31.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:31.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:31.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:31.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:31.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:31.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:31.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:31.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:31.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:31.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:31.653 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:08:31.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:31.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:31.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:31.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:32.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:32.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:32.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:32.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:32.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:32.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:32.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:32.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:32.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:32.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:32.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:32.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:32.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:32.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.130 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:08:32.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:32.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:32.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:32.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:32.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:32.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:32.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:32.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:32.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:32.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:32.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:32.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:32.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:08:32.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:32.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:32.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:32.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:32.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:32.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:33.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:33.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:33.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:33.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:33.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:33.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:33.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:33.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:33.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:33.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:33.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:33.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:33.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:33.011 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:33.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=905 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:38.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:38.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:38.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:38.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:38.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:38.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:38.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:38.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:38.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:38.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:38.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:08:38.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:08:38.036 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:08:38.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:38.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:38.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:38.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:08:38.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:38.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:08:38.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:38.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:08:38.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:08:38.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:38.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:38.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:38.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:08:38.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:38.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:08:38.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:38.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:38.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:08:38.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:08:38.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:08:38.045 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:08:38.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:38.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:08:38.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:08:38.571 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:08:38.573 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:08:38.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.574 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:08:38.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:38.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:38.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:38.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:38.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:38.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:38.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:38.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:38.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:38.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:38.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:38.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:38.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:38.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:38.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:38.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:38.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.007 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:08:39.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:39.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:39.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:39.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:39.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:39.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:39.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:39.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:39.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:39.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:39.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:08:39.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:39.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:39.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:39.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:39.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:39.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:39.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:39.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:39.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:39.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:39.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:39.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:39.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:39.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:39.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:39.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:39.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:39.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:39.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:39.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:39.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:39.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:39.887 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:39.887 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:44.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:44.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:44.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:44.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:44.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:44.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:44.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:44.900 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:44.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:44.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:08:44.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:08:44.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:08:44.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:44.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:44.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:44.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:08:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:44.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:08:44.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:44.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:08:44.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:08:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:44.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:44.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:44.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:08:44.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:44.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:08:44.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:44.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:44.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:08:44.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.912 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:08:44.912 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:08:44.912 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:08:44.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:44.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:08:45.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:08:45.435 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:08:45.436 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:08:45.438 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:08:45.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:45.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:45.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:45.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:45.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:45.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:45.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:45.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:45.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:45.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:45.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:45.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:45.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:45.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:08:45.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:45.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:45.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:45.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:46.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:08:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:46.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:46.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:46.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:46.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:46.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:46.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:46.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:46.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:46.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:46.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:46.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:46.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:46.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:46.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:46.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:46.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:46.834 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:08:46.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:46.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:46.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:46.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:47.312 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:08:47.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:47.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:47.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:47.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:47.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:47.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:47.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:47.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:47.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:47.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:47.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:47.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:47.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:47.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:47.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:47.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:47.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:47.790 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:08:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:47.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:47.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:48.268 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:08:48.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:48.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:48.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:48.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:48.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:48.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:48.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:48.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:48.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:48.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:48.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:48.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:48.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:48.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:48.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:48.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:48.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:48.746 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:08:48.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:48.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:49.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:08:49.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:49.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:49.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:49.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:49.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:49.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:49.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:49.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:49.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:49.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:49.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:49.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:49.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:49.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:49.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:49.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:49.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:49.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:08:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:49.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:49.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:49.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:50.179 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:08:50.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:50.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:50.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:50.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:50.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:50.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:50.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:50.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:50.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:50.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:50.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:50.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:50.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:50.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:50.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:50.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:50.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:50.657 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:08:51.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:08:51.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:51.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:51.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:51.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:51.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:51.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:51.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:51.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:51.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:51.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:51.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:51.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:51.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:51.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:51.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:51.613 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:08:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:52.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:52.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:52.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:52.091 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:08:52.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:52.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:52.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:52.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:52.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:52.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:52.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:52.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:52.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:52.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:52.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:52.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:52.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:08:53.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:53.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:53.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:53.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:53.046 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:08:53.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:53.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:53.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:53.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:53.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:53.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:53.051 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:53.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:53.053 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:58.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:58.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:58.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:58.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:58.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:58.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:58.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:58.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:58.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:58.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:08:58.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:08:58.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:08:58.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:08:58.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:58.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:58.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:58.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:08:58.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:08:58.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:08:58.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:58.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:08:58.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:08:58.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:58.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:58.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:58.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:08:58.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:08:58.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:08:58.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:58.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:08:58.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:08:58.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:58.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:08:58.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:58.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:08:58.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:08:58.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:08:58.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:58.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:08:58.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:08:58.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:08:58.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:08:58.077 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:08:58.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:08:58.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:08:58.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:08:58.605 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:08:58.606 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:08:58.608 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:08:58.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:58.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:58.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:58.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:58.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:58.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:58.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:58.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:58.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:58.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:58.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:58.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:58.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:58.789 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=152 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:58.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:58.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:58.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:58.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:58.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:58.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:58.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:58.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:58.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:58.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:58.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:58.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:59.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:59.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:59.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:08:59.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:59.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:59.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:59.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:59.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:59.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:59.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:59.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:59.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:59.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:59.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:59.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:59.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:59.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:59.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:59.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:59.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:59.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:59.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:59.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:08:59.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:59.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:59.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:08:59.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:08:59.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:59.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:08:59.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:08:59.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.517 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:08:59.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:08:59.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:08:59.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:08:59.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:08:59.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:08:59.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:08:59.685 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:08:59.685 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:04.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:04.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:04.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:04.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:04.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:04.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:04.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:04.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:04.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:04.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:04.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:04.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:04.705 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:04.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:04.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:04.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:04.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:04.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:04.707 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:04.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:04.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:04.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:04.708 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:04.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:04.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:04.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:04.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:04.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:04.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:04.710 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:04.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:04.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:04.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:04.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:04.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:04.714 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:04.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:05.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:05.238 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:05.241 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.243 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:05.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:05.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:05.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:05.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:05.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:05.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:05.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:05.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:05.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:05.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.677 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:05.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:05.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:05.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:05.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:05.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:05.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:05.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:05.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:05.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:05.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:05.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:05.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:05.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:05.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:06.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:06.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:06.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:06.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:06.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:06.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:06.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:06.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:06.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:06.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:06.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:06.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:06.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:06.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:06.327 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:06.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:11.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:11.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:11.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:11.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:11.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:11.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:11.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:11.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:11.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:11.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:11.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:11.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:11.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:11.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:11.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:11.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:11.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:11.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:11.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:11.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:11.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:11.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:11.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:11.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:11.347 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:11.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:11.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:11.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:11.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:11.350 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:11.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:11.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:11.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:11.879 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:11.882 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:11.884 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:11.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:11.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:11.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:11.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:11.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:11.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:11.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:11.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:11.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:11.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:11.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:11.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:11.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:12.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:12.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:12.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:12.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:12.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:12.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:12.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:12.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:12.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:12.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:12.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:12.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:12.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:12.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:12.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.791 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:12.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:12.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:12.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:12.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:12.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:12.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:12.957 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:12.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:17.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:17.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:17.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:17.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:17.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:17.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:17.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:17.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:17.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:17.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:17.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:17.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:17.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:17.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:17.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:17.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:17.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:17.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:17.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:17.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:17.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:17.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:17.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:17.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:17.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:17.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:17.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:17.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:17.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:17.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:17.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:17.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:17.986 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:17.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:17.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:17.991 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:18.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:18.518 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:18.520 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:18.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:18.523 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:18.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:18.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:18.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:18.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:18.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:18.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:18.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:18.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:18.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:18.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:18.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:18.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:18.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:18.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:18.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:18.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:18.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:18.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:18.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:18.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:18.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:18.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:18.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:18.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:18.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:18.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:18.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:18.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:18.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:18.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:18.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:18.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:18.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:18.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:18.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:18.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:18.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:18.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:18.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:18.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:19.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:19.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:19.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:19.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:19.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:19.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:19.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:19.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:19.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:19.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:19.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:19.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:19.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:19.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:19.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:19.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:19.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:19.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:19.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:19.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:19.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:19.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:19.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:19.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:19.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:19.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:19.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:19.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:19.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:19.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:19.593 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:19.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:19.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:24.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:24.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:24.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:24.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:24.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:24.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:24.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:24.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:24.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:24.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:24.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:24.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:24.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:24.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:24.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:24.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:24.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:24.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:24.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:24.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:24.601 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:24.601 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:24.601 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:25.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:25.121 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:25.123 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:25.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:25.124 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:25.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:25.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:25.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:25.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:25.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:25.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:25.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:25.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:25.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:25.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:25.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:25.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:25.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:25.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:25.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:25.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:25.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:25.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:25.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:25.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:25.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:25.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:25.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:25.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:25.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:25.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:25.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:25.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:26.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:26.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:26.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:26.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:26.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:26.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:26.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:26.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:26.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:26.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:26.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:26.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:26.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:26.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:26.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:26.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:26.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:26.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:26.522 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:09:26.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:26.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:26.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:26.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:27.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:09:27.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:27.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:27.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:27.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:27.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:27.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:27.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:27.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:27.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:27.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:27.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:27.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:27.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:27.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:27.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:27.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:27.477 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:09:27.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:27.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:27.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:27.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:27.955 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:09:28.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:28.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:28.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:28.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:28.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:28.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:28.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:28.286 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:33.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:33.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:33.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:33.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:33.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:33.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:33.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:33.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:33.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:33.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:33.317 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:33.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:33.322 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:33.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:33.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:33.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:33.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:33.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:33.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:33.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:33.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:33.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:33.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:33.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:33.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:33.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:33.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:33.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:33.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:33.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:33.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:33.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:33.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:33.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:33.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:33.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:33.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:33.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:33.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:33.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:33.336 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:33.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:33.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:33.821 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:33.869 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:33.871 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:33.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:33.872 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:33.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:33.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:33.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:33.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:33.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:33.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:33.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:33.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:33.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:33.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:33.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:33.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:33.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:34.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:34.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:34.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:34.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:34.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:34.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:34.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:34.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:34.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:34.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:34.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:34.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:34.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:34.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:34.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:34.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:34.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:34.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:34.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:34.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:34.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:34.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:34.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:34.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:34.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:34.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:34.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:34.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:34.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:34.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:34.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:35.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:09:35.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:35.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:35.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:35.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:09:35.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:35.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:35.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:35.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:35.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:35.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:35.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:35.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:35.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:35.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:35.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:35.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:35.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:35.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:35.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:35.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:35.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:36.207 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:09:36.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:36.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:36.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:36.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:36.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:09:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:37.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:37.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:37.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:37.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:37.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:37.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:37.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:37.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:37.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:37.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:37.019 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.020 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.021 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.021 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.021 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.021 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:37.021 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:42.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:42.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:42.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:42.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:42.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:42.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:42.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:42.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:42.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:42.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:42.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:42.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:42.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:42.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:42.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:42.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:42.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:42.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:42.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:42.034 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:42.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:42.039 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:42.523 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:42.562 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:42.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:42.565 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:42.568 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:42.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:42.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:42.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:42.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:42.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:42.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:42.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:42.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:42.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:42.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:42.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:42.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:42.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:42.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:42.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:42.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:42.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:42.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:42.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:42.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:42.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:42.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:42.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:43.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:43.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:43.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:43.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:43.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:43.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:43.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:43.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:43.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:43.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:43.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:43.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:43.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:43.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:43.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:43.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:43.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:43.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:43.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:43.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:43.955 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:09:44.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:44.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:44.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:44.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:44.433 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:09:44.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:44.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:44.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:44.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:44.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:44.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:44.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:44.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:44.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:44.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:44.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:44.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:44.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:44.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:44.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:44.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:44.910 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:09:45.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:45.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:45.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:45.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:45.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:09:45.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:45.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:45.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:45.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:45.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:45.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:45.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:45.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:45.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:45.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:45.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:45.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:45.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:45.723 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:45.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.724 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:45.725 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:50.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:50.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:50.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:50.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:50.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:50.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:50.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:50.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:50.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:50.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:50.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:50.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:50.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:50.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:50.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:50.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:50.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:50.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:50.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:50.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:50.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:50.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:50.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:50.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:50.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:50.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:50.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:50.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:50.747 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:50.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:50.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:51.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:51.278 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:51.280 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:51.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:51.284 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:09:51.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:51.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:51.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:51.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:51.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:51.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:51.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:51.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:51.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:51.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:51.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:51.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:51.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:51.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:51.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:51.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:51.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:51.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:51.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:09:51.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:51.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:51.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:51.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:51.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:51.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:51.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:09:52.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:52.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:52.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:52.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:52.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:52.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:52.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:52.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:52.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:52.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:52.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:52.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:52.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:52.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:52.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:52.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:52.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:52.668 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:09:52.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:52.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:52.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:09:53.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:53.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:53.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:53.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:53.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:53.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:53.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:09:53.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:53.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:53.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:53.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:09:53.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:09:53.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:53.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:09:53.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:09:53.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:53.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:53.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:09:53.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:53.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:53.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:54.101 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:09:54.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:54.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:09:54.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:09:54.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:09:54.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:54.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:54.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:54.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:54.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:54.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:54.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:54.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:54.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:54.434 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:09:54.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:54.434 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:09:59.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:09:59.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:09:59.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:59.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:59.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:59.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:59.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:09:59.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:59.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:59.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:09:59.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:59.449 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:09:59.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:09:59.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:09:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:59.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:09:59.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:09:59.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:09:59.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:59.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:09:59.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:09:59.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:09:59.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:09:59.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:09:59.459 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:09:59.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:09:59.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:09:59.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:09:59.988 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:09:59.990 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:09:59.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:09:59.992 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:10:00.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:00.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:00.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:00.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:00.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:00.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:00.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:00.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:00.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:00.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:00.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:00.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:00.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:00.034 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:00.035 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:05.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:05.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:05.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:05.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:05.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:05.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:05.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:05.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:05.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:05.044 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:05.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:05.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:05.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:05.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:05.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:05.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:05.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:05.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:05.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:05.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:05.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:05.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:05.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:05.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:05.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:05.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:05.051 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:05.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:05.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:05.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:05.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:05.056 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:05.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:05.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:10:05.545 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:10:05.573 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:10:05.575 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:10:05.576 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:10:05.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:05.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:05.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:05.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:05.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:05.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:05.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:05.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:05.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:05.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:05.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:05.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:05.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:05.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:05.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:05.614 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:05.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:05.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:10.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:10.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:10.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:10.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:10.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:10.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:10.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:10.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:10.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:10.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:10.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:10.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:10.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:10.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:10.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:10.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:10.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:10.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:10.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:10.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:10.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:10.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:10.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:10.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:10.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:10.633 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:10.633 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:10.633 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:10.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:10.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:10.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:10.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:10.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:10.638 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:10.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:10.643 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:10:11.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:10:11.170 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:10:11.172 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:10:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:11.175 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:10:11.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:11.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:11.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:11.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:11.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:11.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:11.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:11.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:11.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:11.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:11.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:11.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:11.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:11.207 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:11.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:16.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:16.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:16.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:16.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:16.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:16.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:16.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:16.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:16.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:16.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:16.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:16.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:16.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:16.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:16.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:16.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:16.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:16.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:16.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:16.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:16.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:16.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:16.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:16.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:16.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:16.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:16.229 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:16.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:16.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:16.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:16.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:16.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:16.234 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:16.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:16.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:16.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:16.237 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:21.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:21.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:21.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:21.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:21.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:21.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:21.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:21.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:21.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:21.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:21.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:21.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:21.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:21.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:21.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:21.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:21.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:21.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:21.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:21.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:21.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:21.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:21.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:21.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:21.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:21.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:21.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:21.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:21.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:21.264 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:21.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:21.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:21.267 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:21.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:21.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:21.268 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:21.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:21.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:10:21.756 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:10:21.803 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:10:21.806 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:10:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:21.808 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:10:21.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:21.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:21.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:21.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:21.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:21.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:21.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:21.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:21.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:21.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:21.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:21.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:21.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:22.234 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:10:22.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:22.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:22.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:22.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:22.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:10:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:22.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:22.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:22.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:22.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:22.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:22.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:22.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:22.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:22.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:22.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:22.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:22.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:22.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:22.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:22.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:22.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:23.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:10:23.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:23.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:23.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:23.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:23.667 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:10:23.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:23.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:23.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:23.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:23.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:23.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:23.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:23.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:23.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:23.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:23.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:23.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:23.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:23.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:23.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:23.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:23.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:24.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:10:24.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:24.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:24.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:24.622 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:10:24.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:24.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:24.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:24.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:24.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:24.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:24.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:24.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:24.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:24.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:24.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:24.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:24.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:24.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:24.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:24.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:24.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:25.099 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:10:25.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:25.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:25.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:25.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:10:25.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:25.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:25.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:25.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:25.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:25.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:25.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:25.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:25.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:25.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:25.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:25.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:25.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:25.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:25.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:25.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:25.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:10:26.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:26.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:26.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:26.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:26.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:26.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:26.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:26.374 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1091 tn=1 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:26.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:26.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:26.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:26.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:26.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:26.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:26.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:26.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:26.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:26.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:26.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:10:26.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:26.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:26.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:26.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:26.980 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1221 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:26.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:26.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:26.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:27.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:27.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:27.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:27.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:27.009 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:10:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:27.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:27.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:27.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.487 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:10:27.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:27.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:27.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:27.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:27.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:27.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:27.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:27.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:27.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:27.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:27.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:27.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:27.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:27.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:27.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:27.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:10:28.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:28.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:28.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:28.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:28.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:28.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:28.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:28.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:28.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:28.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:28.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:28.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:28.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:28.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:10:28.915 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:10:28.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:28.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:28.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:28.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:28.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:28.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:28.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:28.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:28.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:28.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:28.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:28.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:28.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:28.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:28.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:28.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:29.392 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:10:29.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:29.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:29.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:29.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:29.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:29.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:29.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:29.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:29.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:29.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:29.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:29.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:29.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:29.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:29.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:29.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:29.870 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:10:30.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:30.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:30.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:30.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:30.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:30.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:30.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:30.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:30.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:30.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:30.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:30.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:30.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:30.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.347 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:10:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:10:30.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:30.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:30.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:30.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:30.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:30.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:30.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:30.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:30.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:30.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:30.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:30.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:30.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:30.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:30.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:31.303 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:10:31.781 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:10:31.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:31.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:31.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:31.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:31.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:31.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:31.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:31.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:31.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:31.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:31.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:31.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:31.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:31.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:31.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:31.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:31.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:32.258 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:10:32.736 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:10:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:32.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:32.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:32.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:32.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:32.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:32.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:32.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:32.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:32.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:32.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:32.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:32.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:32.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:32.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:32.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:32.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:33.213 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:10:33.691 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:10:33.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:33.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:33.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:33.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:33.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:33.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:33.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:33.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:33.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:33.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:33.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:33.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:33.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:33.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:33.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:33.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:33.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:34.168 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:10:34.646 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:10:34.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:34.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:34.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:34.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:34.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:34.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:34.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:34.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:34.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:34.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:34.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:34.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:34.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:34.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:34.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:34.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:34.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:35.123 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:10:35.602 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:10:35.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:35.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:35.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:35.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:35.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:35.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:35.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:35.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:35.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:35.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:35.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:35.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:35.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:35.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:35.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:35.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:36.079 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:10:36.556 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:10:36.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:36.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:36.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:36.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:36.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:36.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:36.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:36.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:36.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:36.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:36.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:36.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:36.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:36.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:36.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:36.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:36.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:37.033 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:10:37.511 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:10:37.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:37.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:37.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:37.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:37.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:37.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:37.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:37.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:37.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:37.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:37.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:37.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:37.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:37.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:37.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:37.989 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:10:38.466 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:10:38.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:38.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:38.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:38.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:38.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:38.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:38.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:38.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:38.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:38.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:38.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:38.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:38.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:38.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:38.619 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:38.619 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:38.619 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:43.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:43.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:43.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:43.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:43.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:43.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:43.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:43.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:43.632 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:43.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:43.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:43.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:43.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:43.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:43.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:43.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:43.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:43.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:43.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:43.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:43.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:43.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:43.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:43.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:43.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:43.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:43.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:43.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:43.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:43.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:43.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:43.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:43.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:43.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:43.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:43.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:43.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:43.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:43.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:43.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:43.642 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:43.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:43.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:10:44.131 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:10:44.176 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:10:44.179 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:10:44.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.181 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:10:44.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:44.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:44.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:44.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:44.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:44.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:44.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:44.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:44.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:44.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:10:44.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:44.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:44.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:44.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:44.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:44.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:44.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:44.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:44.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:44.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:44.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:44.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:44.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:44.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:45.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:45.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:45.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:10:45.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:45.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:45.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:45.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:10:45.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:10:45.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:45.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:10:45.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:10:45.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:45.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:45.080 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:10:45.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:10:45.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:10:45.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:10:45.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:10:45.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:45.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:45.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:45.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:45.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:45.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:45.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:45.265 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:45.265 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:10:50.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:10:50.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:10:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:50.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:50.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:50.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:50.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:10:50.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:50.278 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:50.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:10:50.278 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:10:50.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:10:50.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:10:50.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:50.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:50.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:10:50.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:10:50.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:10:50.282 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:10:50.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:10:50.285 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:10:50.285 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:10:50.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:50.285 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:50.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:10:50.285 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:10:50.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:10:50.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:10:50.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:10:50.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:10:50.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:10:50.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:50.288 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:10:50.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:10:50.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:10:50.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:10:50.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:10:50.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:10:50.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:10:50.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:10:50.293 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:10:50.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:10:50.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:10:50.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:10:50.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:10:51.264 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:10:51.741 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:10:52.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:10:52.697 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:10:53.166 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:10:53.634 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:10:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:10:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:10:55.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:10:55.530 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:10:56.008 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:10:56.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:10:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:10:57.453 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:10:57.934 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:10:58.415 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:10:58.896 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:10:59.378 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:10:59.859 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:11:00.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:11:00.822 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:11:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:11:01.785 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:11:02.267 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:11:02.748 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:11:03.230 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:11:03.711 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:11:04.193 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:11:04.675 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:11:05.156 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:11:05.638 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:11:06.119 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:11:06.600 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:11:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:11:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:11:08.044 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:11:08.525 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:11:09.006 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:11:09.487 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:11:09.969 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:11:10.450 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:11:10.933 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:11:11.414 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:11:11.895 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:11:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:11:12.859 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:11:13.341 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:11:13.822 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:11:14.304 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:11:14.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:11:14.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:11:14.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:11:14.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:11:14.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:11:14.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:11:14.317 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:11:19.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:11:19.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:11:19.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:11:19.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:11:19.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:11:19.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:11:19.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:11:19.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:11:19.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:11:19.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:11:19.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:11:19.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:11:19.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:11:19.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:11:19.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:11:19.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:11:19.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:11:19.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:11:19.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:11:19.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:11:19.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:11:19.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:11:19.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:11:19.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:11:19.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:11:19.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:11:19.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:11:19.334 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:11:19.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:11:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:11:19.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:11:19.821 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:11:20.303 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:11:20.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:11:21.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:11:21.746 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:11:22.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:11:22.709 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:11:23.192 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:11:23.665 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:11:24.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:11:24.608 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:11:25.086 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:11:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:11:26.042 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:11:26.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:11:26.999 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:11:27.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:11:27.962 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:11:28.444 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:11:28.926 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:11:29.407 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:11:29.880 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:11:30.354 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:11:30.835 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:11:31.313 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:11:31.787 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:11:32.255 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:11:32.732 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:11:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:11:33.690 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:11:34.171 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:11:34.652 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:11:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:11:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:11:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:11:36.567 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:11:37.045 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:11:37.525 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:11:38.003 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:11:38.480 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:11:38.949 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:11:39.418 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:11:39.900 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:11:40.382 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:11:40.863 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:11:41.345 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:11:41.827 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:11:42.309 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:11:42.790 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:11:43.272 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:11:43.753 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:11:44.233 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:11:44.712 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:11:45.193 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:11:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:11:46.157 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:11:46.637 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:11:47.105 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:11:47.575 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:11:48.053 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:11:48.534 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:11:49.016 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:11:49.497 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:11:49.979 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:11:50.461 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:11:50.942 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:11:51.424 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:11:51.905 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:11:52.387 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:11:52.869 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:11:53.351 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:11:53.820 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:11:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:11:54.768 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:11:55.250 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:11:55.730 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:11:56.212 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:11:56.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:11:56.694 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:11:57.176 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:11:57.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:11:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:11:58.139 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:11:58.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:11:58.620 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:11:59.102 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:11:59.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:11:59.583 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:12:00.052 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:12:00.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:00.521 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:12:01.000 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:01.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:12:01.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:12:01.369 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:12:06.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:12:06.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:12:06.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:06.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:06.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:06.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:06.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:06.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:12:06.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:06.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:12:06.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:12:06.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:12:06.385 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:12:06.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:12:06.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:06.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:06.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:12:06.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:12:06.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:12:06.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:06.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:12:06.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:12:06.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:12:06.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:06.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:06.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:12:06.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:12:06.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:12:06.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:06.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:12:06.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:12:06.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:12:06.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:06.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:06.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:12:06.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:12:06.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:12:06.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:06.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:12:06.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:12:06.394 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:12:06.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:06.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:06.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:12:06.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:12:06.918 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:12:06.918 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:06.919 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:12:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:06.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:06.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:06.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:06.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:06.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:06.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:06.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:06.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:06.976 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:06.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:06.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:06.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:06.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:06.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:07.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:12:07.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:07.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:07.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:07.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:07.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:12:07.853 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:08.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:12:08.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:08.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:08.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:08.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:08.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:12:09.271 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:12:09.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:09.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:09.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:09.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:09.749 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:12:10.227 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:12:10.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:10.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:10.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:10.705 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:12:10.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:10.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:10.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:10.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:10.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:10.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:10.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:10.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:10.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:10.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:10.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:10.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:10.846 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:10.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:10.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:12:11.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:11.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:11.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:11.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:11.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:12:11.991 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:12.140 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:12:12.618 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:12:13.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:12:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:12:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:12:14.544 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:12:14.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:14.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:14.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:14.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:14.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:14.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:14.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:14.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:14.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:14.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:14.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:14.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:14.961 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:14.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:14.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:14.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:14.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:14.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:15.022 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:12:15.459 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:15.499 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:12:15.977 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:12:16.454 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:12:16.932 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:12:17.410 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:12:17.888 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:12:18.365 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:12:18.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:18.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:18.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:18.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:18.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:18.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:18.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:18.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:18.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:18.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:18.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:18.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:18.833 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:18.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:18.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:18.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:18.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:12:19.320 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:12:19.711 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:19.798 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:12:20.188 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:20.277 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:12:20.755 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:12:21.145 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:21.233 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:12:21.710 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:12:22.188 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:12:22.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:22.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:22.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:22.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:22.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:22.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:22.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:22.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:22.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:22.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:12:22.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:12:22.597 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:22.598 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:27.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:12:27.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:12:27.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:27.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:27.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:27.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:27.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:27.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:12:27.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:27.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:12:27.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:12:27.609 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:12:27.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:12:27.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:12:27.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:27.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:27.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:12:27.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:12:27.611 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:12:27.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:27.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:12:27.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:12:27.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:12:27.613 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:27.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:27.613 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:12:27.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:12:27.613 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:12:27.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:27.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:12:27.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:12:27.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:12:27.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:12:27.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:27.616 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:12:27.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:12:27.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:12:27.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:12:27.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:12:27.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:12:27.620 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:12:27.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:12:27.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:12:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:12:27.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:12:28.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:12:28.152 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:12:28.154 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:28.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:28.156 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:12:28.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:28.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:28.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:28.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:28.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:28.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:28.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:28.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:28.202 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:28.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:28.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:28.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:28.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:28.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:28.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:12:28.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:28.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:28.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:28.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:29.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:12:29.080 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:29.083 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:29.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:12:29.567 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:29.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:29.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:29.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:30.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:12:30.054 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:30.498 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:12:30.541 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:30.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:30.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:30.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:30.975 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:12:31.028 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:31.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:12:31.515 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:31.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:31.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:31.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:31.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:31.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:12:32.002 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:32.409 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:12:32.489 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:32.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:32.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:32.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:32.887 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:12:32.977 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:33.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:12:33.464 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:33.843 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:12:33.951 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:34.322 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:12:34.439 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:34.800 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:12:34.926 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:12:35.414 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:35.756 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:12:35.901 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:36.234 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:12:36.388 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:36.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:36.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:36.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:36.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:36.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:36.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:36.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:36.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:36.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:36.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:36.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:36.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:36.415 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:36.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:36.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:36.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:36.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:36.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:36.711 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:12:37.115 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:37.189 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:12:37.602 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:37.605 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:12:38.090 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:38.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:12:38.577 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:38.623 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:12:39.064 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:12:39.559 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:39.587 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:12:40.046 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:40.065 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:12:40.534 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:40.543 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:12:41.021 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:41.021 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:12:41.499 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:12:41.516 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:41.978 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:12:42.003 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:42.456 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:12:42.491 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:42.934 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:12:42.978 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:43.412 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:12:43.465 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:43.890 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:12:43.953 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:44.368 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:12:44.440 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:44.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:44.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:44.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:44.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:44.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:44.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:44.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:44.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:44.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:44.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:44.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:44.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:44.509 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:44.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:44.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:44.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:44.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:44.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:44.805 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:44.846 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:12:45.282 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:45.284 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:45.324 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:12:45.760 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:45.802 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:12:46.238 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:46.280 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:12:46.716 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:46.758 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:12:47.194 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:47.235 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:12:47.671 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:47.713 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:12:48.149 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:48.190 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:12:48.626 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:48.668 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:12:49.103 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:49.146 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:12:49.581 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:49.623 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:12:50.059 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:50.101 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:12:50.537 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:12:51.014 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:51.056 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:12:51.492 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:51.534 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:12:51.970 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:51.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:51.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:51.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:51.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:51.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:51.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:51.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:12:51.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:51.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:51.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:51.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:12:51.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:12:52.001 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:52.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:52.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:12:52.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:12:52.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:52.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:52.011 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:12:52.402 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:52.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:12:52.879 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:52.882 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:52.967 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:12:53.356 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:53.358 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:12:53.834 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:53.922 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:12:54.312 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:54.315 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:12:54.399 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:12:54.790 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:54.878 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:12:55.268 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:55.356 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:12:55.746 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:55.833 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:12:56.223 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:56.310 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:12:56.700 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:56.788 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:12:57.178 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:57.266 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:12:57.656 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:12:58.135 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:58.223 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:12:58.613 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:58.701 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:12:59.092 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:59.180 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:12:59.570 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:12:59.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:12:59.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:12:59.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:12:59.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:12:59.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:12:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:12:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:12:59.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:12:59.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:12:59.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:12:59.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:12:59.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:12:59.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:12:59.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:12:59.593 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.593 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:12:59.594 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:04.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:04.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:04.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:04.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:04.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:04.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:04.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:04.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:04.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:04.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:04.604 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:04.604 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:04.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:04.604 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:04.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:04.604 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:04.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:04.605 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:04.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:04.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:04.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:04.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:04.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:04.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:04.607 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:04.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:04.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:04.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:04.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:04.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:04.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:04.614 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:04.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:04.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:05.102 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:05.144 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:05.144 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:05.144 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:05.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:05.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:05.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:05.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:05.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:05.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:05.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:05.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:05.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:05.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:05.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:05.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:05.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:05.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:05.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:05.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:05.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:05.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:06.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:06.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:06.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:06.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:07.014 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:07.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:07.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:07.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:07.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:07.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:07.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:07.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:07.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:07.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:07.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:07.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:07.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:07.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:07.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:07.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:07.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:07.489 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:13:07.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:07.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:07.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:07.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:13:08.444 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:13:08.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:08.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:08.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:08.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:13:09.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:13:09.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:09.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:09.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:09.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:09.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:09.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:09.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:09.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:09.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:09.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:09.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:09.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:09.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:09.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:09.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:09.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:09.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:09.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:09.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:09.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:09.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:09.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:13:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:13:10.834 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:13:11.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:13:11.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:11.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:11.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:11.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:11.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:11.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:11.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:11.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:11.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:11.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:11.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:11.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:11.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:11.648 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:11.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:11.648 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:11.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:16.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:16.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:16.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:16.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:16.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:16.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:16.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:16.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:16.658 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:16.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:16.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:16.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:16.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:16.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:16.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:16.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:16.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:16.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:16.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:16.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:16.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:16.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:16.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:16.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:16.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:16.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:16.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:16.668 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:16.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:16.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:17.157 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:17.186 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:17.187 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:17.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:17.188 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:17.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:17.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:17.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:17.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:17.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:17.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:17.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:17.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:17.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:17.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:17.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:17.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:17.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:17.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:17.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:17.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:17.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:18.112 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:18.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:18.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:18.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:18.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:18.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:19.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:19.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:19.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:19.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:19.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:19.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:19.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:19.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:19.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:19.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:19.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:19.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:19.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:19.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:19.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:19.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:19.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:19.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:19.546 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:13:19.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:19.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:19.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:19.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:20.024 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:13:20.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:13:20.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:20.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:20.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:20.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:20.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:13:21.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:21.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:21.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:21.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:21.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:13:21.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:21.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:21.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:21.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:21.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:21.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:21.463 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:21.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:26.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:26.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:26.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:26.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:26.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:26.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:26.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:26.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:26.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:26.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:26.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:26.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:26.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:26.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:26.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:26.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:26.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:26.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:26.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:26.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:26.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:26.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:26.477 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:26.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:26.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:26.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:26.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:26.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:26.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:26.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:26.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:26.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:26.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:26.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:26.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:26.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:26.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:26.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:26.482 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:26.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:26.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:26.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:27.005 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:27.006 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:27.007 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:27.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:27.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:27.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:27.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:27.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:27.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:27.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:27.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:27.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:27.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:27.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:27.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:27.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:27.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:27.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:27.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:27.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:27.928 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:28.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:28.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:28.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:28.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:28.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:28.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:29.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:29.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:29.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:29.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:29.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:29.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:29.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:29.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:29.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:29.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:29.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:29.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:29.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:29.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:29.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:29.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:29.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:13:29.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:29.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:29.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:29.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:29.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:13:30.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:13:30.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:30.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:30.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:30.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:30.795 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:13:31.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:31.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:31.273 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:13:31.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:31.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:31.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:31.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:31.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:31.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:31.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:31.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:31.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:31.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:31.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:31.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:31.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:31.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:31.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:31.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:31.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:31.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:31.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:31.751 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:13:32.229 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:13:32.707 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:13:33.185 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:13:33.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:33.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:33.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:33.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:33.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:33.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:33.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:33.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:33.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:33.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:33.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:33.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:33.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:33.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:33.425 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:33.425 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:38.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:38.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:38.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:38.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:38.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:38.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:38.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:38.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:38.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:38.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:38.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:38.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:38.433 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:38.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:38.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:38.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:38.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:38.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:38.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:38.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:38.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:38.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:38.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:38.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:38.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:38.437 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:38.437 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:38.442 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:38.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:38.960 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:38.962 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:38.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:38.965 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:38.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:38.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:38.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:38.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:38.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:38.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:38.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:38.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:39.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:39.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:39.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:39.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:39.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:39.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:39.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:39.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:39.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:39.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:39.880 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:40.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:40.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:40.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:40.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:40.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:41.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:41.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:41.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:41.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:41.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:41.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:41.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:41.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:41.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:41.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:41.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:41.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:41.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:41.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:41.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:41.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:13:41.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:41.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:41.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:41.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:41.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:13:42.270 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:13:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:42.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:42.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:42.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:42.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:13:43.225 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:13:43.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:43.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:43.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:43.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:43.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:43.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:43.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:43.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:43.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:43.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:43.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:43.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:43.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:43.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:43.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:43.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:43.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:43.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:43.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:48.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:48.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:48.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:48.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:48.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:48.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:48.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:48.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:48.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:48.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:48.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:48.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:48.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:48.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:48.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:48.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:48.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:48.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:48.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:48.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:48.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:48.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:48.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:48.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:48.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:48.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:48.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:48.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:48.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:48.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:48.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:48.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:48.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:48.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:48.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:48.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:48.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:48.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:48.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:48.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:48.308 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:48.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:48.313 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:48.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:48.843 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:48.846 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:48.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:48.848 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:48.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:48.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:48.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:48.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:48.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:48.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:48.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:48.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:48.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:48.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:48.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:48.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:48.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:49.273 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:49.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:49.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:49.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:49.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:49.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:50.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:50.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:50.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:50.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:50.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:50.707 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:51.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:51.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:51.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:51.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:51.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:51.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:51.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:51.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:51.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:51.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:51.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:51.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:51.100 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:51.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:51.101 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:56.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:56.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:56.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:56.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:56.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:56.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:56.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:56.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:56.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:56.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:13:56.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:13:56.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:13:56.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:13:56.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:56.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:56.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:56.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:13:56.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:13:56.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:13:56.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:56.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:13:56.115 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:13:56.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:56.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:56.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:56.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:13:56.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:13:56.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:13:56.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:56.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:13:56.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:13:56.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:56.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:13:56.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:56.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:13:56.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:13:56.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:13:56.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:13:56.121 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:13:56.121 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:13:56.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:13:56.126 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:13:56.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:13:56.655 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:13:56.657 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:13:56.659 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:13:56.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:56.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:56.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:56.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:13:56.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:56.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:56.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:56.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:13:56.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:13:56.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:56.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:13:56.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:13:56.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:56.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:57.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:13:57.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:57.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:57.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:57.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:57.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:13:58.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:13:58.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:58.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:58.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:58.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:58.520 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:13:58.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:13:58.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:13:58.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:13:58.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:13:58.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:13:58.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:13:58.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:13:58.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:13:58.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:13:58.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:13:58.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:13:58.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:13:58.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:13:58.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:13:58.889 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:13:58.889 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=591 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:58.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=591 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:58.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=591 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:58.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=591 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:58.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:13:58.890 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:03.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:03.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:03.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:03.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:03.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:03.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:03.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:03.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:03.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:03.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:03.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:03.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:03.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:03.904 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:03.904 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:03.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:03.904 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:03.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:03.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:03.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:03.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:03.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:03.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:03.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:03.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:03.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:03.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:03.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:03.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:03.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:03.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:03.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:03.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:03.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:03.913 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:03.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:03.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:04.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:04.443 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:04.445 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:04.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:04.447 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:04.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:04.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:04.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:04.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:04.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:04.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:04.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:04.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:04.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:04.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:04.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:04.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:04.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:04.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:04.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:04.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:04.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:04.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:04.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:04.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:04.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:04.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:04.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:04.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:04.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:04.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:04.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:04.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:05.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:05.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:05.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:05.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:05.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:14:05.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:05.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:05.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:05.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:05.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:05.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:05.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:05.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:05.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:05.362 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:05.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:10.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:10.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:10.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:10.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:10.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:10.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:10.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:10.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:10.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:10.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:10.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:10.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:10.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:10.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:10.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:10.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:10.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:10.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:10.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:10.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:10.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:10.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:10.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:10.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:10.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:10.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:10.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:10.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:10.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:10.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:10.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:10.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:10.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:10.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:10.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:10.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:10.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:10.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:10.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:10.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:10.385 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:10.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:10.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:10.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:10.874 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:10.916 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:10.918 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:10.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:10.920 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:10.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:10.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:10.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:10.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:10.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:10.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:10.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:10.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:11.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:11.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:11.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:11.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:11.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:11.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:11.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:11.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:11.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:11.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:11.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:11.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:11.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:11.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:11.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:11.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:11.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:11.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:11.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:11.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:11.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:11.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:11.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:14:11.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:11.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:11.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:11.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:11.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:11.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:11.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:11.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:11.828 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:11.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:11.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:16.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:16.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:16.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:16.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:16.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:16.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:16.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:16.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:16.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:16.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:16.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:16.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:16.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:16.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:16.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:16.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:16.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:16.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:16.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:16.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:16.847 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:16.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:16.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:16.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:16.849 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:16.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:16.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:16.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:16.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:16.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:16.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:16.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:16.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:16.854 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:16.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:16.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:17.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:17.381 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:17.381 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:17.382 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:17.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:17.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:17.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:17.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:17.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:17.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:17.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:17.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:17.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:17.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:17.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:17.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:17.819 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:17.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:17.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:17.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:17.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:17.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:17.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:17.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:17.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:17.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:17.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:17.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:17.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:17.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:17.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:17.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:17.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:17.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:17.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:18.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:18.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:18.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:18.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:18.297 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:14:18.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:18.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:18.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:18.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:18.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:18.301 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:23.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:23.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:23.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:23.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:23.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:23.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:23.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:23.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:23.329 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:23.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:23.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:23.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:23.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:23.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:23.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:23.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:23.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:23.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:23.338 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:23.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:23.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:23.341 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:23.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:23.341 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:23.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:23.341 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:23.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:23.341 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:23.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:23.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:23.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:23.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:23.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:23.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:23.349 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:23.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:23.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:23.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:23.879 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:23.880 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:23.882 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:23.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:23.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:23.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:23.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:23.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:23.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:23.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:23.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:23.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:23.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:23.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:23.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:23.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:23.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:24.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:24.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:24.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:24.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:24.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:14:25.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:14:25.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:25.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:25.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:25.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:25.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:14:26.226 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:14:26.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:26.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:26.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:26.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:26.705 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:14:27.183 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:14:27.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:27.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:27.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:27.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:27.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:14:27.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:27.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:27.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:27.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:27.993 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:32.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:32.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:32.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:32.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:32.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:33.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:33.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:33.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:33.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:33.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:33.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:33.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:33.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:33.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:33.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:33.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:33.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:33.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:33.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:33.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:33.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:33.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:33.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:33.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:33.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:33.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:33.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:33.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:33.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:33.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:33.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:33.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:33.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:33.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:33.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:33.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:33.022 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:33.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:33.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:33.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:33.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:33.560 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:33.562 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:33.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:33.565 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:33.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:33.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:33.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:33.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:33.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:33.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:33.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:33.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:33.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:33.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:33.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:33.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:33.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:33.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:33.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:33.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:33.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:33.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:33.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:33.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:33.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:33.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:33.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:33.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:34.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:34.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:34.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:34.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:34.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:34.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:34.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:34.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:34.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:34.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:34.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:34.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:34.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:34.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:34.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:34.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:34.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:34.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:34.169 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:34.170 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:39.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:39.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:39.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:39.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:39.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:39.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:39.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:39.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:39.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:39.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:39.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:39.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:39.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:39.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:39.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:39.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:39.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:39.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:39.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:39.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:39.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:39.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:39.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:39.191 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:39.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:39.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:39.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:39.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:39.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:39.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:39.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:39.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:39.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:39.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:39.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:39.197 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:39.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:39.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:39.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:39.738 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:39.739 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:39.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:39.740 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:39.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:39.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:39.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:39.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:39.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:39.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:39.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:39.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:39.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:39.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:39.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:39.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:39.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:40.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:40.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:40.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:40.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:40.642 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:14:41.120 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:14:41.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:41.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:41.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:41.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:41.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:14:42.076 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:14:42.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:42.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:42.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:42.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:14:43.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:14:43.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:43.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:43.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:43.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:43.511 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:14:43.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:43.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:43.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:43.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:43.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:43.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:43.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:43.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:43.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:43.842 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:48.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:48.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:48.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:48.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:48.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:48.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:48.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:48.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:48.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:48.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:48.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:48.862 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:48.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:48.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:48.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:48.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:48.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:48.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:48.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:48.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:48.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:48.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:48.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:48.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:48.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:48.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:48.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:48.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:48.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:48.866 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:48.866 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:48.866 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:48.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:48.868 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:48.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:48.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:48.869 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:48.869 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:48.874 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:49.358 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:49.393 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:49.395 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:49.396 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:49.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:49.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:49.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:49.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:49.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:49.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:49.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:49.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:49.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:49.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:49.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:49.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:49.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:49.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:49.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:49.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:49.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:49.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:50.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:50.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:50.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:50.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:50.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:50.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:50.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:50.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:50.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:50.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:50.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:50.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:50.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:50.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:50.183 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:50.184 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:14:55.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:55.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:55.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:55.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:55.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:55.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:55.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:55.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:55.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:55.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:14:55.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:14:55.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:14:55.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:14:55.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:55.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:55.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:55.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:14:55.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:14:55.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:14:55.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:55.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:14:55.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:14:55.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:55.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:14:55.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:14:55.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:14:55.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:14:55.205 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:14:55.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:14:55.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:14:55.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:14:55.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:14:55.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:14:55.728 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:14:55.729 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:14:55.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:55.731 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:14:55.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:55.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:55.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:14:55.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:55.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:55.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:55.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:14:55.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:14:55.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:55.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:14:55.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:14:55.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:55.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:56.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:14:56.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:56.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:56.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:56.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:56.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:14:56.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:14:56.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:14:56.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:14:56.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:14:56.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:14:56.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:14:56.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:14:56.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:14:56.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:14:56.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:14:56.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:14:56.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:14:56.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:14:56.575 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:01.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:01.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:01.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:01.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:01.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:01.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:01.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:01.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:01.590 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:01.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:01.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:01.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:01.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:01.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:01.592 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:01.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:01.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:01.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:01.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:01.593 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:01.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:01.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:01.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:01.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:01.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:01.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:01.594 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:01.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:01.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:01.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:01.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:01.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:01.598 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:01.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:01.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:02.087 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:02.120 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:02.122 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:02.124 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:02.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:02.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:02.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:02.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:02.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:02.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:02.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:02.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:02.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:02.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:02.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:02.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:02.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:02.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:02.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:02.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:02.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:02.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:02.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:02.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:02.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:02.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:02.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:02.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:02.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:02.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:02.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:02.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:02.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:02.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:02.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:02.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:02.967 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:02.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:07.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:07.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:07.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:07.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:07.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:07.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:07.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:07.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:07.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:07.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:07.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:07.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:07.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:07.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:07.989 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:07.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:07.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:07.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:07.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:07.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:07.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:07.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:07.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:07.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:07.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:07.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:07.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:07.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:07.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:07.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:07.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:07.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:07.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:07.995 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:07.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:07.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:07.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:08.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:08.517 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:08.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:08.519 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:08.520 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:08.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:08.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:08.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:08.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:08.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:08.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:08.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:08.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:08.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:08.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:08.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:08.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:08.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:08.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:08.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:08.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:09.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:09.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:15:09.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:09.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:09.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:09.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:09.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:09.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:09.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:09.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:09.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:09.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:09.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:09.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:09.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:09.507 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.508 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:09.509 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:14.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:14.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:14.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:14.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:14.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:14.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:14.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:14.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:14.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:14.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:14.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:14.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:14.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:14.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:14.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:14.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:14.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:14.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:14.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:14.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:14.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:14.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:14.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:14.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:14.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:14.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:14.536 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:14.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:14.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:14.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:14.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:14.537 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:14.537 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:14.537 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:14.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:14.542 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:15.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:15.068 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:15.069 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:15.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:15.071 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:15.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:15.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:15.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:15.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:15.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:15.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:15.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:15.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:15.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:15.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:15.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:15.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:15.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:15.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:15.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:15.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:15.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:15.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:15.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:15.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:15.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:15.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:15.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:15.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:15.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:15.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:15.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:15.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:15.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:15.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:15.902 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:15.902 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:20.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:20.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:20.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:20.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:20.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:20.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:20.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:20.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:20.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:20.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:20.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:20.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:20.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:20.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:20.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:20.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:20.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:20.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:20.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:20.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:20.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:20.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:20.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:20.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:20.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:20.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:20.928 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:20.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:20.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:20.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:20.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:21.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:21.446 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:21.447 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:21.448 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:21.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:21.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:21.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:21.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:21.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:21.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:21.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:21.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:21.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:21.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:21.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:21.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:21.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:21.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:21.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:21.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:21.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:21.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:21.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:22.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:22.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:22.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:22.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:22.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:22.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:22.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:22.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:22.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:22.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:22.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:22.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:22.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:22.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:22.357 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:22.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:27.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:27.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:27.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:27.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:27.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:27.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:27.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:27.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:27.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:27.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:27.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:27.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:27.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:27.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:27.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:27.380 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:27.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:27.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:27.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:27.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:27.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:27.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:27.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:27.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:27.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:27.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:27.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:27.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.386 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:27.386 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:27.386 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:27.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:27.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:27.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:27.912 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:27.913 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:27.914 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:27.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:27.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:27.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:27.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:27.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:27.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:27.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:27.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:27.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:28.352 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:28.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:28.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:28.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:28.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:28.830 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:15:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:29.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:29.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:29.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:29.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:29.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:29.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:29.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:29.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:29.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:29.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:29.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:29.302 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:15:29.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:29.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:29.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:29.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:29.779 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:15:30.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:15:30.258 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:15:30.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:15:30.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:30.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:30.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:30.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:30.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:30.305 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:30.306 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:35.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:35.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:35.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:35.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:35.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:35.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:35.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:35.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:35.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:35.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:35.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:35.313 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:35.313 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:35.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:35.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:35.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:35.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:35.317 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:35.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:35.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:35.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:35.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:35.321 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:35.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:35.326 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:35.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:35.851 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:35.853 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:35.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:35.854 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:35.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:35.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:35.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:35.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:35.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:35.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:35.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:35.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:36.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:36.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:36.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:36.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:36.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:36.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:15:37.241 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:15:37.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:37.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:37.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:37.719 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:15:38.197 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:15:38.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:38.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:38.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:38.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:15:39.152 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:15:39.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:39.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:39.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:15:40.108 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:15:40.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:40.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:40.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:40.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:40.586 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:15:40.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:15:40.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:40.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:40.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:40.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:41.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:15:41.542 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:15:42.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:15:42.499 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:15:42.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:15:43.455 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:15:43.932 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:15:44.411 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:15:44.890 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:15:45.368 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:15:45.861 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:15:46.335 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:15:46.804 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:15:47.275 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:15:47.752 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:15:48.221 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:15:48.690 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:15:49.160 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:15:49.631 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:15:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:15:50.586 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:15:51.064 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:15:51.542 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:15:52.021 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:15:52.499 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:15:52.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:15:52.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:52.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:52.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:52.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:52.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:52.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:52.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:52.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:52.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:52.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:52.781 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:52.782 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3735 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:15:57.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:15:57.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:15:57.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:57.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:57.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:57.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:57.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:15:57.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:57.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:57.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:15:57.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:15:57.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:15:57.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:15:57.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:57.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:57.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:15:57.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:15:57.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:15:57.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:15:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:57.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:15:57.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:15:57.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:57.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:57.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:15:57.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:15:57.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:15:57.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:15:57.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:57.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:15:57.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:15:57.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:15:57.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:15:57.817 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:15:57.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:15:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:15:58.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:15:58.344 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:15:58.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:15:58.345 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:15:58.345 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:15:58.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:15:58.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:15:58.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:15:58.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:15:58.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:15:58.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:15:58.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:15:58.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:15:58.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:15:58.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:58.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:58.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:58.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:15:59.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:15:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:15:59.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:15:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:15:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:15:59.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:16:00.694 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:16:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:00.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:00.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:16:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:16:01.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:01.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:01.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:01.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:02.127 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:16:02.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:16:02.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:02.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:02.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:02.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:03.083 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:16:03.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:03.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:03.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:03.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:03.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:16:04.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:16:04.514 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:16:04.992 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:16:05.472 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:16:05.950 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:16:06.429 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:16:06.898 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:16:07.367 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:16:07.838 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:16:08.309 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:16:08.780 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:16:09.258 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:16:09.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:09.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:09.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:09.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:09.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:09.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:09.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:09.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:09.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:09.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:09.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:09.427 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:16:09.427 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:09.427 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:09.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:09.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:09.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:09.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2486 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:14.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:14.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:14.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:14.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:14.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:14.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:14.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:14.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:14.437 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:14.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:14.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:14.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:16:14.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:14.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:16:14.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:14.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:14.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:16:14.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:14.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:14.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:16:14.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:16:14.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:16:14.451 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:16:14.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:14.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:14.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:16:14.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:16:14.977 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:16:14.978 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:16:14.979 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:16:14.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:16:14.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:14.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:14.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:16:14.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:14.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:14.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:14.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:16:14.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:16:15.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:16:15.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:15.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:15.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:15.895 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:16:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:16:16.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:16.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:16.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:16.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:16:17.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:16:17.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:17.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:17.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:17.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:17.807 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:16:18.285 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:16:18.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:18.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:18.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:18.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:18.762 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:16:19.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:16:19.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:19.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:19.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:19.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:19.718 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:16:19.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:19.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:19.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:19.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:19.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:20.196 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:16:20.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:16:21.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:16:21.631 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:16:22.110 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:16:22.589 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:16:23.067 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:16:23.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:23.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:23.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:23.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:23.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:23.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:23.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:23.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:23.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:23.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:23.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:23.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:23.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:23.179 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:16:23.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:23.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:28.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:28.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:28.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:28.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:28.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:28.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:28.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:28.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:28.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:28.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:28.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:16:28.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:16:28.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:16:28.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:28.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:28.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:28.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:16:28.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:28.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:16:28.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:28.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:28.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:16:28.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:28.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:28.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:16:28.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:16:28.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:16:28.204 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:16:28.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:28.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:16:28.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:16:28.735 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:16:28.737 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:16:28.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:16:28.740 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:16:28.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:28.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:28.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:16:28.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:28.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:28.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:28.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:16:28.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:16:29.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:16:29.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:29.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:29.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:29.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:29.646 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:16:30.124 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:16:30.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:30.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:30.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:30.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:30.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:16:31.080 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:16:31.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:31.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:31.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:31.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:31.558 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:16:32.036 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:16:32.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:32.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:32.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:32.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:16:32.992 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:16:33.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:33.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:33.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:33.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:33.469 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:16:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:33.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:33.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:33.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:33.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:16:34.426 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:16:34.904 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:16:35.383 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:16:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:16:36.340 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:16:36.818 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:16:36.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:36.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:36.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:36.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:36.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:36.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:36.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:36.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:36.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:36.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:36.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:36.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:36.924 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:16:41.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:41.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:41.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:41.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:41.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:41.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:41.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:41.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:41.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:16:41.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:16:41.941 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:16:41.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:41.941 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:41.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:41.942 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:16:41.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:41.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:16:41.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:41.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:16:41.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:16:41.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:41.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:41.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:41.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:16:41.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:41.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:16:41.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:41.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:41.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:41.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:16:41.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:16:41.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:16:41.951 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:16:41.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:41.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:16:42.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:16:42.477 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:16:42.479 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:16:42.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:16:42.480 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:16:42.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:42.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:42.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:16:42.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:42.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:42.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:42.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:16:42.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:16:42.917 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:16:42.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:42.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:42.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:42.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:43.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:16:43.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:16:43.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:43.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:43.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:43.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:44.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:16:44.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:16:44.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:44.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:44.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:44.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:16:45.784 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:16:45.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:45.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:45.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:45.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:46.262 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:16:46.739 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:16:46.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:46.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:46.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:46.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:47.217 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:16:47.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:47.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:16:47.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:16:47.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:47.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:47.695 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:16:48.175 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:16:48.653 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:16:49.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:16:49.610 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:16:50.088 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:16:50.566 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:16:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:16:50.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:16:50.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:16:50.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:16:50.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:50.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:50.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:50.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:50.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:50.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:50.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:50.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:50.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:50.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:50.679 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:50.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:16:55.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:16:55.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:16:55.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:55.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:55.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:55.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:55.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:16:55.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:55.691 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:55.691 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:16:55.691 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:16:55.693 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:16:55.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:16:55.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:55.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:55.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:16:55.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:16:55.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:16:55.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:16:55.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:55.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:16:55.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:16:55.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:55.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:55.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:16:55.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:16:55.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:16:55.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:16:55.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:55.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:16:55.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:16:55.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:55.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:16:55.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:16:55.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:16:55.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:16:55.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:16:55.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:16:55.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:16:55.702 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:16:55.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:16:55.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:16:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:16:56.229 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:16:56.230 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:16:56.231 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:16:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:16:56.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:16:56.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:56.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:56.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:56.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:57.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:16:57.632 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:16:57.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:57.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:57.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:57.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:58.113 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:16:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:16:58.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:58.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:58.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:58.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:16:59.073 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:16:59.553 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:16:59.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:16:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:16:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:16:59.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:00.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:17:00.516 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:17:00.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:00.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:00.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:00.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:00.998 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:17:01.479 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:17:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:17:02.436 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:17:02.914 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:17:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:17:03.875 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:17:04.357 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:17:04.832 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:17:05.310 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:17:05.790 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:17:06.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:06.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:06.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:06.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:06.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:06.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:06.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:06.246 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:06.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.246 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2241 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.247 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:06.248 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:11.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:11.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:11.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:11.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:11.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:11.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:11.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:11.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:11.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:11.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:11.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:11.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:11.264 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:11.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:11.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:11.267 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:11.267 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:11.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:11.267 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:11.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:11.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:11.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:11.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:11.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:11.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:11.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:11.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:11.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:11.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:11.271 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:11.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:11.271 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:11.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:11.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:11.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:11.275 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:11.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:11.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:11.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:11.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:11.277 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:16.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:16.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:16.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:16.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:16.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:16.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:16.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:16.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:16.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:16.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:16.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:16.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:16.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:16.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:16.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:16.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:16.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:16.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:16.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:16.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:16.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:16.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:16.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:16.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:16.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:16.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:16.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:16.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:16.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:16.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:16.307 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:16.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:16.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:17:16.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:17:16.834 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:17:16.836 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:17:16.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:17:16.838 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:17:16.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:17:16.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:17:16.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:17:16.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:17:16.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:17:16.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:17:16.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:17:16.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:17:17.273 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:17:17.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:17.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:17.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:17.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:17.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:17:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:17:18.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:18.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:18.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:18.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:18.706 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:17:19.184 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:17:19.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:19.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:19.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:19.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:19.662 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:17:20.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:17:20.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:20.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:20.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:20.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:20.618 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:17:21.095 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:17:21.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:21.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:21.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:21.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:21.573 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:17:22.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:17:22.525 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:17:23.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:17:23.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:17:23.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:17:24.435 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:17:24.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:17:24.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:24.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:24.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:24.893 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:24.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:24.894 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:29.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:29.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:29.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:29.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:29.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:29.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:29.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:29.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:29.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:29.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:29.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:29.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:29.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:29.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:29.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:29.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:29.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:29.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:29.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:29.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:29.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:29.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:29.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:29.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:29.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:29.916 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:29.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:29.916 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:29.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:29.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:29.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:29.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:29.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:29.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:29.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:29.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:29.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:29.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:29.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:29.921 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:29.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:29.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:29.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:29.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:29.923 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:34.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:34.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:34.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:34.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:34.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:34.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:34.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:34.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:34.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:34.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:34.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:34.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:34.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:34.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:34.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:34.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:34.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:34.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:34.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:34.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:34.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:34.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:34.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:34.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:34.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:34.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:34.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:34.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:34.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:34.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:34.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:34.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:34.952 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:34.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:34.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:34.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:17:35.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:17:35.480 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:17:35.482 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:17:35.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:17:35.483 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:17:35.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:17:35.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:17:35.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:17:35.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:17:35.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:17:35.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:17:35.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:17:35.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:17:35.917 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:17:35.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:35.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:35.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:35.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:36.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:17:36.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:17:36.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:36.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:36.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:36.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:37.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:17:37.828 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:17:37.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:37.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:37.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:37.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:17:38.784 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:17:38.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:38.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:38.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:38.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:39.262 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:17:39.740 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:17:39.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:39.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:39.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:39.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:40.218 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:17:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:17:41.174 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:17:41.652 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:17:42.129 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:17:42.607 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:17:43.085 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:17:43.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:17:43.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:17:43.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:43.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:43.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:43.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:43.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:43.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:43.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:43.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:43.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:43.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:43.541 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:43.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:17:48.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:48.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:48.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:48.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:48.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:48.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:48.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:48.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:48.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:48.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:48.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:48.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:48.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:48.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:48.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:48.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:48.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:48.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:48.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:48.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:48.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:48.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:48.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:48.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:48.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:48.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:48.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:48.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:48.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:48.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:48.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:48.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:48.581 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:48.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:48.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:48.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:48.583 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:17:53.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:17:53.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:17:53.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:53.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:53.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:53.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:53.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:17:53.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:53.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:53.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:17:53.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:17:53.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:17:53.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:17:53.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:53.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:53.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:17:53.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:17:53.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:17:53.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:17:53.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:53.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:17:53.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:17:53.605 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:17:53.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:53.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:17:53.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:17:53.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:53.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:17:53.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:17:53.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:17:53.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:17:53.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:17:53.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.609 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:17:53.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:17:53.610 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:17:53.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:17:53.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:17:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:17:54.133 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:17:54.134 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:17:54.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:17:54.135 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:17:54.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:17:54.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:17:54.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:17:54.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:17:54.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:17:54.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:17:54.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:17:54.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:17:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:17:54.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:54.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:54.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:54.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:55.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:17:55.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:17:55.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:55.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:56.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:17:56.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:17:56.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:56.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:56.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:56.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:56.965 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:17:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:17:57.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:57.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:57.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:57.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:57.920 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:17:58.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:17:58.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:17:58.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:17:58.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:17:58.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:17:58.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:17:59.354 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:17:59.832 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:18:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:18:00.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:18:01.265 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:18:01.743 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:18:02.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:02.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:02.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:02.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:02.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:02.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:02.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:02.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:02.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:02.154 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:02.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:07.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:07.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:07.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:07.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:07.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:07.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:07.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:07.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:07.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:07.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:07.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:07.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:07.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:07.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:07.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:07.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:07.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:07.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:07.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:07.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:07.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:07.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:07.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:07.180 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:07.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:07.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:07.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:07.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:07.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:07.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:07.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:07.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:07.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:07.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:07.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:07.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:07.187 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:07.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:07.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:07.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:07.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:07.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:07.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:07.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:07.190 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:12.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:12.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:12.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:12.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:12.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:12.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:12.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:12.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:12.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:12.207 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:12.207 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:12.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:12.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:12.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:12.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:12.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:12.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:12.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:12.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:12.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:12.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:12.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:12.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:12.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:12.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:12.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:12.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:12.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:12.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:12.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:12.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:12.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:12.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:12.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:12.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:12.219 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:12.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:12.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:18:12.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:18:12.741 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:18:12.743 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:18:12.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:18:12.744 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:18:12.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:12.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:18:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:18:12.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:18:12.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:18:12.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:18:12.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:18:13.185 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:18:13.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:13.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:13.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:13.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:13.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:18:14.141 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:18:14.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:14.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:14.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:14.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:18:15.097 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:18:15.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:15.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:15.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:15.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:15.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:18:16.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:18:16.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:16.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:16.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:16.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:18:17.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:18:17.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:17.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:17.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:18:17.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:18:18.442 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:18:18.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:18:19.398 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:18:19.876 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:18:20.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:18:20.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:20.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:20.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:20.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:20.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:20.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:20.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:20.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:20.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:20.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:20.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:20.762 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:20.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:20.762 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1824 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:25.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:25.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:25.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:25.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:25.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:25.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:25.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:25.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:25.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:25.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:25.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:25.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:25.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:25.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:25.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:25.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:25.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:25.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:25.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:25.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:25.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:25.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:25.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:25.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:25.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:25.784 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:25.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:25.784 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:25.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:25.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:25.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:25.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:25.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:25.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:25.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:25.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:25.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:25.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:25.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:25.788 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:25.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:25.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:25.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:25.790 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:30.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:30.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:30.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:30.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:30.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:30.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:30.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:30.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:30.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:30.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:30.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:30.812 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:30.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:30.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:30.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:30.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:30.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:30.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:30.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:30.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:30.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:30.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:30.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:30.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:30.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:30.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:30.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:30.818 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:30.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:30.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:30.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:30.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:30.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:30.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:30.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:30.821 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:30.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:30.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:18:31.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:18:31.345 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:18:31.347 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:18:31.348 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:18:31.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:18:31.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:31.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:31.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:18:31.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:18:31.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:18:31.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:18:31.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:18:31.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:18:31.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:18:31.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:31.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:31.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:31.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:32.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:18:32.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:18:32.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:32.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:32.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:32.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:33.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:18:33.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:18:33.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:33.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:33.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:33.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:34.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:18:34.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:18:34.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:34.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:34.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:35.134 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:18:35.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:18:35.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:35.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:35.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:35.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:36.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:18:36.568 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:18:37.046 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:18:37.524 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:18:38.002 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:18:38.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:18:38.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:18:39.433 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:18:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:18:40.402 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:18:40.880 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:18:41.358 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:18:41.835 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:18:42.313 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:18:42.791 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:18:43.269 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:18:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:18:44.225 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:18:44.702 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:18:45.180 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:18:45.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:45.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:45.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:45.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:45.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:45.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:45.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:45.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:45.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:45.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:45.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:45.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:45.368 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:45.368 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:45.368 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:45.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:45.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:45.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:45.369 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3102 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:18:50.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:50.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:50.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:50.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:50.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:50.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:50.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:50.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:50.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:50.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:50.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:50.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:50.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:50.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:50.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:50.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:50.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:50.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:50.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:50.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:50.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:50.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:50.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:50.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:50.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:50.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:50.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:50.382 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:50.382 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:50.382 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:50.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:50.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:50.384 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:18:55.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:18:55.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:18:55.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:55.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:55.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:55.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:55.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:18:55.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:55.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:55.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:18:55.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:18:55.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:18:55.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:18:55.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:55.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:55.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:18:55.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:18:55.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:18:55.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:18:55.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:55.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:18:55.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:18:55.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:55.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:55.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:18:55.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:18:55.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:18:55.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:18:55.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:55.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:55.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:18:55.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:18:55.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:18:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:18:55.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:18:55.433 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:18:55.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:18:55.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:18:55.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:18:55.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:18:55.963 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:18:55.964 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:18:55.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:18:55.966 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:18:55.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:18:55.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:18:55.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:18:55.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:18:55.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:18:55.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:18:55.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:18:55.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:18:56.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:18:56.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:56.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:56.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:56.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:18:57.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:18:57.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:57.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:57.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:57.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:57.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:18:58.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:18:58.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:58.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:58.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:58.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:58.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:18:59.265 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:18:59.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:18:59.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:18:59.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:18:59.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:18:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:19:00.221 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:19:00.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:00.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:00.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:00.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:00.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:19:01.177 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:19:01.654 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:19:02.132 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:19:02.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:19:03.087 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:19:03.565 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:19:04.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:04.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:04.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:04.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:04.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:04.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:04.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:04.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:04.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:04.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:04.024 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:04.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:09.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:09.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:09.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:09.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:09.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:09.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:09.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:09.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:09.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:09.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:09.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:09.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:09.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:09.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:09.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:09.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:09.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:09.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:09.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:09.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:09.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:09.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:09.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:09.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:09.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:09.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:09.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:09.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:09.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:09.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:09.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:09.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:09.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:09.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:09.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:09.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:09.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:09.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:09.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:09.051 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:09.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:09.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:09.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:09.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:09.053 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:14.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:14.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:14.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:14.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:14.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:14.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:14.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:14.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:14.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:14.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:14.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:14.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:14.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:14.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:14.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:14.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:14.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:14.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:14.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:14.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:14.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:14.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:14.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:14.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:14.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:14.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:14.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:14.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:14.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:14.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:14.078 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:14.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:14.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:19:14.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:19:14.606 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:19:14.608 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:19:14.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:19:14.611 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:19:14.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:14.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:14.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:19:14.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:19:14.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:19:14.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:19:14.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:19:14.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:19:15.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:19:15.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:15.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:15.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:15.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:15.519 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:19:15.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:19:16.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:16.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:16.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:16.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:16.475 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:19:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:19:17.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:17.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:17.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:17.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:17.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:19:17.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:19:18.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:18.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:18.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:18.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:18.387 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:19:18.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:19:19.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:19.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:19.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:19.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:19:19.821 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:19:20.299 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:19:20.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:19:21.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:19:21.732 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:19:22.209 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:19:22.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:19:23.165 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:19:23.642 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:19:24.120 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:19:24.598 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:19:24.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:24.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:24.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:24.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:24.664 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:24.665 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:24.665 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:24.665 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:29.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:29.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:29.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:29.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:29.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:29.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:29.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:29.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:29.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:29.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:29.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:29.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:29.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:29.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:29.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:29.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:29.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:29.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:29.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:29.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:29.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:29.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:29.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:29.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:29.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:29.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:29.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:29.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:29.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:29.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:29.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:29.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:29.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:29.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:29.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:29.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:29.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:29.689 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:29.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:29.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:29.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:29.691 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:34.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:34.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:34.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:34.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:34.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:34.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:34.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:34.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:34.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:34.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:34.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:34.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:34.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:34.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:34.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:34.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:34.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:34.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:34.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:34.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:34.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:34.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:34.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:34.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:34.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:34.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:34.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:34.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:34.721 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:34.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:34.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:34.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.722 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:34.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:34.723 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:34.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:34.728 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:19:35.211 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:19:35.258 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:19:35.261 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:19:35.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:19:35.262 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:19:35.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:35.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:35.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:19:35.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:19:35.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:19:35.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:19:35.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:19:35.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:19:35.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:19:35.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:35.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:35.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:35.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:36.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:19:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:19:36.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:36.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:36.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:36.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:37.122 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:19:37.599 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:19:37.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:37.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:37.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:37.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:19:38.554 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:19:38.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:38.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:38.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:38.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:39.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:19:39.509 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:19:39.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:39.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:39.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:39.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:19:40.465 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:19:40.942 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:19:41.419 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:19:41.897 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:19:42.374 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:19:42.852 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:19:43.330 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:19:43.808 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:19:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:19:44.763 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:19:45.241 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:19:45.719 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:19:46.197 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:19:46.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:46.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:46.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:46.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:46.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:46.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:46.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:46.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:46.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:46.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:46.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:46.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:46.312 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:46.312 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:46.312 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:46.312 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:46.312 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:19:51.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:51.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:51.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:51.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:51.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:51.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:51.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:51.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:51.323 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:51.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:51.324 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:51.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:51.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:51.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:51.327 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:51.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:51.328 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:51.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:51.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:51.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:51.329 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:51.329 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:51.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:51.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:51.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:51.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:51.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:51.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:51.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:51.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:51.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:51.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:51.332 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:51.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:51.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:51.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:51.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:51.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:51.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:51.335 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:51.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:51.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:51.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:51.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:51.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:51.337 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:19:56.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:19:56.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:19:56.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:56.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:56.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:56.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:56.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:19:56.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:56.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:56.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:19:56.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:19:56.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:19:56.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:19:56.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:56.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:56.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:19:56.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:19:56.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:19:56.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:19:56.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:56.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:19:56.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:19:56.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:56.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:56.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:19:56.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:19:56.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:19:56.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:19:56.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:56.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:19:56.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:19:56.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:19:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:19:56.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:19:56.368 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:19:56.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:19:56.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:19:56.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:19:56.895 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:19:56.897 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:19:56.899 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:19:56.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:19:56.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:19:56.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:19:56.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:19:56.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:19:56.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:19:56.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:19:56.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:19:56.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:19:57.333 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:19:57.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:57.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:57.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:57.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:57.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:19:58.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:19:58.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:58.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:58.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:58.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:58.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:19:59.244 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:19:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:19:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:19:59.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:19:59.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:19:59.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:20:00.201 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:20:00.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:00.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:00.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:00.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:00.675 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:20:01.153 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:20:01.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:01.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:01.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:01.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:01.631 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:20:02.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:20:02.586 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:20:03.064 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:20:03.542 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:20:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:20:04.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:20:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:20:05.453 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:20:05.931 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:20:06.409 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:20:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:20:07.364 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:20:07.842 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:20:08.320 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:20:08.797 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:20:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:20:09.752 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:20:10.230 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:20:10.708 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:20:11.185 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:20:11.663 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:20:12.141 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:20:12.619 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:20:13.097 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:20:13.574 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:20:14.052 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:20:14.530 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:20:15.008 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:20:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:20:15.964 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:20:16.441 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:20:16.920 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:20:16.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:20:16.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:20:16.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:16.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:16.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:16.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:16.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:16.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:16.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:16.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:16.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:16.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:16.962 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:20:16.962 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.962 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.962 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.962 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.963 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.963 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:16.963 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:21.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:21.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:21.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:21.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:21.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:21.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:21.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:21.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:21.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:21.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:21.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:20:21.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:20:21.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:20:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:21.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:21.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:21.978 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:20:21.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:21.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:20:21.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:21.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:20:21.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:20:21.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:21.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:21.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:21.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:20:21.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:21.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:20:21.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:21.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:21.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:20:21.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:20:21.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:20:21.987 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:20:21.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:21.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:21.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:21.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:21.989 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:20:26.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:26.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:26.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:26.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:26.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:26.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:27.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:27.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:27.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:27.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:27.006 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:20:27.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:20:27.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:20:27.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:27.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:27.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:27.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:20:27.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:27.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:20:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:27.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:20:27.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:20:27.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:27.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:27.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:27.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:20:27.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:27.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:20:27.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:27.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:20:27.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:27.016 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:20:27.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:27.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:20:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:20:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:20:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:20:27.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:20:27.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:20:27.020 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:20:27.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:27.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:20:27.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:20:27.544 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:20:27.545 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:20:27.546 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:20:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:20:27.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:20:28.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:28.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:28.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:28.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:28.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:20:28.949 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:20:29.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:29.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:29.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:29.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:29.427 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:20:29.905 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:20:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:30.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:30.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:30.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:20:30.861 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:20:31.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:31.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:20:31.824 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:20:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:32.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:32.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:32.305 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:20:32.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:20:33.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:20:33.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:20:34.222 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:20:34.700 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:20:35.181 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:20:35.663 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:20:36.144 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:20:36.624 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:20:37.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:20:37.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:37.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:37.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:37.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:37.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:37.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:37.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:37.558 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:37.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2242 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:20:42.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:42.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:42.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:42.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:42.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:42.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:42.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:42.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:42.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:42.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:42.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:20:42.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:20:42.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:20:42.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:42.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:42.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:42.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:20:42.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:42.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:20:42.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:42.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:42.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:42.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:20:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:42.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:42.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:20:42.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:42.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:20:42.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:20:42.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:20:42.581 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:20:42.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:20:42.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:20:42.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:42.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:42.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:42.583 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:20:47.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:20:47.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:20:47.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:47.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:47.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:20:47.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:47.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:47.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:20:47.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:47.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:20:47.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:20:47.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:47.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:20:47.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:47.590 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:20:47.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:20:47.590 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:20:47.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:20:47.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:20:47.592 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:20:47.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:20:47.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:20:48.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:20:48.110 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:20:48.111 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:20:48.112 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:20:48.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:20:48.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:20:48.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:48.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:48.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:48.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:49.039 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:20:49.520 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:20:49.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:49.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:49.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:49.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:49.999 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:20:50.477 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:20:50.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:50.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:50.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:50.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:50.955 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:20:51.434 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:20:51.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:51.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:51.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:51.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:51.912 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:20:52.390 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:20:52.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:20:52.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:20:52.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:20:52.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:20:52.868 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:20:53.346 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:20:53.825 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:20:54.305 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:20:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:20:55.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:20:55.749 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:20:56.219 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:20:56.688 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:20:57.158 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:20:57.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:20:58.121 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:20:58.602 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:20:59.080 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:20:59.558 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:21:00.040 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:21:00.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:00.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:00.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:00.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:00.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:00.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:00.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:00.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:00.130 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:00.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2672 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.132 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:00.132 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2673 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:05.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:05.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:05.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:05.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:05.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:05.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:05.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:05.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:05.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:05.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:05.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:05.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:05.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:05.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:05.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:05.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:05.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:05.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:05.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:05.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:05.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:05.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:05.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:05.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:05.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:05.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:05.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:05.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:05.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:05.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:05.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:05.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:05.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:05.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:05.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:05.153 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:05.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:05.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:05.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:05.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:05.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:05.156 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:10.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:10.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:10.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:10.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:10.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:10.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:10.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:10.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:10.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:10.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:10.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:10.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:10.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:10.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:10.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:10.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:10.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:10.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:10.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:10.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:10.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:10.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:10.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:10.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:10.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:10.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:10.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:10.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:10.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:10.187 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:10.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:10.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:21:10.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:21:10.705 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:21:10.706 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:21:10.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:21:10.707 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:10.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:10.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:21:10.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:21:10.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:10.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:10.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:10.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:11.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:21:11.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:11.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:11.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:11.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:11.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:21:12.104 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:21:12.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:12.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:12.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:12.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:12.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:21:13.059 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:21:13.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:13.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:13.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:13.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:13.538 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:21:14.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:21:14.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:14.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:14.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:14.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:14.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:21:14.970 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:21:15.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:15.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:15.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:15.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:15.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:21:15.925 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:21:16.403 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:21:16.881 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:21:17.359 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:21:17.837 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:21:18.314 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:21:18.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:18.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:18.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:18.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:18.728 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:18.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:23.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:23.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:23.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:23.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:23.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:23.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:23.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:23.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:23.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:23.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:23.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:23.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:23.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:23.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:23.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:23.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:23.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:23.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:23.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:23.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:23.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:23.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:23.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:23.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:23.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:23.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:23.758 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:23.758 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:23.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:23.759 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:23.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:23.759 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:23.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:23.759 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.764 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:23.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:23.765 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:23.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:23.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:23.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:23.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:23.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:23.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:23.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:23.768 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:28.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:28.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:28.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:28.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:28.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:28.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:28.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:28.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:28.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:28.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:28.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:28.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:28.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:28.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:28.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:28.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:28.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:28.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:28.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:28.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:28.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:28.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:28.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:28.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:28.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:28.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:28.796 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:28.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:21:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:21:29.333 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:21:29.334 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:21:29.335 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:21:29.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:29.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:29.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:21:29.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:21:29.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:29.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:29.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:29.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:29.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:21:29.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:29.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:29.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:29.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:30.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:21:30.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:21:30.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:30.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:30.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:30.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:31.193 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:21:31.671 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:21:31.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:31.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:31.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:31.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:32.149 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:21:32.626 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:21:32.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:32.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:32.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:32.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:33.104 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:21:33.582 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:21:33.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:33.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:33.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:33.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:34.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:21:34.533 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:21:35.011 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:21:35.489 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:21:35.967 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:21:36.445 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:21:36.923 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:21:37.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:37.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:37.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:37.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:37.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:37.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:37.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:37.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:37.385 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:37.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.387 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.387 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.387 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:37.387 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:42.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:42.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:42.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:42.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:42.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:42.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:42.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:42.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:42.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:42.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:42.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:42.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:42.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:42.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:42.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:42.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:42.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:42.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:42.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:42.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:42.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:42.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:42.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:42.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:42.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:42.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:42.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:42.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:42.411 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:42.411 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:42.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:42.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:42.413 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:47.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:47.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:47.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:47.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:47.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:47.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:47.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:47.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:47.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:47.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:21:47.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:21:47.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:21:47.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:21:47.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:47.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:47.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:47.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:21:47.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:21:47.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:21:47.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:47.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:21:47.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:21:47.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:47.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:47.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:47.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:21:47.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:21:47.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:21:47.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:47.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:21:47.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:21:47.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:21:47.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:21:47.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:21:47.440 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:21:47.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:21:47.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:21:47.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:21:47.972 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:21:47.973 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:21:47.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:21:47.975 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:21:47.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:47.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:47.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:21:47.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:47.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:47.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:47.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:21:47.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:21:48.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:21:48.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:21:48.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:48.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:21:48.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:21:48.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:48.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:48.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:48.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:21:49.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:21:49.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:49.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:49.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:49.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:49.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:21:50.316 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:21:50.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:50.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:50.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:50.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:21:51.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:21:51.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:51.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:51.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:51.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:51.749 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:21:52.227 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:21:52.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:52.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:52.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:52.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:52.705 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:21:53.183 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:21:53.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:21:54.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:21:54.615 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:21:55.093 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:21:55.571 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:21:56.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:21:56.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:21:56.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:21:56.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:21:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:21:56.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:21:56.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:21:56.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:21:56.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:21:56.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:21:56.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:21:56.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:21:56.031 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:21:56.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:21:56.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:01.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:01.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:01.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:01.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:01.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:01.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:01.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:01.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:01.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:01.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:01.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:01.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:01.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:01.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:01.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:01.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:01.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:01.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:01.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:01.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:01.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:01.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:01.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:01.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:01.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:01.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:01.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:01.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:01.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:01.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:01.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:01.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:01.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:01.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:01.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:01.046 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:01.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:01.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:01.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:01.048 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:06.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:06.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:06.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:06.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:06.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:06.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:06.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:06.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:06.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:06.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:06.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:06.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:06.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:06.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:06.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:06.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:06.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:06.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:06.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:06.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:06.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:06.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:06.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:06.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:06.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:06.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:06.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:06.077 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:06.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:06.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:22:06.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:22:06.607 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:22:06.610 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:22:06.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:22:06.613 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:22:06.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:06.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:06.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:22:06.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:06.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:06.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:06.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:22:06.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:22:06.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:06.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:06.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:06.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:07.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:22:07.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:07.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:07.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:07.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:07.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:22:07.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:22:08.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:08.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:08.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:08.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:08.475 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:22:08.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:22:09.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:09.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:09.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:09.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:09.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:22:09.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:22:10.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:10.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:10.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:10.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:10.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:22:10.864 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:22:11.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:11.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:11.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:11.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:11.341 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:22:11.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:22:12.296 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:22:12.773 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:22:13.251 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:22:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:22:14.207 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:22:14.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:14.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:14.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:14.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:14.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:14.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:14.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:14.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:14.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:14.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:14.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:14.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:14.667 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:14.667 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:19.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:19.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:19.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:19.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:19.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:19.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:19.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:19.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:19.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:19.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:19.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:19.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:19.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:19.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:19.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:19.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:19.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:19.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:19.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:19.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:19.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:19.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:19.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:19.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:19.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:19.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:19.689 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:19.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:19.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:19.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:19.691 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:24.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:24.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:24.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:24.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:24.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:24.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:24.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:24.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:24.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:24.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:24.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:24.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:24.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:24.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:24.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:24.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:24.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:24.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:24.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:24.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:24.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:24.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:24.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:24.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:24.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:24.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:24.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:24.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:24.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:24.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:24.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:24.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:24.719 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:24.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:22:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:22:25.248 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:22:25.251 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:22:25.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:22:25.254 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:22:25.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:25.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:25.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:22:25.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:25.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:25.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:25.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:22:25.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:22:25.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:25.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:25.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:25.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:25.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:22:25.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:25.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:25.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:25.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:26.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:22:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:22:26.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:26.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:26.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:26.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:27.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:22:27.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:22:27.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:27.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:27.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:27.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:22:28.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:22:28.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:28.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:28.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:28.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:29.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:22:29.507 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:22:29.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:29.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:29.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:29.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:22:30.463 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:22:30.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:22:31.418 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:22:31.896 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:22:32.374 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:22:32.852 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:22:33.329 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:22:33.807 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:22:34.285 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:22:34.762 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:22:35.240 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:22:35.718 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:22:36.196 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:22:36.673 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:22:37.152 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:22:37.630 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:22:38.107 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:22:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:22:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:22:39.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:39.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:39.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:39.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:39.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:39.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:39.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:39.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:39.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:39.311 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:44.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:44.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:44.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:44.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:44.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:44.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:44.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:44.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:44.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:44.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:44.323 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:44.325 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:44.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:44.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:44.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:44.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:44.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:44.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:44.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:44.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:44.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:44.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:44.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:44.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:44.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:44.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:44.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:44.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:44.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:44.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:44.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:44.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:44.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:44.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:44.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:44.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:44.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:44.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:44.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:44.334 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:44.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:44.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:44.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:44.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:44.336 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:49.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:49.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:49.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:49.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:49.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:49.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:49.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:49.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:49.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:49.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:22:49.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:22:49.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:22:49.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:22:49.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:49.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:49.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:49.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:22:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:22:49.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:22:49.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:49.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:22:49.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:22:49.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:22:49.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:49.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:22:49.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:22:49.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:49.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:22:49.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:49.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:22:49.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:22:49.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:22:49.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:49.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:22:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:22:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:22:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:22:49.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:22:49.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:22:49.366 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:22:49.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:22:49.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:22:49.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:22:49.898 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:22:49.900 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:22:49.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:22:49.903 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:22:49.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:49.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:49.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:22:49.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:49.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:49.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:49.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:22:49.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:22:49.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:22:49.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:22:49.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:49.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:22:50.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:22:50.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:50.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:50.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:50.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:50.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:22:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:22:51.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:51.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:51.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:51.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:22:52.244 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:22:52.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:52.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:52.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:52.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:52.721 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:22:53.197 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:22:53.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:53.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:53.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:53.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:53.674 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:22:54.152 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:22:54.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:54.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:54.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:54.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:54.630 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:22:55.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:22:55.585 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:22:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:22:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:22:57.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:22:57.496 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:22:57.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:22:57.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:22:57.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:22:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:22:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:22:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:22:57.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:22:57.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:22:57.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:22:57.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:22:57.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:22:57.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:22:57.956 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:22:57.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:02.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:02.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:02.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:02.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:02.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:02.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:02.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:02.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:02.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:02.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:02.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:02.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:02.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:02.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:02.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:02.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:02.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:02.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:02.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:02.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:02.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:02.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:02.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:02.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:02.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:02.980 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:02.980 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:02.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:02.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:02.984 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:02.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:23:02.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:02.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:02.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:02.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:02.986 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:23:07.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:07.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:07.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:07.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:07.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:07.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:08.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:08.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:08.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:08.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:08.006 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:08.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:08.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:08.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:08.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:08.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:08.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:08.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:08.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:08.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:08.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:08.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:08.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:08.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:08.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:08.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:08.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:08.014 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:08.014 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:08.014 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:08.019 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:23:08.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:23:08.541 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:23:08.543 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:23:08.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:23:08.545 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:23:08.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:23:08.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:23:08.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:23:08.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:23:08.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:23:08.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:23:08.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:23:08.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:23:08.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:23:09.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:09.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:09.454 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:23:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:23:10.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:10.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:10.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:10.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:23:10.888 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:23:11.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:11.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:11.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:11.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:11.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:23:11.843 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:23:12.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:12.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:12.321 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:23:12.799 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:23:13.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:13.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:13.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:13.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:13.277 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:23:13.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:23:14.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:23:14.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:23:15.188 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:23:15.666 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:23:16.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:23:16.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:23:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:23:17.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:23:18.055 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:23:18.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:23:18.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:23:18.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:23:18.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:18.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:18.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:18.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:18.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:18.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:18.602 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:18.602 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:23.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:23.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:23.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:23.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:23.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:23.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:23.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:23.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:23.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:23.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:23.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:23.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:23.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:23.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:23.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:23.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:23.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:23.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:23.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:23.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:23.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:23.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:23.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:23.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:23.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:23.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:23.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:23.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:23.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:23.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:23.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:23.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:23.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:23.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:23.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:23.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:23.633 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:23.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:23.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:23.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:23.635 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:23:28.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:28.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:28.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:28.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:28.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:28.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:28.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:28.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:28.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:28.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:28.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:28.657 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:28.657 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:28.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:28.658 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:28.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:28.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:28.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:28.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:28.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:28.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:28.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:28.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:28.660 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:28.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:28.660 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:28.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:28.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:28.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:28.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:28.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:28.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:28.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:28.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:28.665 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:28.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:28.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:23:29.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:23:29.198 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:23:29.200 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:23:29.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:23:29.203 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:23:29.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:23:29.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:23:29.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:23:29.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:23:29.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:23:29.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:23:29.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:23:29.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:23:29.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:23:29.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:23:29.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:23:29.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:23:29.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:23:29.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:29.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:30.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:23:30.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:23:30.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:30.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:30.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:30.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:31.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:23:31.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:23:31.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:31.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:31.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:31.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:32.012 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:23:32.490 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:23:32.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:32.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:32.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:32.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:32.968 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:23:33.445 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:23:33.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:33.923 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:23:34.398 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:23:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:23:35.354 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:23:35.832 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:23:36.310 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:23:36.788 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:23:37.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:23:37.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:23:38.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:23:38.696 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:23:39.174 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:23:39.652 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:23:40.129 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:23:40.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:23:40.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:23:40.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:40.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:40.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:40.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:40.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:40.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:40.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:40.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:40.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:40.258 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:23:40.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.259 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:40.260 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2477 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:23:45.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:45.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:45.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:45.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:45.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:45.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:45.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:45.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:45.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:45.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:45.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:45.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:45.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:45.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:45.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:45.279 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:45.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:45.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:45.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:45.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:45.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:45.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:45.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:45.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:45.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:45.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:45.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:45.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:45.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:45.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:45.289 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:45.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:45.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:45.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:45.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:45.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:45.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:45.290 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:23:45.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:45.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:45.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:23:50.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:23:50.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:50.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:50.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:50.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:50.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:23:50.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:50.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:50.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:23:50.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:23:50.314 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:23:50.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:23:50.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:50.315 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:50.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:23:50.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:23:50.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:23:50.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:23:50.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:50.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:23:50.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:23:50.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:50.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:23:50.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:23:50.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:23:50.322 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:23:50.322 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:23:50.327 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:23:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:23:50.848 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:23:50.851 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:23:50.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:23:50.853 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:23:51.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:23:51.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:51.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:51.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:51.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:51.748 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:23:52.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:23:52.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:52.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:52.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:52.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:52.705 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:23:53.173 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:23:53.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:53.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:53.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:53.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:53.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:23:54.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:23:54.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:54.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:54.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:54.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:54.600 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:23:55.078 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:23:55.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:23:55.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:23:55.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:23:55.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:23:55.557 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:23:56.036 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:23:56.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:23:56.997 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:23:57.478 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:23:57.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:23:58.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:23:58.919 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:23:59.398 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:23:59.876 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:24:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:24:00.838 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:24:00.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:00.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:00.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:00.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:00.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:00.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:00.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:00.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:00.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:00.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:00.867 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.868 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:00.869 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:24:05.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:05.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:05.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:05.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:05.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:05.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:05.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:05.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:05.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:05.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:05.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:24:05.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:24:05.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:24:05.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:05.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:05.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:05.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:24:05.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:05.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:24:05.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:05.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:05.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:24:05.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:05.886 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:24:05.886 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:24:05.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:05.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:05.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:05.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:24:05.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:05.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:24:05.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:24:05.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:24:05.890 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:05.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:05.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:05.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:05.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:05.893 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:24:10.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:10.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:10.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:10.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:10.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:10.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:10.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:10.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:10.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:10.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:10.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:24:10.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:24:10.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:24:10.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:10.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:10.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:10.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:24:10.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:10.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:24:10.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:10.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:24:10.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:24:10.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:10.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:10.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:10.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:24:10.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:10.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:24:10.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:10.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:24:10.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:24:10.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:10.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:10.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:10.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:24:10.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:10.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:24:10.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:10.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:24:10.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:24:10.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:24:10.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:24:10.954 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:24:10.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:10.959 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:24:11.443 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:24:11.495 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:24:11.497 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:24:11.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:24:11.500 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:24:11.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:24:11.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:11.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:11.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:11.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:12.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:24:12.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:24:12.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:12.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:12.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:12.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:13.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:24:13.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:24:13.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:13.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:13.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:13.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:14.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:24:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:24:14.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:14.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:14.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:15.268 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:24:15.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:24:15.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:15.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:15.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:15.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:16.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:24:16.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:24:17.178 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:24:17.658 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:24:18.139 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:24:18.620 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:24:19.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:24:19.581 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:24:20.060 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:24:20.532 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:24:21.007 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:24:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:24:21.970 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:24:22.451 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:24:22.930 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:24:23.407 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:24:23.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:23.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:23.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:23.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:23.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:23.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:23.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:23.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:23.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:23.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:23.513 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:24:28.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:28.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:28.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:28.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:28.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:28.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:28.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:28.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:28.528 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:24:28.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:24:28.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:24:28.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:28.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:28.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:28.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:24:28.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:28.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:24:28.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:28.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:28.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:28.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:24:28.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:28.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:24:28.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:28.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:24:28.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:24:28.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:24:28.540 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:24:28.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:28.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:24:29.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:24:29.072 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:24:29.074 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:24:29.077 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:24:29.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:24:29.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:24:29.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:24:29.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:24:29.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:24:29.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:24:29.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:24:29.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:24:29.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:24:29.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:24:29.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:29.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:29.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:29.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:29.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:24:30.461 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:24:30.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:30.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:30.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:30.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:30.939 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:24:31.417 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:24:31.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:31.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:31.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:31.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:31.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:24:32.373 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:24:32.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:32.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:32.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:32.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:32.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:24:33.328 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:24:33.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:33.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:33.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:33.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:33.806 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:24:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:24:34.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:24:35.240 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:24:35.718 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:24:36.193 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:24:36.671 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:24:37.147 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:24:37.625 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:24:38.103 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:24:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:24:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:24:39.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:24:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:24:40.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:24:40.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:24:40.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:40.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:40.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:40.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:40.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:40.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:40.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:40.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:40.128 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:24:45.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:24:45.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:24:45.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:45.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:45.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:45.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:24:45.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:45.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:45.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:24:45.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:24:45.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:24:45.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:24:45.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:45.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:45.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:24:45.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:24:45.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:24:45.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:24:45.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:45.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:24:45.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:24:45.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:45.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:45.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:24:45.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:24:45.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:24:45.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:24:45.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:45.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:24:45.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:24:45.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:45.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:24:45.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:24:45.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:24:45.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:24:45.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:24:45.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:24:45.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:24:45.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:24:45.154 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:24:45.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:24:45.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:24:45.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:24:45.685 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:24:45.687 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:24:45.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:24:45.689 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:24:45.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:24:45.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:24:45.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:24:45.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:24:45.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:24:45.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:24:45.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:24:45.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:24:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:24:46.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:46.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:46.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:46.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:46.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:24:47.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:24:47.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:47.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:47.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:47.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:47.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:24:48.028 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:24:48.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:48.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:48.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:48.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:24:48.984 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:24:49.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:49.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:49.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:49.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:49.462 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:24:49.940 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:24:50.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:24:50.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:24:50.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:24:50.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:24:50.418 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:24:50.895 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:24:51.373 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:24:51.851 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:24:52.329 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:24:52.807 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:24:53.285 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:24:53.762 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:24:54.240 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:24:54.718 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:24:55.196 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:24:55.673 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:24:56.152 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:24:56.629 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:24:57.107 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:24:57.585 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:24:58.063 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:24:58.540 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:24:59.018 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:24:59.496 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:24:59.974 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:25:00.452 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:25:00.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:00.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:00.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:00.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:00.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:00.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:00.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:00.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:00.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:00.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:00.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:00.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:00.736 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:25:05.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:05.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:05.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:05.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:05.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:05.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:05.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:05.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:05.754 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:05.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:05.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:25:05.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:25:05.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:25:05.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:05.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:05.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:05.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:25:05.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:05.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:25:05.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:05.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:25:05.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:05.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:25:05.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:05.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:25:05.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:25:05.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:05.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:05.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:05.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:25:05.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:05.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:25:05.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:05.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:25:05.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:25:05.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:25:05.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:25:05.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:25:05.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:25:05.768 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:25:05.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:05.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:25:06.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:25:06.302 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:25:06.304 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:25:06.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:06.306 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:25:06.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:06.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:06.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:06.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:06.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:06.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:06.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:06.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:06.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:06.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:06.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:06.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:06.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:06.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:06.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:06.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:06.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:06.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:06.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:06.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:06.356 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:06.357 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:11.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:11.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:11.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:11.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:11.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:11.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:11.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:11.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:11.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:11.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:11.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:25:11.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:25:11.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:25:11.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:11.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:11.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:11.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:25:11.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:11.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:25:11.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:11.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:11.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:25:11.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:11.379 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:11.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:25:11.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:11.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:25:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:25:11.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.382 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:25:11.382 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:25:11.382 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:25:11.382 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:25:11.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:25:11.913 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:25:11.915 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:25:11.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:11.917 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:25:11.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:11.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:11.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:11.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:11.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:11.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:11.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:11.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:11.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:11.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:11.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:11.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:12.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:12.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:12.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.344 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:25:12.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:12.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:12.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:12.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:12.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:12.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:12.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:12.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:12.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:12.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:12.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:12.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:12.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:12.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:12.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:25:13.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:13.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:13.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:13.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:13.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:13.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:13.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:13.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:13.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:13.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:13.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:13.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:13.154 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.154 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:13.155 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:18.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:18.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:18.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:18.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:18.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:18.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:18.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:18.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:18.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:18.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:18.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:25:18.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:25:18.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:25:18.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:18.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:18.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:18.169 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:25:18.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:18.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:25:18.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:18.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:25:18.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:25:18.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:18.172 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:18.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:18.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:25:18.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:18.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:25:18.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:18.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:18.174 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:25:18.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:25:18.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:25:18.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:25:18.177 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:25:18.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:18.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:25:18.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:25:18.710 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:25:18.711 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:25:18.712 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:25:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:18.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:18.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:18.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:18.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:18.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:18.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:18.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:18.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:18.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:18.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:18.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:18.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:18.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:18.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:18.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:18.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:25:19.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:19.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:19.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:19.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:19.621 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:25:20.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:25:20.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:20.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:20.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:20.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:20.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:25:21.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:25:21.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:21.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:21.532 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:25:22.010 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:25:22.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:22.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:22.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:22.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:25:22.966 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:25:23.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:23.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:23.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:23.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:23.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:25:23.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:23.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:23.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:23.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:23.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:23.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:23.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:23.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:23.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:23.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:23.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:23.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:23.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:23.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:23.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:23.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:23.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:23.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:23.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:23.920 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:25:24.398 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:25:24.876 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:25:25.355 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:25:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:25:26.311 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:25:26.790 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:25:27.268 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:25:27.746 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:25:28.225 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:25:28.703 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:25:28.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:28.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:28.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:28.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:28.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:28.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:28.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:28.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:28.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:28.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:28.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:28.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:28.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:28.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:28.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:28.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:28.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:28.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:28.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:29.181 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:25:29.659 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:25:30.137 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:25:30.615 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:25:31.093 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:25:31.571 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:25:32.049 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:25:32.526 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:25:33.005 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:25:33.482 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:25:33.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:33.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:33.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:33.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:33.960 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:25:33.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:33.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:33.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:33.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:33.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:33.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:33.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:33.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:33.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:33.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:33.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:33.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:34.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:34.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:34.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:34.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:34.433 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:25:34.911 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:25:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:25:35.868 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:25:36.346 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:25:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:25:37.302 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:25:37.780 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:25:38.258 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:25:38.735 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:25:39.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:39.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:39.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:39.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:39.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:39.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:39.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:39.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:39.031 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:39.032 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4452 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:25:44.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:25:44.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:25:44.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:44.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:44.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:44.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:44.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:25:44.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:44.040 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:44.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:25:44.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:25:44.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:25:44.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:25:44.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:44.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:44.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:25:44.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:25:44.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:25:44.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:25:44.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:44.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:25:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:25:44.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:25:44.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:44.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:25:44.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:25:44.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:44.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:25:44.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:25:44.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:25:44.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:25:44.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:25:44.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:25:44.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:25:44.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:25:44.054 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:25:44.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:25:44.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:25:44.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:25:44.582 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:25:44.585 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:25:44.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:44.587 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:25:44.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:44.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:44.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:44.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:44.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:44.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:44.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:44.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:44.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:44.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:44.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:44.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:44.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:44.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:44.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:44.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:25:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:45.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:45.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:45.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:25:45.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:25:46.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:46.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:46.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:46.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:46.454 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:25:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:25:47.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:47.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:47.411 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:25:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:25:48.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:48.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:48.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:48.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:25:48.845 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:25:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:25:49.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:25:49.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:25:49.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:25:49.323 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:25:49.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:49.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:49.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:49.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:49.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:49.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:49.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:49.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:49.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:49.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:49.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:49.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:49.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:49.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:49.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:49.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:49.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:49.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:49.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:49.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:25:50.278 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:25:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:25:51.234 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:25:51.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:25:52.190 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:25:52.668 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:25:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:25:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:25:54.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:25:54.581 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:25:54.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:54.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:54.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:54.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:54.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:54.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:54.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:54.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:54.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:54.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:54.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:54.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:54.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:54.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:54.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:54.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:54.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:54.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:54.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:54.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:55.057 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:25:55.535 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:25:56.013 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:25:56.491 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:25:56.969 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:25:57.448 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:25:57.926 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:25:58.404 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:25:58.882 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:25:59.359 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:25:59.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:59.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:59.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:59.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:59.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:59.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:59.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:59.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:25:59.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:25:59.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:25:59.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:25:59.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:59.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:59.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:59.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:25:59.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:25:59.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:25:59.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:25:59.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:59.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:25:59.836 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:26:00.313 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:26:00.791 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:26:01.269 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:26:01.747 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:26:02.226 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:26:02.704 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:26:03.182 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:26:03.660 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:26:04.140 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:26:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:26:04.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:04.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:04.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:04.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:04.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:04.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:04.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:04.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:04.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:04.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:04.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:04.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:26:04.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:26:04.847 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:26:09.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:26:09.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:26:09.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:09.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:09.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:09.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:09.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:09.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:26:09.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:09.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:26:09.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:26:09.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:26:09.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:26:09.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:26:09.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:09.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:26:09.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:26:09.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:26:09.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:09.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:26:09.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:26:09.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:26:09.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:26:09.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:26:09.880 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:26:09.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:26:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:26:10.414 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:26:10.415 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:26:10.416 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:26:10.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:10.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:10.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:10.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:10.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:10.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:10.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:10.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:10.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:10.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:10.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:10.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:10.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:10.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:10.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:10.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:10.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:10.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:26:10.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:10.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:10.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:10.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:26:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:26:11.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:11.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:11.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:11.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:12.279 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:26:12.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:26:12.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:12.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:12.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:12.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:13.235 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:26:13.714 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:26:13.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:13.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:13.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:13.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:14.191 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:26:14.669 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:26:14.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:14.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:14.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:14.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:15.147 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:26:15.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:15.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:15.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:15.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:15.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:15.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:15.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:15.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:15.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:15.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:15.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:15.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:15.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:15.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:15.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:15.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:15.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:15.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:26:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:26:16.580 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:26:17.059 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:26:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:26:18.015 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:26:18.493 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:26:18.972 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:26:19.450 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:26:19.928 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:26:20.406 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:26:20.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:20.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:20.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:20.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:20.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:20.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:20.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:20.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:20.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:20.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:20.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:20.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:20.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:20.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:20.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:20.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:20.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:20.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:20.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:20.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:20.882 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:26:21.360 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:26:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:26:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:26:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:26:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:26:23.746 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:26:24.224 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:26:24.702 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:26:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:26:25.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:25.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:25.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:25.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:25.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:25.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:25.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:25.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:25.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:25.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:25.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:25.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:25.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:25.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:25.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:25.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:25.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:25.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:25.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:25.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:25.657 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:26:26.134 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:26:26.612 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:26:27.089 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:26:27.567 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:26:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:26:28.523 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:26:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:26:29.479 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:26:29.969 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:26:30.446 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:26:30.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:30.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:30.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:30.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:30.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:30.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:30.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:30.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:30.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:26:30.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:26:30.672 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:26:30.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4436 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4436 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4436 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4436 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4436 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:30.673 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4437 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:35.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:26:35.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:26:35.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:35.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:35.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:35.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:35.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:35.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:26:35.681 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:35.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:26:35.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:26:35.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:26:35.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:26:35.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:26:35.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:35.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:35.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:26:35.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:26:35.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:26:35.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:35.686 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:26:35.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:26:35.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:26:35.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:35.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:35.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:26:35.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:26:35.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:26:35.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:35.688 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:26:35.688 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:26:35.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:26:35.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:26:35.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:35.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:26:35.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:26:35.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:26:35.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:26:35.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:26:35.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:26:35.692 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:26:35.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:26:35.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:26:35.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:26:36.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:26:36.220 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:26:36.223 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:26:36.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:36.226 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:26:36.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:36.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:36.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:36.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:36.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:36.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:36.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:36.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:36.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:36.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:36.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:36.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:36.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:36.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:36.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:36.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:36.655 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:26:36.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:36.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:36.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:36.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:37.134 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:26:37.611 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:26:37.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:37.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:37.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:37.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:38.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:26:38.567 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:26:38.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:38.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:38.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:38.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:26:39.522 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:26:39.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:39.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:39.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:39.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:40.001 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:26:40.479 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:26:40.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:40.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:40.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:40.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:26:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:41.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:41.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:41.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:41.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:41.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:41.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:41.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:41.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:41.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:41.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:41.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:41.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:41.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:41.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:41.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:41.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:41.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:41.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:41.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:26:41.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:26:42.391 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:26:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:26:43.348 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:26:43.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:26:44.304 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:26:44.782 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:26:45.260 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:26:45.739 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:26:46.217 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:26:46.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:46.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:46.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:46.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:46.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:46.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:46.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:46.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:46.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:46.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:46.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:46.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:46.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:46.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:46.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:46.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:46.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:46.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:46.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:46.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:46.694 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:26:47.171 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:26:47.650 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:26:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:26:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:26:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:26:49.560 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:26:50.037 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:26:50.515 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:26:50.992 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:26:51.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:51.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:51.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:51.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:51.469 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:26:51.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:51.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:51.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:51.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:51.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:51.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:26:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:51.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:51.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:51.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:51.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:26:51.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:26:51.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:26:51.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:26:51.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:51.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:51.947 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:26:52.424 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:26:52.902 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:26:53.379 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:26:53.857 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:26:54.335 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:26:54.813 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:26:55.291 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:26:55.768 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:26:56.246 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:26:56.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:26:56.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:26:56.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:26:56.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:26:56.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:26:56.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:26:56.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:26:56.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:26:56.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:26:56.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:26:56.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:26:56.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:26:56.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:26:56.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:26:56.539 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:26:56.539 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4451 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:56.540 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4451 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:26:56.540 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:01.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:27:01.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:27:01.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:27:01.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:27:01.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:27:01.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:27:01.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:27:01.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:27:01.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:01.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:27:01.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:27:01.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:27:01.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:27:01.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:27:01.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:27:01.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:27:01.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:27:01.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:27:01.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:01.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:27:01.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:27:01.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:27:01.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:01.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:27:01.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:27:01.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:27:01.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:27:01.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:01.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:27:01.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:27:01.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:27:01.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:01.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:27:01.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:27:01.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:27:01.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:27:01.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:27:01.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:27:01.567 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:27:01.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:01.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:01.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:01.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:27:02.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:27:02.098 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:27:02.100 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:27:02.102 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:27:02.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:02.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:02.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:02.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:02.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:27:02.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:02.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:02.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:02.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:02.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:02.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:02.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:02.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:02.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:02.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:02.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:02.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:02.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:03.006 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:27:03.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:27:03.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:03.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:03.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:03.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:03.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:03.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:03.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:03.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:03.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:03.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:03.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:03.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:03.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:03.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:03.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:03.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:03.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:03.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:03.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:03.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:03.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:03.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:03.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:03.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:03.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:27:04.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:27:04.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:04.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:04.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:04.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:04.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:04.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:04.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:04.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:04.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:27:04.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:27:04.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:27:04.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:27:04.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:27:04.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:27:04.541 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:27:04.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.541 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:04.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:27:09.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:27:09.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:27:09.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:27:09.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:27:09.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:27:09.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:27:09.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:27:09.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:27:09.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:09.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:27:09.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:27:09.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:27:09.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:27:09.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:27:09.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:09.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:27:09.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:27:09.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:27:09.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:27:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:09.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:27:09.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:27:09.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:27:09.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:09.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:27:09.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:27:09.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:27:09.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:27:09.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:27:09.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:27:09.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:27:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:27:09.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:27:09.563 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:27:09.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:27:09.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:27:10.054 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:27:10.093 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:27:10.096 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:27:10.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:10.098 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:27:10.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:10.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:10.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:10.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:10.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:10.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:10.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:10.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:10.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:10.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:10.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:10.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:10.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:10.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:10.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:10.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:10.531 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:27:10.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:10.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:10.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:10.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:11.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:27:11.487 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:27:11.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:11.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:11.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:11.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:11.965 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:27:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:27:12.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:12.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:12.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:27:13.399 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:27:13.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:13.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:13.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:13.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:13.877 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:27:14.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:27:14.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:27:14.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:27:14.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:27:14.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:27:14.832 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:27:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:27:15.787 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:27:16.266 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:27:16.743 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:27:17.221 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:27:17.699 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:27:18.177 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:27:18.654 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:27:19.132 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:27:19.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:27:20.089 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:27:20.567 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:27:21.045 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:27:21.523 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:27:22.001 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:27:22.479 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:27:22.957 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:27:23.435 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:27:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:27:24.390 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:27:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:27:25.346 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:27:25.824 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:27:26.301 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:27:26.779 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:27:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:27:27.735 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:27:28.213 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:27:28.691 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:27:29.170 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:27:29.648 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:27:30.126 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:27:30.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:30.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:30.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:30.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:30.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:30.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:30.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:30.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:30.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:30.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:30.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:30.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:30.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:30.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:30.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:30.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:30.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:30.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:30.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:30.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:30.601 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:27:31.079 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:27:31.557 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:27:32.035 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:27:32.513 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:27:32.991 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:27:33.469 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:27:33.947 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:27:34.426 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:27:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:27:35.381 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:27:35.860 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:27:36.338 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:27:36.816 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:27:37.294 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:27:37.772 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:27:38.250 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:27:38.726 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:27:39.204 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:27:39.682 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:27:40.160 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:27:40.639 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:27:41.117 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:27:41.595 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:27:42.073 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:27:42.551 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:27:43.029 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:27:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:27:43.986 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:27:44.464 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:27:44.942 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:27:45.420 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:27:45.898 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:27:46.376 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:27:46.854 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:27:47.332 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:27:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:27:48.290 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:27:48.767 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:27:49.246 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:27:49.724 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:27:50.202 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:27:50.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:50.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:50.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:50.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:50.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:50.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:50.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:50.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:27:50.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:27:50.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:27:50.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:27:50.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:50.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:50.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:50.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:27:50.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:27:50.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:27:50.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:27:50.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:50.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:27:50.678 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:27:51.156 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:27:51.634 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:27:52.112 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:27:52.588 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:27:53.066 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:27:53.543 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:27:54.021 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:27:54.499 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:27:54.977 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:27:55.455 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:27:55.933 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:27:56.410 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:27:56.888 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:27:57.366 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:27:57.844 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:27:58.322 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:27:58.800 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:27:59.278 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:27:59.755 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:28:00.232 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:28:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:28:01.188 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:28:01.666 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:28:02.143 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:28:02.620 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:28:03.089 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:28:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:28:04.030 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:28:04.500 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:28:04.971 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:28:05.448 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:28:05.925 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:28:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:28:06.881 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:28:07.359 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:28:07.837 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:28:08.315 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:28:08.792 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:28:09.270 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:28:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:28:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:28:10.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:10.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:10.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:10.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:10.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:10.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:10.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:10.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:10.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:10.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:10.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:10.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:10.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:10.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:10.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:10.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:10.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:10.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:10.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:10.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:28:11.182 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:28:11.660 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:28:12.139 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:28:12.616 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:28:13.095 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 02:28:13.573 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 02:28:14.047 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 02:28:14.522 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 02:28:15.000 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 02:28:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 02:28:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 02:28:16.434 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 02:28:16.911 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 02:28:17.390 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 02:28:17.868 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 02:28:18.345 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 02:28:18.823 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 02:28:19.301 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 02:28:19.780 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 02:28:20.266 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 02:28:20.744 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 02:28:21.222 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 02:28:21.701 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 02:28:22.178 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 02:28:22.656 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 02:28:23.134 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 02:28:23.611 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 02:28:24.090 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 02:28:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 02:28:25.046 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 02:28:25.524 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 02:28:26.002 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 02:28:26.480 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 02:28:26.959 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 02:28:27.437 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 02:28:27.915 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 02:28:28.393 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 02:28:28.872 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 02:28:29.350 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 02:28:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 02:28:30.306 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 02:28:30.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:30.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:30.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:30.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:30.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:30.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:30.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:30.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:30.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:30.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:30.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:30.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:30.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:28:30.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:28:30.433 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:30.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17267 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:35.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:28:35.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:28:35.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:35.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:35.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:35.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:35.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:35.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:28:35.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:35.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:28:35.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:28:35.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:28:35.452 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:28:35.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:28:35.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:35.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:28:35.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:28:35.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:28:35.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:35.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:35.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:28:35.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:28:35.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:28:35.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:28:35.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:28:35.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:28:35.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:35.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:28:35.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:28:35.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:28:35.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:28:35.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:28:35.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:28:35.457 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:28:35.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:35.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:35.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:35.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:35.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:35.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:35.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:28:35.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:28:35.458 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:28:40.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:28:40.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:28:40.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:40.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:40.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:40.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:40.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:40.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:28:40.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:40.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:28:40.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:28:40.483 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:28:40.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:28:40.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:28:40.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:40.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:40.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:28:40.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:28:40.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:28:40.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:40.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:28:40.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:28:40.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:28:40.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:40.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:40.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:28:40.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:28:40.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:28:40.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:40.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:28:40.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:28:40.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:28:40.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:28:40.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:40.492 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:28:40.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:28:40.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:28:40.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:40.495 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:28:40.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:28:40.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.496 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:28:40.496 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:28:40.496 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:28:40.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:28:40.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:28:40.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:28:40.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:28:41.024 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:28:41.025 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:28:41.026 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:28:41.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:41.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:41.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:41.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:41.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:28:41.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:41.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:41.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:41.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:41.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:41.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:41.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:41.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:41.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:41.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:41.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:41.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:41.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:41.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:41.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:41.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:28:42.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:42.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:42.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:42.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:42.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:42.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:42.413 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:28:42.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:42.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:42.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:42.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:42.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:42.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:42.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:42.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:42.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:42.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:42.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:42.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:42.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:42.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:42.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:28:43.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:28:43.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:43.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:43.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:43.846 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:28:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:28:44.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:44.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:44.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:44.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:44.801 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:28:45.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:28:45.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:45.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:45.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:45.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:45.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:45.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:45.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:45.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:45.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:45.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:45.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:45.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:45.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:45.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:45.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:45.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:45.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:45.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:45.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:45.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:45.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:45.757 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:28:46.234 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:28:46.712 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:28:47.190 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:28:47.668 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:28:48.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:48.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:48.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:48.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:48.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:48.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:48.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:48.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:48.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:48.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:48.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:48.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:48.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:48.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:48.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:48.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:48.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:48.144 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:28:48.622 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:28:49.100 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:28:49.578 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:28:50.056 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:28:50.533 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:28:50.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:50.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:50.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:50.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:50.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:50.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:50.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:50.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:50.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:50.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:50.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:50.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:50.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:50.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:50.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:50.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:50.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:50.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:50.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:50.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:51.009 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:28:51.488 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:28:51.965 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:28:52.444 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:28:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:28:53.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:53.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:53.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:53.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:53.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:53.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:53.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:53.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:53.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:53.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:53.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:53.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:53.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:53.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:53.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:53.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:53.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:28:53.874 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:28:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:28:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:28:55.309 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:28:55.786 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:28:55.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:55.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:55.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:55.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:55.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:55.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:55.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:55.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:28:55.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:55.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:55.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:55.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:28:55.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:28:55.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:28:55.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:28:55.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:55.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:56.261 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:28:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:28:57.217 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:28:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:28:58.173 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:28:58.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:28:58.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:28:58.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:28:58.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:28:58.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:28:58.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:28:58.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:28:58.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:28:58.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:28:58.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:28:58.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:28:58.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:28:58.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:28:58.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:28:58.510 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:28:58.510 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.511 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.512 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.512 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:28:58.512 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:03.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:03.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:03.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:03.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:03.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:03.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:03.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:03.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:03.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:03.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:03.524 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:29:03.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:29:03.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:29:03.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:03.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:03.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:03.529 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:29:03.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:03.529 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:03.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:03.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:29:03.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:03.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:29:03.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:03.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:29:03.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:29:03.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:03.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:03.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:03.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:29:03.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:03.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:29:03.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:03.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:29:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:29:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:29:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:29:03.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:29:03.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:29:03.536 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:29:03.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:29:04.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:29:04.067 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:29:04.068 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:29:04.069 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:29:04.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:04.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:04.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:04.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:04.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:04.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:04.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:04.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:04.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:04.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:04.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:04.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:04.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:04.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:04.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:04.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:04.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:04.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:29:04.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:04.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:04.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:04.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:04.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:29:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:29:05.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:05.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:05.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:05.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:05.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:29:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:29:06.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:06.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:06.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:06.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:29:07.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:07.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:07.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:07.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:07.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:07.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:07.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:07.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:07.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:07.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:07.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:07.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:07.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:07.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:07.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:07.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:07.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:07.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:07.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:07.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:07.370 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:29:07.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:07.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:07.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:07.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:07.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:29:08.326 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:29:08.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:08.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:08.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:08.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:08.803 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:29:09.282 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:29:09.760 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:29:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:29:10.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:10.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:10.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:10.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:10.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:10.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:10.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:10.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:10.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:10.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:10.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:10.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:10.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:10.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:10.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:10.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:10.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:10.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:10.715 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:29:11.193 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:29:11.671 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:29:12.149 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:29:12.626 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:29:13.104 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:29:13.582 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:29:13.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:13.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:13.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:13.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:13.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:13.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:13.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:13.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:13.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:13.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:13.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:13.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:13.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:13.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:13.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:14.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:14.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:14.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:14.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:14.059 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:29:14.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:29:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:29:15.492 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:29:15.970 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:29:16.448 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:29:16.926 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:29:17.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:17.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:17.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:17.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:17.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:17.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:17.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:17.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:17.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:17.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:17.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:17.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:17.229 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:17.229 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2923 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:22.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:22.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:22.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:22.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:22.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:22.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:22.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:22.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:22.245 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:22.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:22.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:29:22.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:29:22.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:29:22.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:22.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:22.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:22.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:29:22.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:22.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:29:22.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:22.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:29:22.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:29:22.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:22.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:22.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:22.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:29:22.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:22.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:29:22.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:22.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:22.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:22.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:29:22.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:22.260 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:29:22.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:29:22.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:29:22.261 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:29:22.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:22.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:29:22.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:29:22.779 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:29:22.779 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:29:22.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:22.780 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:29:22.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:22.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:22.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:22.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:22.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:22.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:22.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:22.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:22.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:22.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:22.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:22.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:22.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:22.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:22.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:22.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:23.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:23.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:23.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:23.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:23.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:23.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:23.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:23.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:23.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:23.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.221 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:29:23.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:23.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:23.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:23.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:23.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:29:23.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:23.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:23.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:23.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:23.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:23.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:23.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:23.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:23.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:23.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:23.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:23.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:23.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:23.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:24.175 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:29:24.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:24.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:24.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:24.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:24.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:29:25.131 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:29:25.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:25.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:25.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:25.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:25.608 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:29:26.086 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:29:26.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:26.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:26.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:26.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:26.564 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:29:26.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:26.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:26.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:26.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:26.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:26.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:26.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:26.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:26.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:26.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:26.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:26.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:26.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:26.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:26.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:26.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:26.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:26.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:26.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:26.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:29:27.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:27.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:27.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:27.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:27.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:29:27.997 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:29:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:29:28.952 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:29:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:29:29.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:29.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:29.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:29.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:29.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:29.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:29.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:29.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:29.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:29.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:29.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:29.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:29.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:29.768 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:29.769 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:34.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:34.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:34.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:34.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:34.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:34.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:34.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:34.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:34.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:34.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:29:34.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:29:34.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:29:34.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:34.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:34.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:34.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:29:34.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:34.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:29:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:34.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:34.792 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:29:34.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:34.794 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:34.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:29:34.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:29:34.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:29:34.797 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:29:34.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:29:34.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:34.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:29:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:29:35.329 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:29:35.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:35.331 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:29:35.332 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:29:35.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:35.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:35.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:35.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:35.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:35.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:35.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:35.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:35.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:35.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:35.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:35.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:35.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:35.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:29:35.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:35.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:35.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:35.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:36.241 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:29:36.719 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:29:36.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:36.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:36.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:36.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:36.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:36.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:36.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:36.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:36.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:36.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:36.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:36.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:36.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:36.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:36.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:36.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:36.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:36.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:36.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:36.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:36.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:36.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:36.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:36.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:37.196 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:29:37.674 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:29:37.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:37.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:37.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:37.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:38.152 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:29:38.630 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:29:38.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:38.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:38.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:38.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:38.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:38.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:38.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:38.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:38.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:38.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:38.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:38.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:38.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:38.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:38.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:38.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:38.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:38.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:38.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:38.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:39.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:39.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:39.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:39.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:39.108 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:29:39.586 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:29:39.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:39.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:39.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:39.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:40.063 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:29:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:29:41.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:29:41.496 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:29:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:29:42.452 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:29:42.930 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:29:43.407 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:29:43.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:43.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:43.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:43.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:43.885 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:29:43.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:43.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:43.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:43.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:43.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:43.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:43.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:43.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:43.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:43.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:43.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:43.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:43.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:43.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:43.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:43.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:44.362 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:29:44.839 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:29:45.317 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:29:45.796 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:29:46.274 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:29:46.752 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:29:47.230 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:29:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:29:48.180 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:29:48.656 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:29:48.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:48.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:48.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:48.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:48.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:48.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:48.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:48.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:48.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:48.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:48.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:48.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:48.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:48.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:48.830 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:48.831 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2997 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:29:53.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:29:53.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:29:53.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:53.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:53.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:29:53.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:53.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:53.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:29:53.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:29:53.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:29:53.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:29:53.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:53.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:53.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:29:53.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:29:53.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:29:53.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:29:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:53.844 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:29:53.844 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:29:53.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:53.844 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:29:53.845 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:29:53.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:29:53.845 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:29:53.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:53.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:29:53.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:29:53.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:53.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:29:53.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:29:53.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:29:53.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:29:53.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:29:53.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:29:53.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:29:53.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:29:53.852 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:29:53.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:29:53.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:29:53.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:29:54.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:29:54.373 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:29:54.374 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:29:54.375 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:29:54.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:54.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:54.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:54.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:54.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:54.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:54.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:54.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:54.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:54.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:54.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:54.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:54.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:54.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:54.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:54.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:54.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:54.815 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:29:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:54.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:54.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:54.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:55.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:55.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:55.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:55.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:55.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:55.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:55.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:55.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:55.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:55.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:55.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:55.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:55.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:55.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:55.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:55.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:55.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:55.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:55.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:55.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:55.292 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:29:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:29:55.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:56.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:56.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:56.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:56.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:56.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:56.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:56.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:56.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:56.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:56.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:56.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:56.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:56.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:56.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:56.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:56.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:56.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:56.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:56.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:56.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:29:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:29:56.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:56.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:56.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:56.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:57.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:29:57.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:29:57.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:57.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:57.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:57.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:58.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:58.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:58.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:58.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:58.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:58.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:58.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:29:58.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:29:58.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:29:58.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:29:58.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:58.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:58.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:58.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:29:58.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:29:58.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:29:58.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:29:58.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:58.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:29:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:29:58.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:29:58.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:29:58.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:29:58.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:29:58.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:29:59.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:29:59.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:30:00.069 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:30:00.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:00.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:00.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:00.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:00.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:00.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:00.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:00.165 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:30:05.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:05.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:05.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:05.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:05.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:05.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:05.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:05.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:05.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:05.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:05.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:30:05.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:30:05.190 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:30:05.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:05.190 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:05.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:05.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:30:05.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:05.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:30:05.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:05.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:30:05.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:30:05.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:05.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:05.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:05.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:30:05.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:05.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:30:05.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:05.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:30:05.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:30:05.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:05.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:05.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:05.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:30:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:05.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:30:05.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:30:05.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:30:05.201 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:30:05.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:05.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:30:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:30:05.732 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:30:05.734 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:30:05.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:05.736 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:30:05.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:05.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:05.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:05.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:05.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:05.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:05.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:05.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:05.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:05.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:05.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:05.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:05.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:05.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:05.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:06.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:30:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:06.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:06.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:06.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:30:07.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:30:07.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:07.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:07.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:30:08.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:30:08.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:08.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:08.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:08.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:08.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:08.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:08.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:08.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:08.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:08.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:08.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:08.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:08.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:08.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:08.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:08.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:08.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:08.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:08.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:08.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:08.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:08.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:08.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:08.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:08.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:30:09.032 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:30:09.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:09.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:09.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:09.510 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:30:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:30:10.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:10.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:10.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:10.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:30:10.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:30:10.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:10.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:10.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:10.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:10.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:10.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:10.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:10.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:10.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:10.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:10.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:10.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:10.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:10.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:10.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:10.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:11.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:11.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:11.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:11.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:11.422 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:30:11.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:30:12.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:30:12.856 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:30:13.333 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:30:13.811 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:30:14.289 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:30:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:14.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:14.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:14.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:14.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:14.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:14.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:14.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:14.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:14.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:14.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:14.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:14.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:14.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:14.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:14.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:14.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:14.764 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:30:15.242 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:30:15.721 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:30:16.198 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:30:16.676 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:30:17.155 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:30:17.627 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:30:17.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:17.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:17.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:17.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:17.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:17.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:17.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:17.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:17.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:17.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:17.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:17.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:17.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:17.966 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:30:17.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.967 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:17.968 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2727 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:22.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:22.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:22.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:22.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:22.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:22.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:22.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:22.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:22.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:22.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:22.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:30:22.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:30:22.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:30:22.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:22.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:22.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:22.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:30:22.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:22.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:30:22.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:22.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:30:22.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:30:22.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:22.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:22.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:22.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:30:22.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:22.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:30:22.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:22.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:30:22.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:30:22.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:22.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:22.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:22.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:30:22.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:22.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:30:22.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:30:22.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:30:22.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:30:22.998 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:30:22.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:23.003 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:30:23.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:30:23.532 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:30:23.533 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:30:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:23.535 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:30:23.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:23.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:23.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:23.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:23.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:23.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:23.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:23.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:23.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:23.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:23.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:23.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:23.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:23.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:23.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:23.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:23.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:23.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:23.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:23.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:23.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:23.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:23.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:23.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:23.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:23.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:23.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:23.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:23.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:23.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:23.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:30:24.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:24.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:24.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:24.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:24.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:24.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:24.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:24.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:24.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:24.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:24.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:24.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:24.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:24.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:24.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:30:24.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:24.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:24.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:24.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:24.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:24.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:24.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:24.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:24.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:24.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:24.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:24.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:24.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:30:25.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:25.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:25.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:25.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:25.389 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:30:25.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:25.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:25.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:25.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:25.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:25.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:25.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:25.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:25.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:25.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:25.486 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:30:25.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:25.487 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:30:30.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:30:30.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:30:30.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:30.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:30.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:30.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:30.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:30:30.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:30.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:30.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:30:30.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:30:30.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:30:30.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:30:30.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:30.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:30.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:30:30.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:30:30.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:30:30.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:30:30.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:30.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:30:30.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:30:30.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:30.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:30.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:30:30.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:30:30.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:30:30.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:30:30.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:30.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:30:30.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:30:30.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:30.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:30:30.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:30:30.517 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:30:30.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:30:30.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:30:31.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:30:31.054 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:30:31.056 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:30:31.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:31.059 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:30:31.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:31.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:31.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:31.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:30:31.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:30:31.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:30:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:30:31.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:31.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:31.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:31.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:30:31.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:30:31.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:30:31.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:30:31.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:31.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:30:31.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:30:31.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:31.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:31.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:31.960 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:30:32.438 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:30:32.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:32.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:32.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:32.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:32.916 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:30:33.394 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:30:33.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:33.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:33.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:33.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:33.871 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:30:34.350 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:30:34.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:34.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:34.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:34.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:34.828 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:30:35.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:30:35.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:30:35.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:30:35.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:30:35.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:30:35.783 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:30:36.261 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:30:36.739 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:30:37.216 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:30:37.694 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:30:38.172 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:30:38.650 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:30:39.128 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:30:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:30:40.084 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:30:40.562 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:30:41.036 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:30:41.514 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:30:41.992 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:30:42.470 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:30:42.948 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:30:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:30:43.905 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:30:44.382 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:30:44.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:30:45.338 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:30:45.816 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:30:46.294 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:30:46.772 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:30:47.250 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:30:47.728 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:30:48.206 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:30:48.684 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:30:49.162 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:30:49.640 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:30:50.118 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:30:50.596 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:30:51.075 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:30:51.552 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:30:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:30:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:30:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:30:53.463 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:30:53.941 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:30:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:30:54.896 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:30:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:30:55.853 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:30:56.332 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:30:56.810 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:30:57.288 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:30:57.766 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:30:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:30:58.720 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:30:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:30:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:31:00.154 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:31:00.632 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:31:01.110 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:31:01.587 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:31:02.065 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:31:02.543 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:31:03.022 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:31:03.500 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:31:03.977 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:31:04.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:04.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:31:04.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:04.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:04.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:04.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:04.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:31:04.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:04.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:04.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:31:04.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:31:04.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:04.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:31:04.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:31:04.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:31:04.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:31:04.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:31:04.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:31:04.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:04.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:04.453 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:31:04.932 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:31:05.410 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:31:05.888 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:31:06.366 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:31:06.844 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:31:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:31:07.800 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:31:08.279 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:31:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:31:09.234 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:31:09.713 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:31:10.191 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:31:10.669 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:31:11.147 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:31:11.625 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:31:12.100 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:31:12.578 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:31:13.056 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:31:13.534 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:31:14.012 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:31:14.490 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:31:14.968 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:31:15.447 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:31:15.925 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:31:16.403 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:31:16.882 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:31:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:31:17.839 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:31:18.317 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:31:18.795 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:31:19.273 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:31:19.751 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:31:20.229 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:31:20.707 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:31:21.185 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:31:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:31:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:31:22.620 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:31:23.098 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:31:23.576 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:31:24.054 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:31:24.532 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:31:25.010 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:31:25.488 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:31:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:31:26.444 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:31:26.922 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:31:27.401 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:31:27.879 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:31:28.357 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:31:28.836 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:31:29.314 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:31:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:31:30.270 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:31:30.749 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:31:31.227 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:31:31.706 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:31:32.184 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:31:32.662 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:31:33.140 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:31:33.618 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:31:34.097 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 02:31:34.575 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 02:31:35.053 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 02:31:35.531 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 02:31:36.009 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 02:31:36.487 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 02:31:36.965 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 02:31:37.443 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 02:31:37.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:31:37.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:37.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:37.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:37.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:37.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:37.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:31:37.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:31:37.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:31:37.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:31:37.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:31:37.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:37.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:31:37.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:31:37.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:31:37.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:31:37.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:31:37.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:31:37.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:37.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:31:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 02:31:38.398 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 02:31:38.875 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 02:31:39.352 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 02:31:39.830 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 02:31:40.308 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 02:31:40.786 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 02:31:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 02:31:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 02:31:42.220 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 02:31:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 02:31:43.176 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 02:31:43.653 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 02:31:44.131 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 02:31:44.609 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 02:31:45.087 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 02:31:45.564 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 02:31:46.041 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 02:31:46.518 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 02:31:46.996 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 02:31:47.474 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 02:31:47.952 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 02:31:48.430 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 02:31:48.908 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 02:31:49.385 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 02:31:49.863 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 02:31:50.341 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 02:31:50.819 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 02:31:51.298 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 02:31:51.776 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 02:31:52.254 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 02:31:52.731 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 02:31:53.209 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 02:31:53.686 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 02:31:54.164 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 02:31:54.642 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 02:31:55.120 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 02:31:55.598 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 02:31:56.076 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 02:31:56.554 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 02:31:57.032 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 02:31:57.509 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 02:31:57.988 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 02:31:58.466 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 02:31:58.944 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 02:31:59.422 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 02:31:59.899 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-11 02:32:00.378 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-11 02:32:00.855 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-11 02:32:01.333 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-11 02:32:01.810 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-11 02:32:02.288 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-11 02:32:02.765 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-03-11 02:32:03.243 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-03-11 02:32:03.721 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-03-11 02:32:04.199 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-03-11 02:32:04.677 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-03-11 02:32:05.155 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-03-11 02:32:05.633 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-03-11 02:32:06.111 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-03-11 02:32:06.589 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-03-11 02:32:07.067 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-03-11 02:32:07.545 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-03-11 02:32:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-03-11 02:32:08.500 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-03-11 02:32:08.977 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-03-11 02:32:09.455 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-03-11 02:32:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-03-11 02:32:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-03-11 02:32:10.889 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-03-11 02:32:11.366 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-03-11 02:32:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-03-11 02:32:12.322 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-03-11 02:32:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-03-11 02:32:13.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:13.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:32:13.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:13.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:13.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:13.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:13.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:32:13.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:13.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:13.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:32:13.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:32:13.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:13.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:32:13.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:32:13.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:32:13.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:32:13.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:32:13.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:32:13.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:13.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-03-11 02:32:13.753 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-03-11 02:32:14.232 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-03-11 02:32:14.709 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-03-11 02:32:15.187 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-03-11 02:32:15.665 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-03-11 02:32:16.143 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-03-11 02:32:16.621 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-03-11 02:32:17.099 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-03-11 02:32:17.577 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-03-11 02:32:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-03-11 02:32:18.534 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-03-11 02:32:19.012 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-03-11 02:32:19.490 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-03-11 02:32:19.968 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-03-11 02:32:20.447 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-03-11 02:32:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-03-11 02:32:21.404 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-03-11 02:32:21.881 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-03-11 02:32:22.360 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-03-11 02:32:22.837 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-03-11 02:32:23.315 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-03-11 02:32:23.793 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-03-11 02:32:24.271 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-03-11 02:32:24.749 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-03-11 02:32:25.227 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-03-11 02:32:25.706 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-03-11 02:32:26.183 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-03-11 02:32:26.661 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-03-11 02:32:27.140 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-03-11 02:32:27.618 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-03-11 02:32:28.095 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-03-11 02:32:28.573 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-03-11 02:32:29.051 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-03-11 02:32:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-03-11 02:32:30.006 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-03-11 02:32:30.484 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-03-11 02:32:30.962 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-03-11 02:32:31.440 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-03-11 02:32:31.917 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-03-11 02:32:32.395 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-03-11 02:32:32.873 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-03-11 02:32:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-03-11 02:32:33.828 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-03-11 02:32:34.307 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-03-11 02:32:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-03-11 02:32:35.264 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-03-11 02:32:35.741 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-03-11 02:32:36.219 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-03-11 02:32:36.697 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-03-11 02:32:37.175 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-03-11 02:32:37.653 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-03-11 02:32:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-03-11 02:32:38.609 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-03-11 02:32:39.086 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-03-11 02:32:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-03-11 02:32:40.041 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-03-11 02:32:40.519 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-03-11 02:32:40.997 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-03-11 02:32:41.475 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-03-11 02:32:41.952 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-03-11 02:32:42.430 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-03-11 02:32:42.908 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-03-11 02:32:43.386 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-03-11 02:32:43.864 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-03-11 02:32:44.342 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-03-11 02:32:44.820 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-03-11 02:32:45.298 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-03-11 02:32:45.776 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-03-11 02:32:46.253 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-03-11 02:32:46.731 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-03-11 02:32:47.210 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-03-11 02:32:47.688 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-03-11 02:32:48.165 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-03-11 02:32:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-03-11 02:32:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:32:48.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:48.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:48.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:32:48.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:32:48.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:32:48.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:32:48.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:48.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:48.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:48.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:48.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:32:48.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:32:48.739 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:32:53.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:32:53.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:32:53.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:53.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:53.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:53.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:53.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:53.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:32:53.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:53.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:32:53.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:32:53.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:32:53.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:32:53.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:32:53.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:53.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:53.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:32:53.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:32:53.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:32:53.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:32:53.756 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:32:53.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:32:53.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:32:53.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:32:53.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:32:53.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.761 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:32:53.761 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:32:53.761 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:32:53.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:53.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:32:53.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:32:53.763 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:32:58.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:32:58.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:32:58.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:58.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:58.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:58.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:58.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:32:58.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:32:58.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:58.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:32:58.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:32:58.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:32:58.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:32:58.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:32:58.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:58.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:32:58.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:32:58.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:32:58.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:32:58.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:32:58.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:32:58.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:32:58.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:32:58.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:58.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:32:58.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:32:58.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:32:58.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:32:58.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:32:58.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:32:58.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:32:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:32:58.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:32:58.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:32:58.788 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:32:58.788 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:32:58.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:32:59.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:32:59.324 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:32:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:32:59.327 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:32:59.331 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:32:59.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:59.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:59.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:32:59.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:32:59.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:32:59.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:32:59.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:32:59.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:59.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:32:59.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:32:59.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:32:59.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:32:59.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:32:59.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:32:59.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:59.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:32:59.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:32:59.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:32:59.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:32:59.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:32:59.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:00.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:33:00.711 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:33:00.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:00.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:00.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:00.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:00.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:00.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:00.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:00.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:00.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:00.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:00.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:00.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:00.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:00.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:00.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:00.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:00.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:00.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:00.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:00.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:00.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:00.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:00.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:01.188 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:33:01.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:33:01.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:01.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:01.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:01.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:02.144 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:33:02.623 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:33:02.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:02.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:02.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:02.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:03.101 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:33:03.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:03.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:03.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:03.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:03.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:03.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:03.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:03.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:03.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:03.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:03.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:03.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:03.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:03.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:03.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:03.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:03.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:03.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:03.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:03.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:03.579 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:33:03.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:03.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:03.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:03.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:04.057 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:33:04.535 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:33:05.013 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:33:05.491 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:33:05.969 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:33:06.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:33:06.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:06.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:06.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:06.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:06.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:06.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:06.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:06.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:06.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:06.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:06.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:06.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:06.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:06.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:06.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:06.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:06.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:06.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:06.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:06.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:06.924 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:33:07.400 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:33:07.878 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:33:08.356 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:33:08.833 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:33:09.312 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:33:09.790 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:33:10.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:33:10.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:10.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:10.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:10.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:10.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:10.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:10.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:10.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:10.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:33:10.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:33:10.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:33:10.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:33:10.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:33:10.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:33:10.370 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.372 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.372 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.372 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.372 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:10.372 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:33:15.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:33:15.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:33:15.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:33:15.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:33:15.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:33:15.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:33:15.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:33:15.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:33:15.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:33:15.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:33:15.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:33:15.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:33:15.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:33:15.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:33:15.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:33:15.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:33:15.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:33:15.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:33:15.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:33:15.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:15.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:33:15.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:33:15.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:33:15.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:15.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:33:15.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:33:15.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:33:15.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:33:15.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:33:15.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:33:15.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:33:15.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:33:15.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:15.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:33:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:33:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:33:15.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:33:15.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:33:15.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:33:15.401 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:33:15.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:33:15.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:33:15.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:33:15.931 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:33:15.933 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:33:15.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:15.934 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:33:15.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:15.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:15.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:15.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:15.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:15.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:15.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:15.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:15.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:15.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:15.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:15.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:15.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:15.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:15.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:15.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:16.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:33:16.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:16.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:16.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:16.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:16.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:33:17.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:33:17.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:17.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:17.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:17.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:17.802 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:33:18.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:33:18.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:18.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:18.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:18.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:18.758 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:33:19.236 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:33:19.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:19.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:19.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:19.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:33:20.191 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:33:20.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:33:20.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:33:20.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:33:20.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:33:20.669 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:33:21.147 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:33:21.625 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:33:22.103 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:33:22.580 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:33:23.058 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:33:23.535 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:33:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:33:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:33:24.968 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:33:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:33:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:33:26.402 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:33:26.880 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:33:27.359 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:33:27.836 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:33:28.314 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:33:28.792 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:33:29.270 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:33:29.745 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:33:30.223 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:33:30.701 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:33:30.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:30.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:30.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:30.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:31.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:31.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:31.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:31.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:31.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:31.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:31.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:31.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:31.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:31.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:31.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:31.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:31.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:31.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:31.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:31.178 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:33:31.656 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:33:32.134 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:33:32.613 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:33:33.091 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:33:33.569 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:33:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:33:34.525 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:33:35.003 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:33:35.480 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:33:35.958 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:33:36.436 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:33:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:33:37.393 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:33:37.870 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:33:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:33:38.826 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:33:39.304 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:33:39.782 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:33:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:33:40.738 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:33:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:33:41.694 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:33:42.172 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:33:42.651 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:33:43.129 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:33:43.607 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:33:44.085 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:33:44.563 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:33:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:33:45.519 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:33:45.998 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:33:46.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:46.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:46.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:46.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:46.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:46.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:46.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:46.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:33:46.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:33:46.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:33:46.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:33:46.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:46.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:46.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:46.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:33:46.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:33:46.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:33:46.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:33:46.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:46.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:33:46.474 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:33:46.952 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:33:47.430 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:33:47.907 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:33:48.385 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:33:48.862 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:33:49.340 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:33:49.818 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:33:50.296 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:33:50.774 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:33:51.252 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:33:51.730 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:33:52.208 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:33:52.686 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:33:53.164 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:33:53.641 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:33:54.118 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:33:54.596 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:33:55.073 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:33:55.551 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:33:56.029 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:33:56.507 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:33:56.985 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:33:57.463 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:33:57.941 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:33:58.418 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:33:58.896 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:33:59.373 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:33:59.850 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:34:00.328 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:34:00.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:00.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:00.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:00.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:00.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:00.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:00.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:00.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:00.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:00.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:00.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:00.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:00.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:00.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:00.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:34:00.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:34:00.805 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:34:00.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:00.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:00.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:00.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:01.281 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:34:01.760 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:34:02.238 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:34:02.715 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:34:03.193 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:34:03.672 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:34:04.150 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:34:04.628 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:34:05.105 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:34:05.583 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:34:06.061 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:34:06.539 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:34:07.017 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:34:07.496 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:34:07.974 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:34:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:34:08.929 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:34:09.406 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:34:09.884 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:34:10.362 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:34:10.839 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:34:11.318 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:34:11.796 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:34:12.274 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:34:12.752 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:34:13.229 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:34:13.706 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:34:14.184 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:34:14.662 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:34:15.139 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:34:15.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:15.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:15.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:15.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:15.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:15.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:15.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:15.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:15.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:15.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:15.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:15.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:15.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:34:15.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:34:15.553 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:15.554 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=12841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:34:20.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:34:20.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:34:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:20.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:20.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:20.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:20.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:20.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:34:20.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:20.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:34:20.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:34:20.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:34:20.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:34:20.567 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:34:20.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:34:20.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:34:20.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:34:20.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:34:20.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:34:20.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:34:20.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:34:20.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:34:20.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:34:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:34:20.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:34:20.579 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:34:20.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:34:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:20.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:20.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:34:20.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:34:20.582 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:34:25.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:34:25.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:34:25.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:25.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:25.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:25.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:25.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:34:25.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:34:25.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:25.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:34:25.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:34:25.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:34:25.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:34:25.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:34:25.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:25.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:34:25.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:34:25.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:34:25.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:34:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:25.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:34:25.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:34:25.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:34:25.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:25.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:34:25.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:34:25.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:34:25.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:34:25.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:34:25.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:34:25.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:34:25.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:34:25.609 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:34:25.609 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:34:25.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:34:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:34:26.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:34:26.134 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:34:26.137 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:34:26.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:26.139 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:34:26.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:26.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:26.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:26.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:26.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:26.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:26.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:26.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:26.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:26.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:26.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:34:26.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:34:26.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:26.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:26.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:26.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:26.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:34:26.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:26.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:26.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:26.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:27.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:34:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:34:27.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:27.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:27.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:27.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:28.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:34:28.488 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:34:28.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:28.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:28.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:28.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:28.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:34:29.444 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:34:29.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:29.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:29.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:29.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:34:30.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:34:30.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:34:30.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:34:30.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:34:30.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:34:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:34:31.356 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:34:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:34:32.312 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:34:32.790 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:34:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:34:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:34:34.223 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:34:34.701 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:34:35.180 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:34:35.658 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:34:36.135 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:34:36.613 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:34:36.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:36.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:36.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:36.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:36.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:36.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:36.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:36.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:36.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:36.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:36.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:36.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:36.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:36.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:36.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:34:36.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:34:36.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:36.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:36.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:36.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:37.091 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:34:37.569 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:34:38.047 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:34:38.525 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:34:39.003 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:34:39.481 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:34:39.960 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:34:40.438 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:34:40.916 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:34:41.394 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:34:41.872 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:34:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:34:42.828 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:34:43.306 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:34:43.784 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:34:44.263 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:34:44.741 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:34:45.219 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:34:45.698 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:34:46.176 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:34:46.654 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:34:47.132 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:34:47.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:47.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:47.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:47.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:47.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:47.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:47.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:47.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:47.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:47.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:47.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:47.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:47.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:47.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:47.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:34:47.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:34:47.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:47.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:47.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:47.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:47.608 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:34:48.086 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:34:48.564 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:34:49.042 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:34:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:34:49.997 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:34:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:34:50.952 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:34:51.429 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:34:51.906 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:34:52.384 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:34:52.862 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:34:53.340 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:34:53.816 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:34:54.294 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:34:54.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:54.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:54.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:54.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:54.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:54.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:54.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:54.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:34:54.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:34:54.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:34:54.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:34:54.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:54.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:54.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:54.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:34:54.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:34:54.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:34:54.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:34:54.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:54.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:34:54.771 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:34:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:34:55.726 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:34:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:34:56.681 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:34:57.159 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:34:57.637 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:34:58.115 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:34:58.593 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:34:59.071 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:34:59.548 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:35:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:35:00.504 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:35:00.981 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:35:01.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:01.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:01.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:01.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:01.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:01.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:01.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:01.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:01.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:01.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:01.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:01.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:01.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:01.458 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:35:01.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:06.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:06.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:06.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:06.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:06.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:06.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:06.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:06.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:06.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:06.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:06.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:35:06.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:35:06.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:35:06.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:06.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:06.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:06.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:35:06.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:06.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:35:06.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:06.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:06.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:06.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:35:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:06.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:06.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:35:06.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:06.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:35:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:35:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:35:06.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:35:06.490 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:35:06.490 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:35:06.490 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:06.495 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:35:06.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:35:07.024 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:35:07.026 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:35:07.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:07.028 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:35:07.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:07.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:07.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:07.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:07.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:07.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:07.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:07.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:07.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:07.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:07.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:07.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:07.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:07.454 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:35:07.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:07.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:07.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:07.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:07.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:07.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:07.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:07.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:07.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:07.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:07.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:07.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:07.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:07.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:35:07.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:07.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:07.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:07.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:08.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:08.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:08.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:08.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:08.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:08.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:08.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:08.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:08.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:08.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:08.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:35:08.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:08.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:08.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:08.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:08.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:08.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:08.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:08.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:08.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:08.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:08.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:08.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:08.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:08.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:08.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:08.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:08.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:08.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:08.881 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:35:09.359 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:35:09.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:09.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:09.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:09.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:09.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:09.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:09.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:09.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:09.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:09.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:09.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:09.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:09.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:09.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:09.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:09.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:09.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:09.695 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:35:09.695 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.695 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.695 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.695 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.695 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.696 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:09.696 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:14.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:14.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:14.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:14.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:14.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:14.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:14.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:14.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:14.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:14.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:14.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:35:14.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:35:14.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:35:14.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:14.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:14.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:14.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:35:14.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:14.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:35:14.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:14.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:35:14.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:35:14.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:14.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:14.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:14.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:35:14.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:14.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:35:14.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:14.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:14.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:14.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:35:14.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:35:14.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:35:14.752 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:35:14.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:35:15.240 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:35:15.281 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:35:15.283 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:35:15.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:15.285 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:35:15.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:15.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:15.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:15.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:15.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:15.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:15.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:15.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:15.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:15.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:15.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:15.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:15.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:15.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:15.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:15.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:35:15.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:15.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:15.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:15.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:16.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:35:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:35:16.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:16.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:16.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:16.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:17.150 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:35:17.628 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:35:17.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:17.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:17.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:17.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:18.106 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:35:18.584 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:35:18.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:18.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:18.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:18.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:18.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:18.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:18.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:18.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:18.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:18.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:18.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:18.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:18.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:18.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:18.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:18.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:18.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:18.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:18.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:18.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:18.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:18.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:18.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:19.061 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:35:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:35:19.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:19.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:19.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:19.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:20.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:35:20.495 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:35:20.974 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:35:21.452 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:35:21.930 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:35:22.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:22.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:22.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:22.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:22.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:22.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:22.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:22.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:22.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:22.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:22.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:22.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:22.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:22.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:22.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:22.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:22.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:22.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:22.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:22.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:22.405 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:35:22.884 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:35:23.361 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:35:23.839 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:35:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:35:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:35:25.272 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:35:25.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:25.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:25.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:25.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:25.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:25.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:25.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:25.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:25.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:25.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:25.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:25.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:25.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:25.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:25.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:25.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:25.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:25.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:25.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:25.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:35:26.226 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:35:26.704 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:35:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:35:27.659 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:35:28.137 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:35:28.616 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:35:29.094 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:35:29.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:29.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:29.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:29.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:29.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:29.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:29.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:29.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:29.430 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:35:29.430 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:29.431 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:29.431 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:29.431 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:29.431 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:29.431 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3134 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:35:34.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:34.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:34.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:34.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:34.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:34.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:34.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:34.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:34.439 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:34.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:34.439 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:35:34.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:35:34.440 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:35:34.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:34.440 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:34.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:34.440 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:35:34.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:34.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:35:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:34.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:34.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:35:34.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:34.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:34.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:35:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:35:34.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:35:34.449 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:35:34.449 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:34.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:35:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:35:34.978 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:35:34.980 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:35:34.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:34.982 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:35:35.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:35.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:35.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:35.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:35.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:35.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:35.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:35.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:35.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:35.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:35.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:35.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:35.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:35.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:35.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:35.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:35.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:35.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:35.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:35.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:35:35.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:35.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:35.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:35.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:35.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:35.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:35.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:35.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:35.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:35.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:35.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:35.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:35.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:35.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:35.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:35.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:35:36.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:36.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:36.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:36.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:36.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:36.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:36.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:36.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:36.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:36.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:36.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:36.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:36.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:36.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:36.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:36.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:36.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:36.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:36.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:36.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:36.361 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:35:36.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:36.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:36.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:35:36.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:36.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:36.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:36.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:37.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:37.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:37.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:37.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:37.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:37.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:37.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:37.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:37.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:37.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:37.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:37.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:37.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:37.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:37.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:37.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:37.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:35:37.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:37.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:37.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:37.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:37.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:35:38.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:38.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:38.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:38.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:38.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:38.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:38.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:38.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:38.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:38.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:38.124 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:35:38.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:43.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:35:43.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:35:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:43.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:43.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:35:43.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:43.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:43.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:35:43.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:35:43.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:35:43.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:35:43.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:43.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:43.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:35:43.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:35:43.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:35:43.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:35:43.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:43.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:35:43.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:35:43.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:43.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:43.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:35:43.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:35:43.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:35:43.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:35:43.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:43.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:43.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:35:43.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:35:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:35:43.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:35:43.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:35:43.155 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:35:43.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:35:43.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:35:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:35:43.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:35:43.692 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:35:43.694 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:35:43.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:43.696 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:35:43.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:43.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:43.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:43.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:43.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:43.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:43.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:43.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:43.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:43.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:43.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:43.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:43.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:43.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:44.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:35:44.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:44.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:44.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:44.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:44.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:35:45.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:35:45.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:45.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:45.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:45.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:45.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:35:46.032 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:35:46.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:46.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:46.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:35:46.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:46.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:46.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:46.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:46.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:46.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:46.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:46.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:46.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:46.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:46.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:46.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:46.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:46.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:46.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:46.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:46.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:46.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:46.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:46.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:46.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:35:47.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:47.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:47.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:47.466 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:35:47.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:35:48.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:35:48.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:35:48.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:35:48.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:35:48.415 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:35:48.892 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:35:49.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:35:49.849 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:35:50.327 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:35:50.805 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:35:51.283 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:35:51.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:51.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:51.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:51.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:51.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:51.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:51.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:51.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:51.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:51.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:51.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:51.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:51.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:51.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:51.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:51.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:51.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:51.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:51.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:51.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:35:52.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:35:52.715 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:35:53.193 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:35:53.670 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:35:54.148 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:35:54.626 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:35:55.104 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:35:55.582 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:35:56.060 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:35:56.538 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:35:57.015 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:35:57.493 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:35:57.971 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:35:58.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:58.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:58.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:58.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:58.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:58.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:58.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:35:58.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:35:58.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:35:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:35:58.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:58.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:58.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:58.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:35:58.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:35:58.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:35:58.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:35:58.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:58.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:35:58.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:35:58.924 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:35:59.402 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:35:59.878 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:36:00.356 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:36:00.834 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:36:01.312 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:36:01.789 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:36:02.268 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:36:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:36:03.224 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:36:03.702 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:36:04.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:36:04.656 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:36:04.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:04.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:04.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:04.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:04.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:04.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:04.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:04.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:04.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:04.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:04.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:04.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:04.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:04.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:04.993 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:04.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4664 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:09.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:09.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:09.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:09.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:09.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:09.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:10.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:10.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:10.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:10.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:10.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:10.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:10.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:10.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:10.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:10.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:10.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:10.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:10.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:10.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:10.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:10.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:10.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:10.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:10.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:10.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:10.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:10.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:10.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:10.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:10.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:10.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:10.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:10.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:10.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:10.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:10.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:10.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:10.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:10.021 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:10.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:10.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:10.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:10.551 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:10.554 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:10.556 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:10.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:10.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:10.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:10.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:10.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:10.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:10.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:10.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:10.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:10.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:10.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:36:10.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:36:10.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:10.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:10.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:10.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:10.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:11.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:11.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:11.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:11.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:11.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:11.942 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:36:12.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:12.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:12.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:12.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:12.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:12.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:12.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:12.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:12.420 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:36:12.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:12.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:12.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:12.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:12.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:12.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:12.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:12.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:12.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:12.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:36:12.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:36:12.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:12.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:12.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:12.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:12.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:36:13.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:13.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:13.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:13.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:13.374 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:36:13.852 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:36:14.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:14.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:14.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:14.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:14.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:36:14.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:36:15.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:15.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:15.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:15.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:15.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:15.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:15.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:15.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:15.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:15.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:15.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:15.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:15.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:15.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:15.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:15.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:15.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:15.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:15.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:36:15.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:36:15.287 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:36:15.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:15.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:15.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:15.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:15.762 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:36:16.240 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:36:16.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:36:17.196 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:36:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:36:18.153 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:36:18.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:36:19.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:36:19.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:36:19.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:19.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:19.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:19.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:19.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:19.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:19.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:19.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:19.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:19.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:36:19.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:19.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:19.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:19.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:19.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:36:19.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:36:19.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:36:19.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:36:19.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:19.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:20.063 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:36:20.542 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:36:21.019 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:36:21.497 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:36:21.975 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:36:22.454 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:36:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:36:23.409 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:36:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:36:24.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:36:24.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:24.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:36:24.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:36:24.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:24.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:24.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:24.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:24.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:24.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:24.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:24.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:24.223 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:29.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:29.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:29.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:29.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:29.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:29.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:29.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:29.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:29.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:29.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:29.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:29.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:29.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:29.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:29.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:29.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:29.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:29.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:29.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:29.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:29.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:29.240 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:29.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:29.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:29.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:29.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:29.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:29.245 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:29.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:29.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:29.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:29.733 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:29.771 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:29.773 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:29.776 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:29.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:29.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:30.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:30.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:30.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:30.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:30.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:30.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:30.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:31.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:31.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:31.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:31.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:31.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:31.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:31.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:31.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:31.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:31.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:31.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:31.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:31.106 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:31.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:36:36.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:36.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:36.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:36.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:36.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:36.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:36.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:36.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:36.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:36.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:36.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:36.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:36.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:36.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:36.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:36.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:36.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:36.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:36.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:36.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:36.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:36.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:36.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:36.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:36.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:36.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:36.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:36.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:36.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:36.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:36.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:36.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:36.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:36.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:36.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:36.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:36.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:36.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:36.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:36.133 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:36.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:36.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:36.138 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:36.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:36.661 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:36.664 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.665 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:36.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:37.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:37.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:37.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:37.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:37.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:37.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:37.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:37.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:37.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:37.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:37.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:37.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:37.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:37.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:37.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:37.997 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:43.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:43.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:43.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:43.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:43.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:43.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:43.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:43.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:43.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:43.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:43.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:43.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:43.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:43.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:43.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:43.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:43.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:43.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:43.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:43.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:43.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:43.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:43.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:43.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:43.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:43.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:43.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:43.027 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:43.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:43.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:43.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:43.515 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:43.552 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:43.554 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:43.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.556 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:43.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:43.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:44.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:44.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:44.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:44.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:44.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.472 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:44.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:44.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:44.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:44.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:44.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:44.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:44.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:44.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:44.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:44.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:44.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:44.892 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:49.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:49.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:49.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:49.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:49.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:49.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:49.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:49.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:49.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:49.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:49.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:49.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:49.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:49.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:49.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:49.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:49.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:49.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:49.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:49.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:49.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:49.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:49.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:49.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:49.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:49.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:49.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:49.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:49.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:49.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:49.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:49.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:49.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:49.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:49.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:49.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:49.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.924 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:49.924 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:49.924 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:49.924 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:49.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:49.929 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:50.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:50.452 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:50.453 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:50.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.455 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:50.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:50.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:50.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:50.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:50.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:50.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:51.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:51.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:51.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:51.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:51.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:51.765 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:36:56.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:56.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:56.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:56.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:56.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:56.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:56.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:56.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:56.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:56.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:36:56.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:36:56.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:36:56.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:36:56.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:56.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:56.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:56.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:36:56.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:36:56.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:36:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:56.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:36:56.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:36:56.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:36:56.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:56.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:36:56.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:36:56.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:56.790 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:36:56.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:56.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:36:56.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:36:56.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:36:56.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:56.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:36:56.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:36:56.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:36:56.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:36:56.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:36:56.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:36:56.795 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:36:56.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:56.800 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:36:57.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:36:57.325 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:36:57.328 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:36:57.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.330 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:36:57.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:36:57.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:36:57.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:57.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:57.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:57.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:36:58.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:36:58.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:36:58.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:36:58.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:36:58.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:36:58.657 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:03.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:03.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:03.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:03.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:03.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:03.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:03.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:03.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:03.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:03.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:03.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:03.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:03.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:03.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:03.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:03.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:03.676 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:03.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:03.676 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:03.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:03.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:03.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:03.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:03.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:03.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:03.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:03.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:03.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:03.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:03.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:03.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:03.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:03.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:03.682 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:03.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:03.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:04.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:04.210 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:04.212 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:04.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.214 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:37:04.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:04.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:04.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:04.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:04.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:04.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:37:05.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:05.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:05.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:05.571 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:10.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:10.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:10.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:10.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:10.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:10.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:10.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:10.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:10.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:10.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:10.587 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:10.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:10.590 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:10.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:10.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:10.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:10.591 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:10.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:10.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:10.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:10.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:10.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:10.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:10.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:10.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:10.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:10.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:10.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:10.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:10.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:10.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:10.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:10.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:10.598 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:10.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:10.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:11.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:11.130 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:11.132 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:11.134 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:11.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:37:11.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:11.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:11.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:11.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:11.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:11.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.025 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:37:12.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:12.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:12.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:12.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:12.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:12.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:12.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:12.456 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:17.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:17.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:17.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:17.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:17.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:17.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:17.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:17.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:17.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:17.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:17.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:17.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:17.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:17.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:17.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:17.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:17.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:17.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:17.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:17.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:17.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:17.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:17.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:17.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:17.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:17.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:17.473 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:17.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:17.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:17.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:17.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:17.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:17.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:17.479 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:17.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:17.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:17.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:18.012 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:18.015 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:18.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.017 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:18.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:18.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:18.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:18.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:18.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:18.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:18.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:18.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:18.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:18.094 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:18.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:23.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:23.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:23.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:23.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:23.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:23.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:23.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:23.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:23.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:23.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:23.110 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:23.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:23.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:23.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:23.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:23.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:23.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:23.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:23.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:23.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:23.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:23.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:23.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:23.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:23.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:23.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.121 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:23.121 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:23.121 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:23.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:23.126 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:23.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:23.654 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:23.656 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:23.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.658 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:23.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:23.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:23.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:23.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:23.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:23.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:23.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:23.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:23.770 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:28.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:28.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:28.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:28.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:28.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:28.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:28.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:28.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:28.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:28.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:28.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:28.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:28.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:28.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:28.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:28.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:28.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:28.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:28.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:28.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:28.788 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:28.788 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:28.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:28.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:28.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:28.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:28.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:28.796 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:28.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:28.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:29.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:29.332 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:29.334 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:29.335 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:29.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:29.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:29.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:29.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:29.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:29.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:29.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:29.430 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:34.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:34.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:34.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:34.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:34.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:34.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:34.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:34.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:34.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:34.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:34.446 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:34.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:34.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:34.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:34.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:34.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:34.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:34.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:34.452 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:34.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:34.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:34.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:34.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:34.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:34.456 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:34.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:34.456 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:34.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:34.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:34.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:34.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:34.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:34.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:34.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:34.460 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:34.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:34.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:34.465 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:34.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:34.993 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:34.995 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:34.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:34.997 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:35.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:35.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:35.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:35.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:35.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:35.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:35.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:35.062 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:40.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:40.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:40.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:40.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:40.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:40.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:40.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:40.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:40.079 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:40.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:40.080 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:40.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:40.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:40.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:40.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:40.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:40.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:40.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:40.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:40.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:40.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:40.088 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:40.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:40.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:40.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:40.089 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:40.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:40.089 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:40.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:40.091 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:40.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:40.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:40.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:40.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:40.092 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:40.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:40.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:40.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:40.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:40.096 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:40.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:40.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:40.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:40.631 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:40.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.634 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:40.635 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:40.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:40.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:40.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:40.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:40.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:40.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:40.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:40.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:40.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:40.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:40.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:40.714 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:40.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:40.714 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:45.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:45.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:45.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:45.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:45.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:45.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:45.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:45.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:45.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:45.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:45.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:45.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:45.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:45.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:45.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:45.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:45.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:45.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:45.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:45.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:45.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:45.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:45.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:45.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:45.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:45.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:45.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:45.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:45.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:45.732 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:45.732 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:45.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:45.732 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:45.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:45.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:45.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:45.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:45.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:45.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:45.735 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:45.736 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:45.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:46.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:46.261 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:46.262 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:46.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.263 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:46.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:46.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:46.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:46.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:46.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:46.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:46.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:46.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:46.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:46.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:46.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:46.376 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:46.376 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:51.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:51.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:51.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:51.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:51.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:51.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:51.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:51.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:51.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:51.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:51.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:51.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:51.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:51.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:51.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:51.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:51.399 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:51.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:51.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:51.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:51.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:51.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:51.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:51.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:51.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:51.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:51.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:51.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:51.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:51.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:51.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:51.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:51.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:51.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:51.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:51.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:51.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:51.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:51.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:51.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:51.410 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:51.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:51.898 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:51.943 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:51.945 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:51.947 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:51.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:51.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:52.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:52.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:52.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:52.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:52.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:52.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:52.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:52.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:52.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:52.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:52.052 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:37:52.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:52.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:52.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:52.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:52.052 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:37:57.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:37:57.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:37:57.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:57.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:57.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:37:57.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:57.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:57.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:37:57.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:37:57.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:37:57.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:37:57.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:57.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:57.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:37:57.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:37:57.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:57.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:57.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:37:57.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:37:57.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:37:57.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:37:57.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:57.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:37:57.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:37:57.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:37:57.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:37:57.074 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:37:57.074 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:37:57.074 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:37:57.079 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:37:57.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:37:57.593 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:37:57.594 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:37:57.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:37:57.594 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:37:57.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:37:57.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:37:57.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:37:58.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:37:58.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:58.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:58.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:58.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:58.519 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:37:58.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:37:59.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:37:59.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:37:59.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:37:59.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:37:59.475 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:37:59.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:38:00.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:00.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:00.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:00.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:00.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:38:00.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:38:01.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:01.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:01.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:01.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:01.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:01.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:01.086 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:01.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:01.086 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:01.086 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:01.086 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:01.086 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:01.086 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:06.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:06.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:06.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:06.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:06.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:06.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:06.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:06.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:06.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:06.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:06.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:06.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:06.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:06.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:06.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:06.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:06.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:06.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:06.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:06.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:06.105 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:06.105 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:06.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:06.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:06.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:06.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:06.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:06.107 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:06.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:06.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:06.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:06.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:06.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:06.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:06.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:06.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:06.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:06.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:06.112 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:06.112 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:06.112 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:06.117 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:38:06.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:38:06.641 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:38:06.643 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:38:06.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:06.644 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:38:06.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:06.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:06.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:06.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:06.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:06.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:06.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:06.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:06.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:38:06.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:06.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:06.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:06.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:07.078 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:38:07.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:07.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:07.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:07.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:07.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:07.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:07.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:07.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:07.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:07.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:07.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:07.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:07.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:07.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:07.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:07.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:07.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:07.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:07.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:07.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:07.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:07.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:07.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:07.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:07.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:07.231 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:07.232 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:12.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:12.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:12.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:12.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:12.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:12.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:12.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:12.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:12.241 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:12.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:12.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:12.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:12.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:12.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:12.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:12.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:12.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:12.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:12.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:12.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:12.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:12.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:12.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:12.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:12.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:12.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:12.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:12.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:12.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:12.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:12.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:12.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:12.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:12.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:12.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:12.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:12.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:12.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:12.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:12.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:12.255 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:12.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:12.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:38:12.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:38:12.789 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:38:12.791 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:38:12.793 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:38:12.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:12.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:12.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:12.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:12.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:12.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:12.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:12.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:12.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:38:12.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:12.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:12.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:12.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:12.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:12.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:12.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:12.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:12.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:12.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:12.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:12.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:12.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:12.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:13.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:38:13.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:13.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:13.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:13.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:13.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:38:14.176 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:38:14.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:14.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:14.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:14.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:14.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:38:15.138 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:38:15.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:15.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:15.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:15.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:15.616 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:38:16.094 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:38:16.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:16.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:16.572 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:38:17.049 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:38:17.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:17.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:17.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:17.527 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:38:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:38:18.482 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:38:18.960 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:38:19.438 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:38:19.916 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:38:20.394 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:38:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:38:21.349 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:38:21.828 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:38:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:38:22.784 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:38:23.261 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:38:23.739 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:38:24.217 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:38:24.695 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:38:25.173 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:38:25.650 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:38:26.128 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:38:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:38:27.084 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:38:27.561 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:38:28.039 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:38:28.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:28.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:28.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:28.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:28.337 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3432 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.337 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:28.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:28.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:28.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:28.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:28.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:28.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:28.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:28.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:28.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:28.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:28.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:28.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:28.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:28.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:28.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:28.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:28.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:28.381 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.381 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.382 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:28.382 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:33.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:33.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:33.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:33.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:33.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:33.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:33.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:33.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:33.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:33.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:33.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:33.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:33.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:33.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:33.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:33.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:33.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:33.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:33.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:33.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:33.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:33.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:33.404 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:33.404 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:33.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:33.404 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:33.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:33.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:33.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:33.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:33.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:33.409 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:33.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:38:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:38:33.939 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:38:33.941 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:38:33.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:33.943 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:38:33.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:33.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:33.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:33.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:33.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:33.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:33.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:33.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:33.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:38:33.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:33.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:33.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:33.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:34.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:34.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:38:34.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:34.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:34.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:34.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:34.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:34.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:34.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:34.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:34.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:34.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:34.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:34.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:34.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:34.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:34.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:34.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:34.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:34.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:34.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:34.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:34.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:34.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:34.328 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:34.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:34.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:39.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:39.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:39.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:39.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:39.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:39.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:39.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:39.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:39.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:39.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:39.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:39.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:39.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:39.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:39.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:39.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:39.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:39.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:39.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:39.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:39.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:39.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:39.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:39.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:39.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:39.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:39.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:39.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:39.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:39.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:39.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:39.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:39.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:39.355 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:39.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:39.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:39.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:38:39.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:38:39.892 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:38:39.894 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:38:39.896 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:38:39.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:39.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:39.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:39.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:39.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:39.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:39.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:39.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:39.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:39.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:38:39.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:39.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:39.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:39.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:40.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:38:40.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:40.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:40.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:40.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:40.799 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:38:41.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:38:41.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:41.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:41.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:41.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:41.755 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:38:41.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:41.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:41.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:41.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:38:41.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:38:41.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:38:41.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:38:41.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:38:41.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:38:41.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:38:41.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:38:41.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:38:41.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:41.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:41.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:41.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:42.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:42.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:42.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:42.002 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:42.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.003 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:42.004 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:38:47.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:47.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:47.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:47.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:47.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:47.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:47.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:47.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:47.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:47.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:47.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:47.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:47.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:47.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:47.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:47.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:47.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:47.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:47.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:47.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:47.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:47.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:47.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:47.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:47.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:47.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:47.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:47.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:47.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:47.023 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:47.023 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:47.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:47.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:47.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:47.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:47.026 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:47.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:47.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:47.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:47.027 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:52.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:52.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:52.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:52.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:52.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:52.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:52.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:52.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:52.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:52.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:38:52.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:52.033 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:38:52.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:38:52.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:52.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:38:52.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:52.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:38:52.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:38:52.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:38:52.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:38:52.036 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:38:52.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:38:52.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:52.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:52.036 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:38:57.439 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.204.20:5700'
2026-03-11 02:38:57.439 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.204.20:5802)
2026-03-11 02:38:57.439 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.204.20:5801)
2026-03-11 02:38:57.439 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.204.22:6700'
2026-03-11 02:38:57.439 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.204.22:6802)
2026-03-11 02:38:57.439 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.204.22:6801)
2026-03-11 02:38:57.439 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.204.20:5700/1'
2026-03-11 02:38:57.439 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.204.20:5804)
2026-03-11 02:38:57.439 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.204.20:5803)
2026-03-11 02:38:57.439 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.204.20:5700/2'
2026-03-11 02:38:57.439 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.204.20:5806)
2026-03-11 02:38:57.439 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.204.20:5805)
2026-03-11 02:38:57.439 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.204.20:5700/3'
2026-03-11 02:38:57.439 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.204.20:5808)
2026-03-11 02:38:57.439 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.204.20:5807)
2026-03-11 02:38:57.439 [INFO] fake_trx.py:429 Init complete
2026-03-11 02:38:57.439 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-11 02:38:58.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:38:58.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:38:58.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:38:58.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:38:58.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:38:58.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:10.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:10.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:10.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:10.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:15.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:15.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:15.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:15.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:15.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:15.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:15.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:15.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:15.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:15.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:20.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:20.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:20.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:20.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:20.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:20.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:20.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:20.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:20.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:20.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:25.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:25.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:25.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:25.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:25.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:25.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:25.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:25.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:30.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:30.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:30.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:30.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:30.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:30.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:30.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:30.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:30.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:30.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:35.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:35.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:35.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:35.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:35.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:35.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:35.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:35.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:35.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:35.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:40.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:40.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:40.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:40.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:40.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:40.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:40.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:40.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:40.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:40.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:45.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:45.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:45.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:45.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:45.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:45.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:45.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:45.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:45.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:50.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:50.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:50.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:50.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:50.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:50.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:50.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:50.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:50.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:50.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:55.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:39:55.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:39:55.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:55.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:39:55.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:55.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:55.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:39:55.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:39:55.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:39:55.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:00.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:00.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:00.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:00.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:00.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:00.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 0 -> 1
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 0 -> 1
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 0 -> 1
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:00.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 0 -> 1
2026-03-11 02:40:00.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:00.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:00.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:00.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:00.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:05.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:05.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:05.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:05.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:05.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:05.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:05.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:05.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:05.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:05.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:10.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:10.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:10.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:10.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:10.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:10.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:10.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:10.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:10.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:10.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:40:10.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:10.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:10.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:10.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:15.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:15.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:15.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:15.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:15.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:15.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:15.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:20.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:20.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:20.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:20.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:20.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:20.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:20.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:20.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:20.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:20.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:25.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:25.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:25.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:25.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:25.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:25.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:25.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:25.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:25.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:25.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:30.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:30.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:30.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:30.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:30.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:30.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:30.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:30.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:30.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:30.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:36.808 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.204.20:5700'
2026-03-11 02:40:36.808 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.204.20:5802)
2026-03-11 02:40:36.808 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.204.20:5801)
2026-03-11 02:40:36.808 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.204.22:6700'
2026-03-11 02:40:36.808 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.204.22:6802)
2026-03-11 02:40:36.808 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.204.22:6801)
2026-03-11 02:40:36.808 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.204.20:5700/1'
2026-03-11 02:40:36.808 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.204.20:5804)
2026-03-11 02:40:36.808 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.204.20:5803)
2026-03-11 02:40:36.808 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.204.20:5700/2'
2026-03-11 02:40:36.808 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.204.20:5806)
2026-03-11 02:40:36.808 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.204.20:5805)
2026-03-11 02:40:36.808 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.204.20:5700/3'
2026-03-11 02:40:36.808 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.204.20:5808)
2026-03-11 02:40:36.808 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.204.20:5807)
2026-03-11 02:40:36.808 [INFO] fake_trx.py:429 Init complete
2026-03-11 02:40:36.808 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-03-11 02:40:38.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:38.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:38.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:38.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:38.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:38.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:41.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:41.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:41.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:41.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:41.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 0 -> 1
2026-03-11 02:40:41.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:40:41.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:40:41.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:41.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:41.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:41.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:40:41.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:41.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 0 -> 1
2026-03-11 02:40:41.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:41.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:40:41.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:40:41.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:41.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:41.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:41.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:40:41.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:41.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 0 -> 1
2026-03-11 02:40:41.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:41.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:40:41.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:40:41.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:41.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:41.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:41.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:40:41.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:41.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 0 -> 1
2026-03-11 02:40:41.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:41.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:40:41.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:40:41.445 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:40:41.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:41.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:41.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:40:41.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:40:41.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:41.986 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:40:41.989 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:40:41.990 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:40:42.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:42.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:42.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:42.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:42.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:42.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:42.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:42.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:42.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:42.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:42.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:40:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:42.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:42.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:42.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:42.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:42.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:42.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:42.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:42.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:42.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:42.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:42.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:42.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:42.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:42.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:42.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:42.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:42.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:42.879 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:40:43.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:43.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:43.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:43.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:43.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:43.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:43.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:43.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:43.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:43.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:43.353 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:40:43.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:43.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:43.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:43.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:43.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:43.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:43.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:43.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:43.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:43.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:43.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:43.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:43.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:43.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:43.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:43.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:43.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:40:43.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:43.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:43.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:43.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:43.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:44.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:44.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:44.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:44.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:44.305 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:40:44.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:44.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:44.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:44.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:44.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:44.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:44.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:44.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:44.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:44.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:44.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:44.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:44.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:44.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:44.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:44.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:40:45.257 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:40:45.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:45.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:45.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:45.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:45.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:45.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:45.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:45.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:45.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:45.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:45.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:45.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:45.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:45.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:45.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:45.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:45.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:45.527 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:45.528 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:40:45.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:45.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:45.735 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:40:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:40:46.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:46.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:46.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:46.357 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:46.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:46.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:46.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:46.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:46.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:46.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:46.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:46.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:46.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:46.484 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:40:46.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.691 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:40:46.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:46.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:46.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:46.906 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:46.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:46.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:46.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:46.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:46.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:46.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:46.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:46.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:46.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:47.170 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:40:47.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:47.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:47.648 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:40:47.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:47.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:47.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:47.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:47.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:47.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:47.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:47.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:47.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:47.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:47.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:47.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:48.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:40:48.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:48.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:48.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:48.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:48.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:40:48.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:48.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:48.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:48.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:48.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:48.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:48.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:48.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:48.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:48.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:48.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:49.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:49.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:49.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:40:49.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:49.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:49.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:49.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:49.533 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:40:49.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:49.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:49.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:49.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:49.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:49.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:49.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:49.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:49.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:49.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:49.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:49.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:49.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:50.004 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:40:50.038 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:50.039 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:40:50.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:50.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:50.484 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:40:50.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:50.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:50.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:50.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:50.834 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:50.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:50.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:50.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:50.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:50.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:50.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:50.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:50.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:50.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:50.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:40:51.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:51.000 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:40:51.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:51.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:51.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:51.383 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:51.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:51.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:51.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:51.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:51.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:51.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:51.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:51.442 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:40:51.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:51.506 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:51.506 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:51.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:51.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:51.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:51.602 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:51.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:51.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:51.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:51.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:51.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:51.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:51.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:51.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:51.741 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:51.741 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:51.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:40:52.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:52.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:52.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:52.091 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:52.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:52.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:52.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:52.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:52.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:52.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:52.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:52.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:52.212 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:52.213 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:52.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.385 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:40:52.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:52.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:52.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:52.604 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:52.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:52.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:52.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:52.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:52.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:52.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:52.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:52.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:52.857 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:40:52.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:52.891 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:52.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:52.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.069 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:53.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:53.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:53.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:53.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:53.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:53.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.154 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:53.154 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:53.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.250 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:53.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:53.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:53.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:53.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:53.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:53.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.331 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:40:53.367 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:53.367 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:53.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.747 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:53.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:53.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:53.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:53.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:53.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:53.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:53.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:53.807 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:40:53.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:53.871 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:53.871 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:53.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:53.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:54.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:54.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:54.239 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:54.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:54.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:54.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:40:54.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:40:54.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:40:54.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:40:54.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:40:54.281 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:40:54.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:54.342 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:40:54.342 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:40:54.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:40:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:40:54.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:40:54.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:40:54.730 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:40:54.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:54.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:54.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:54.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:54.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:54.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:54.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:54.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:54.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:54.739 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:40:54.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:59.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:40:59.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:40:59.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:59.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:59.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:59.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:59.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:40:59.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:59.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:59.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:40:59.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:40:59.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:40:59.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:40:59.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:59.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:59.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:40:59.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:40:59.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:40:59.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:40:59.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:40:59.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:40:59.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:40:59.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:59.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:59.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:40:59.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:40:59.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:40:59.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:40:59.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:40:59.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:40:59.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:40:59.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:59.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:40:59.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:40:59.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:40:59.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:40:59.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:40:59.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:40:59.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:40:59.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:40:59.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:40:59.774 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:40:59.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:40:59.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:41:00.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:41:00.297 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:41:00.297 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:41:00.299 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:41:00.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:00.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:00.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:00.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:00.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:00.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:41:00.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:00.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:00.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:00.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:00.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:00.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:00.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:00.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:01.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-03-11 02:41:01.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:41:01.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:01.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:01.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:01.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:01.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:01.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:01.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:01.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:01.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:01.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:01.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
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2026-03-11 02:41:02.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-03-11 02:41:02.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.619 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:41:02.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:02.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:02.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:02.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:02.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:02.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:02.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:02.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:02.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:02.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:02.661 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:41:02.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=622 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.661 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.662 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.662 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:02.662 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=623 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:07.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:07.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:07.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:07.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:07.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:07.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:07.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:07.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:41:07.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:41:07.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:41:07.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:07.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:07.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:07.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:41:07.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:07.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:41:07.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:07.686 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:41:07.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:41:07.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:07.686 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:07.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:07.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:41:07.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:07.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:41:07.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:07.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:07.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:41:07.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:41:07.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:41:07.693 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:41:07.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:41:08.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:41:08.217 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:41:08.219 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:41:08.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:08.220 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:41:08.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:08.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:08.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:08.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:08.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:08.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:08.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:08.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:08.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:08.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:08.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:08.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:08.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:08.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:08.273 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:41:08.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.275 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.275 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.275 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.275 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:08.275 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:13.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:13.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:13.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:13.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:13.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:13.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:13.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:13.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:13.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:13.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:41:13.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:41:13.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:41:13.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:13.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:13.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:13.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:41:13.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:13.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:41:13.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:13.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:41:13.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:13.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:41:13.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:13.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:41:13.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:13.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:41:13.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:41:13.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:41:13.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:41:13.297 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:41:13.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:13.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:13.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:41:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:41:13.821 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:41:13.823 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:41:13.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:13.825 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:41:13.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:13.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:13.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:13.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:13.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:13.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:13.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:13.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:13.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:13.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:13.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:13.865 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.866 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.867 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:13.867 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:41:18.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:18.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:18.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:18.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:18.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:18.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:18.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:18.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:18.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:18.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:18.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:41:18.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:41:18.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:41:18.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:18.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:18.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:18.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:41:18.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:18.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:41:18.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:18.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:41:18.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:41:18.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:18.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:18.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:18.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:41:18.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:18.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:41:18.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:18.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:18.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:41:18.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:41:18.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:41:18.888 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:41:18.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:18.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:41:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:41:19.415 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:41:19.417 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:41:19.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:19.419 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:41:19.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:19.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:19.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:19.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:19.549 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:41:19.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:24.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:41:24.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:41:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:24.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:24.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:24.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:24.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:41:24.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:24.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:24.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:41:24.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:41:24.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:41:24.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:41:24.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:24.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:24.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:41:24.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:41:24.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:41:24.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:41:24.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:24.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:41:24.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:41:24.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:24.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:41:24.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:41:24.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:24.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:41:24.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:41:24.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:41:24.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:41:24.579 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:41:24.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:41:24.580 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:41:24.580 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:41:24.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:41:24.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:24.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:41:25.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:41:25.101 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:41:25.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:25.103 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:41:25.105 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:41:25.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:25.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:25.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:25.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:25.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:25.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:25.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:25.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:25.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:25.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:25.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:25.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:25.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:25.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:25.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:41:25.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:25.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:25.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:25.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:26.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:41:26.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:41:26.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:26.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:26.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:26.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:26.963 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:41:27.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:41:27.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:27.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:27.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:27.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:41:28.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:41:28.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:28.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:28.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:28.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:41:29.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:29.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:29.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:29.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:29.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:29.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:29.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:29.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:29.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:29.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:29.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:29.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:29.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:29.348 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:41:29.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:29.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:29.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:29.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:29.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:29.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:41:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:41:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:41:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:41:29.826 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:41:30.304 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:41:30.782 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:41:31.260 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:41:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:41:32.215 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:41:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:41:33.170 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:41:33.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:33.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:33.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:33.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:33.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:33.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:33.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:33.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:33.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:33.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:33.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:33.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:33.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:33.647 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:41:33.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:33.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:33.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:33.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:34.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:34.126 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:41:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:41:35.081 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:41:35.559 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:41:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:41:36.513 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:41:36.990 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:41:37.468 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:41:37.946 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:41:38.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:38.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:38.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:38.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:38.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:38.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:38.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:38.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:38.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:38.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:38.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:38.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:38.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:38.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:38.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:38.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:38.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:38.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:38.421 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:41:38.898 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:41:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:41:39.853 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:41:40.331 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:41:40.809 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:41:41.286 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:41:41.764 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:41:42.242 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:41:42.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:42.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:42.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:42.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:42.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:42.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:42.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:42.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:42.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:42.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:42.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:42.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:42.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:42.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:42.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:42.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:42.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:41:43.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:41:43.675 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:41:44.153 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:41:44.631 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:41:45.108 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:41:45.586 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:41:46.064 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:41:46.542 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:41:47.019 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:41:47.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:47.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:47.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:47.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:47.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:47.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:47.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:47.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:47.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:47.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:47.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:47.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:47.121 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:41:47.121 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:41:47.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:47.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:47.497 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:41:47.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:47.975 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:41:48.453 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:41:48.931 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:41:49.410 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:41:49.888 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:41:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:41:50.845 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:41:51.323 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:41:51.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:51.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:51.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:51.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:51.516 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:41:51.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:51.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:51.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:51.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:51.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:51.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:51.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:51.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:51.566 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:41:51.566 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:41:51.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:51.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:51.796 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:41:51.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:52.266 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:41:52.742 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:41:53.220 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:41:53.698 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:41:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:41:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:41:55.132 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:41:55.611 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:41:55.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:55.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:55.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:55.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:55.957 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:41:55.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:41:55.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:41:55.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:41:55.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:55.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:55.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:55.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:41:55.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:41:55.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:41:55.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:55.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:41:55.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:41:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:41:56.088 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:41:56.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:41:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:41:57.043 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:41:57.522 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:41:57.999 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:41:58.478 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:41:58.956 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:41:59.433 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:41:59.912 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:42:00.390 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:42:00.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:00.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:00.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:00.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:00.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:00.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:00.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:00.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:00.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:00.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:00.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:00.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:00.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:00.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:00.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:00.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:00.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:00.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:00.867 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:42:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:42:01.823 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:42:02.301 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:42:02.779 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:42:03.258 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:42:03.736 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:42:04.214 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:42:04.693 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:42:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:04.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:04.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:04.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:04.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:04.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:04.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:04.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:04.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:04.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:04.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:04.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:04.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:42:04.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:04.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:04.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:04.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:04.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:05.171 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:42:05.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:05.648 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:42:06.125 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:42:06.603 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:42:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:42:07.558 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:42:08.037 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:42:08.514 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:42:08.992 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:42:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:42:09.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:09.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:09.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:09.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:09.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:09.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:09.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:09.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:09.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:09.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:09.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:09.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:09.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:09.714 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:09.714 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:42:09.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:09.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:09.941 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:42:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:42:10.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:10.885 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:42:11.354 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:42:11.824 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:42:12.295 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:42:12.765 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:42:13.240 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:42:13.718 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:42:14.196 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:42:14.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:14.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:14.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:14.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:14.514 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:14.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:14.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:14.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:14.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:14.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:14.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:14.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:14.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:14.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:14.580 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:14.580 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:42:14.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:14.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:14.673 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:42:15.151 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:42:15.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:15.629 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:42:16.107 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:42:16.586 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:42:17.064 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:42:17.536 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:42:18.007 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:42:18.479 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:42:18.950 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:42:19.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:19.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:19.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:19.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:19.406 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:19.406 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=11729 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:19.406 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=11729 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:19.407 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=11729 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:19.420 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:42:19.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:19.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:19.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:19.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:19.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:19.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:19.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:19.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:19.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:19.474 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:19.474 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:19.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:19.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:19.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:42:20.363 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:42:20.836 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:42:21.308 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:42:21.787 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:42:22.265 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:42:22.743 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:42:23.221 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:42:23.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:23.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:23.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:23.580 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:23.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:23.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:23.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:23.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:23.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:23.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:23.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:23.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:23.593 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:23.593 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:23.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:23.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:23.693 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:42:23.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:24.170 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:42:24.648 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:42:25.126 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:42:25.604 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:42:26.083 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:42:26.561 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:42:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:42:27.517 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:42:27.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:27.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:27.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:27.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:27.872 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:27.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:27.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:27.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:27.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:27.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:27.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:27.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:27.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:27.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:27.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:27.948 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:27.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:27.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:27.995 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 02:42:28.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:28.473 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 02:42:28.951 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 02:42:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 02:42:29.908 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 02:42:30.386 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 02:42:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 02:42:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 02:42:31.821 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 02:42:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:32.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:32.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:32.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:32.193 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:32.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:32.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:32.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:32.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:32.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:32.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:32.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:32.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:32.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:32.250 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:32.250 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:32.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:32.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 02:42:32.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:32.776 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 02:42:33.254 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 02:42:33.732 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 02:42:34.210 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 02:42:34.688 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 02:42:35.165 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 02:42:35.643 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 02:42:36.121 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 02:42:36.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:36.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:36.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:36.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:36.526 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:36.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:36.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:36.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:36.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:36.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:36.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:36.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:36.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:36.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:36.540 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:36.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:36.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:36.598 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 02:42:36.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:37.075 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 02:42:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 02:42:38.032 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 02:42:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 02:42:38.986 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 02:42:39.465 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 02:42:39.942 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 02:42:40.421 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 02:42:40.899 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 02:42:40.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:40.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:40.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:40.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:40.995 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:41.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:41.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:41.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:41.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:41.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:41.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:41.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:41.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:41.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:41.044 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:41.044 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:41.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:41.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:41.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:41.374 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 02:42:41.852 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 02:42:42.331 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 02:42:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 02:42:43.287 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 02:42:43.766 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 02:42:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 02:42:44.721 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 02:42:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 02:42:45.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:45.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:45.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:45.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:45.313 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:45.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:45.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:45.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:45.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:45.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:45.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:45.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:45.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:45.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:45.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:45.339 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:45.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:45.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 02:42:46.153 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 02:42:46.631 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 02:42:47.109 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 02:42:47.588 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 02:42:48.066 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 02:42:48.544 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 02:42:49.022 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 02:42:49.500 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 02:42:49.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:49.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:49.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:49.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:49.632 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:49.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:49.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:49.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:42:49.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:49.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:42:49.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:42:49.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:42:49.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:42:49.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:49.695 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:42:49.695 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:42:49.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:49.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:49.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:49.978 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 02:42:50.456 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 02:42:50.934 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 02:42:51.413 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 02:42:51.890 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 02:42:52.368 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 02:42:52.847 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 02:42:53.325 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 02:42:53.798 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-11 02:42:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:42:53.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:42:53.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:42:53.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:42:53.952 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:42:53.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:42:53.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:42:53.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:42:53.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:42:53.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:42:53.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:42:53.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:42:53.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:42:53.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:42:53.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:42:53.959 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:42:53.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19111 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:53.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19111 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:53.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19111 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:42:58.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:42:58.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:42:58.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:42:58.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:42:58.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:42:58.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:42:58.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:42:58.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:42:58.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:42:58.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:42:58.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:42:58.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:42:58.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:42:58.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:42:58.981 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:42:58.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:42:58.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:42:58.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:42:58.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:42:58.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:42:58.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:42:58.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:42:58.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:42:58.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:42:58.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:42:58.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:42:58.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:42:58.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:42:58.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:42:58.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:42:58.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:42:58.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:42:58.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:42:58.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:42:58.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:42:58.990 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:42:58.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:42:58.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:42:58.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:42:58.991 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:42:58.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:03.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:43:03.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:43:03.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:03.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:03.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:03.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:04.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:04.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:04.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:04.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:04.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:43:04.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:43:04.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:43:04.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:04.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:04.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:04.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:43:04.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:04.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:43:04.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:04.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:43:04.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:43:04.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:04.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:04.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:04.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:43:04.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:04.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:43:04.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:04.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:43:04.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:43:04.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:04.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:04.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:04.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:43:04.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:04.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:43:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:43:04.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:43:04.021 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:43:04.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:04.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:43:04.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:43:04.553 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:43:04.555 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:43:04.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:04.557 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:43:04.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:04.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:04.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:04.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:04.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:04.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:04.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:04.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:04.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:04.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:04.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:04.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:04.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:04.715 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=148 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:04.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:04.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:04.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:04.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:04.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:04.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:04.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:04.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:04.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:04.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:04.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:04.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:43:05.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:05.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:05.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:05.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:05.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:05.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:05.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:05.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:05.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:43:05.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:05.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:05.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:05.940 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:43:05.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:05.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:05.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:05.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:05.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:05.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:05.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:06.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:06.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:06.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:06.417 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:43:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:06.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:06.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:06.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:06.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:06.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:06.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:06.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:06.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:06.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:06.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:06.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:06.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:06.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:06.522 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:43:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:06.895 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:43:07.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:07.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:07.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:07.004 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:07.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:07.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:07.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:07.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:07.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:07.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:07.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:07.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:07.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:07.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:07.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:07.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:07.033 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:07.033 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:43:07.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:43:07.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:07.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:07.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:07.552 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:07.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:07.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:07.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:07.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:07.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:07.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:07.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:07.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:07.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:07.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:07.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:07.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:07.850 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:43:08.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:08.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:08.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:08.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:08.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:08.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:08.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:08.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:08.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:08.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:08.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:08.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:08.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:08.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:08.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:08.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:08.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:08.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.327 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:43:08.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:08.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:08.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:08.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:08.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:08.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:08.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:08.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:08.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:08.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:08.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:08.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:08.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:08.804 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:43:09.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:09.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:09.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:09.282 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:43:09.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:09.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:09.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:09.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:09.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:09.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:09.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:09.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:09.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:09.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:09.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:09.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:09.625 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:09.626 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:43:09.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:09.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:09.759 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:43:10.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.045 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:10.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:10.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:10.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:10.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:10.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:10.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.111 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:10.111 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:43:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:43:10.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.592 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:10.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:10.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:10.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:10.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:10.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:10.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.665 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:10.665 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:10.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.715 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:43:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.875 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:10.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:10.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:10.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:10.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:10.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:10.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:10.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:10.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:10.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:10.938 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:10.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:10.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.192 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:43:11.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:11.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:11.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:11.371 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:11.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:11.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:11.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:11.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:11.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:11.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:11.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:11.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:11.435 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:11.435 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:11.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.669 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:43:11.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:11.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:11.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:11.866 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:11.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:11.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:11.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:11.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:11.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:11.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:11.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:11.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:11.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:11.940 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:11.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:11.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.146 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:43:12.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:12.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:12.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:12.360 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:12.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:12.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:12.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:12.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:12.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:12.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:12.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:12.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:12.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:12.422 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:12.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:12.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:12.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:12.541 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:12.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:12.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:12.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:12.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:12.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:12.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:12.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:12.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:12.606 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:12.606 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:12.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:12.623 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:43:13.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:13.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:13.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:13.037 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:13.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:13.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:13.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:13.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:13.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:13.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:13.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:13.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:13.096 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:13.097 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:13.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.100 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:43:13.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:13.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:13.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:13.532 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:13.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:13.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:13.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:13.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:13.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:13.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:13.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:13.576 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:43:13.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:13.594 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:13.594 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:13.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:13.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:14.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:14.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:14.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:14.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:14.031 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:14.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:14.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:14.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:14.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:14.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:14.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:14.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:14.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:14.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:43:14.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:43:14.042 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:43:19.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:43:19.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:43:19.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:19.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:19.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:19.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:19.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:19.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:19.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:19.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:19.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:43:19.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:43:19.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:43:19.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:19.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:19.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:19.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:43:19.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:19.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:43:19.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:19.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:19.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:19.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:43:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:19.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:43:19.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:43:19.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:19.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:19.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:19.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:43:19.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:19.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:43:19.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:43:19.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:43:19.073 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:43:19.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:43:19.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:19.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:19.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:19.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:43:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:43:19.600 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:43:19.600 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:43:19.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:19.602 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:43:19.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:19.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:19.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:19.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:19.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:19.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:19.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:19.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:19.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:19.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:19.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:19.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:19.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:20.037 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:43:20.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:20.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:20.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:20.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:20.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:20.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:20.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:43:20.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:20.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:20.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:20.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:20.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:20.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:20.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:20.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:20.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:20.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:20.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:20.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:20.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:20.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:20.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:20.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:20.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:20.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:43:21.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:21.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:21.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:21.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:21.467 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:43:21.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:21.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:21.944 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:43:22.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:22.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:22.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:22.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:22.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:22.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:22.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:22.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:22.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:22.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:22.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:22.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:22.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:22.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:22.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:22.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:22.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:22.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:22.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:22.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:22.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:22.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:43:22.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:22.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:43:23.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:23.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:23.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:23.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:23.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:23.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:23.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:23.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:23.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:23.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:23.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:23.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:23.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:23.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:23.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:43:23.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:23.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:23.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:23.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:23.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:23.852 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:43:24.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:24.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:24.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:24.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:24.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:24.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:24.329 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:43:24.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:24.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:24.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:24.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:24.788 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1223 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:24.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:24.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:24.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:24.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:24.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:24.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:24.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:24.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:24.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:43:24.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:24.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:24.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:24.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:24.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:43:25.762 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:43:25.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:25.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:26.240 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:43:26.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:26.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:26.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:26.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:26.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:26.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:26.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:26.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:26.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:26.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:26.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:26.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:26.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:26.438 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:43:26.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:26.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:26.718 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:43:27.195 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:43:27.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:27.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:27.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:43:27.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:27.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:27.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:27.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:27.894 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:27.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:27.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:27.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:27.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:27.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:27.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:27.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:27.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:27.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:27.963 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:43:27.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:27.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:28.150 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:43:28.624 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:43:28.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:28.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:29.094 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:43:29.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:29.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:29.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:29.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:29.398 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:29.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:29.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:29.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:29.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:29.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:29.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:29.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:29.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:29.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:29.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:29.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:29.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:29.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:29.578 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:43:30.056 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:43:30.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:30.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:30.534 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:43:30.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:30.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:30.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:30.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:30.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:30.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:30.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:30.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:30.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:30.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:30.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:30.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:31.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:31.011 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:43:31.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:31.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:31.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:31.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:31.487 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:43:31.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:31.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:31.965 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:43:32.443 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:43:32.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:32.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:32.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:32.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:32.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:32.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:32.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:32.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:32.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:32.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:32.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:32.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:32.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:32.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:32.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:32.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:32.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:32.921 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:43:33.398 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:43:33.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:33.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:33.875 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:43:34.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:34.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:34.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:34.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:34.335 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3263 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:34.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:34.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:34.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:34.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:34.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:34.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:34.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:34.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:34.353 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:43:34.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:34.406 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:34.407 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:43:34.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:34.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:34.822 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:43:35.291 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:43:35.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:43:35.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:35.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:35.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:35.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:35.777 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:35.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:35.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:35.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:35.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:35.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:35.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:35.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:35.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:35.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:35.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:35.843 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:43:35.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:35.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:43:36.710 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:43:36.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:36.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:37.189 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:43:37.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:37.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:37.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:37.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:37.292 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:37.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:37.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:37.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:37.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:37.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:37.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:37.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:37.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:37.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:37.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:37.363 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:37.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:37.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:37.660 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:43:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:43:38.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:38.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:38.603 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:43:38.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:38.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:38.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:38.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:38.761 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:38.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:38.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:38.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:38.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:38.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:38.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:38.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:38.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:38.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:38.839 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:38.839 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:38.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:38.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:39.075 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:43:39.547 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:43:39.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:39.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:40.026 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:43:40.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:40.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:40.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:40.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:40.203 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:40.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:40.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:40.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:40.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:40.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:40.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:40.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:40.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:40.273 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:40.273 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:40.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:40.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:40.503 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:43:40.981 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:43:41.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:41.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:41.459 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:43:41.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:41.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:41.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:41.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:41.655 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:41.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:41.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:41.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:41.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:41.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:41.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:41.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:41.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:41.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:41.723 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:41.723 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:41.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:41.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:41.936 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:43:42.414 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:43:42.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:42.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:42.893 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:43:43.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:43.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:43.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:43.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:43.107 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:43.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:43.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:43.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:43.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:43.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:43.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:43.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:43.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:43.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:43.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:43.182 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:43.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:43.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:43.366 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:43:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:43.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:43.843 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:43:44.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:44.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:44.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:44.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:44.238 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:44.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:44.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:44.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:44.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:44.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:44.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:44.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:44.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:44.297 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:44.298 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:44.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:44.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:44.320 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:43:44.797 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:43:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:45.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:45.275 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:43:45.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:45.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:45.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:45.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:45.690 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:45.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:45.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:45.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:45.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:45.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:45.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:45.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:45.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:45.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:45.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:45.748 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:45.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:45.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:45.752 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:43:46.227 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:43:46.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:46.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:46.705 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:43:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:47.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:47.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:47.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:47.137 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:47.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:47.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:47.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:47.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:47.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:47.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:47.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:47.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:47.183 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:43:47.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:47.205 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:43:47.206 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:43:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:47.657 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:43:48.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:48.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:48.135 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:43:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:48.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:48.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:48.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:48.586 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:43:48.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:48.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:48.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:48.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:48.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:48.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:48.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:48.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:48.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:43:48.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:43:48.599 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:48.599 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:43:53.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:43:53.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:43:53.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:53.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:53.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:53.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:53.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:43:53.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:53.606 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:53.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:43:53.606 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:53.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:43:53.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:43:53.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:53.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:53.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:43:53.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:43:53.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:53.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:43:53.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:43:53.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:53.611 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:43:53.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:43:53.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:43:53.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:43:53.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:43:53.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:43:53.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:43:53.614 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:43:53.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:43:53.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:43:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:43:53.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:43:54.101 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:43:54.138 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:43:54.139 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:43:54.139 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:43:54.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:54.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:54.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:54.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:54.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:54.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:54.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:54.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:54.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:54.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:54.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:54.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:54.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:54.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:54.578 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:43:54.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:54.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:54.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:54.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:55.056 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:43:55.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:43:55.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:55.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:55.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:55.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:56.012 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:43:56.489 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:43:56.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:56.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:56.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:56.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:56.967 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:43:57.445 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:43:57.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:57.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:57.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:57.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:57.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:43:58.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:58.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:58.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:58.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:58.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:43:58.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:43:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:43:58.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:58.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:58.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:58.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:43:58.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:43:58.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:43:58.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:43:58.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:43:58.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:58.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:43:58.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:43:58.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:43:58.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:43:58.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:43:58.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:43:58.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:43:59.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:43:59.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:44:00.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:44:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:44:01.266 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:44:01.744 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:44:02.222 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:44:02.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:02.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:02.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:02.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:02.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:02.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:02.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:02.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:02.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:02.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:02.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:02.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:02.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:02.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:02.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:02.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:02.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:02.699 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:44:03.177 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:44:03.654 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:44:04.132 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:44:04.609 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:44:05.087 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:44:05.564 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:44:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:44:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:06.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:06.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:06.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:06.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:06.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:06.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:06.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:06.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:06.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:06.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:06.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:44:06.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:06.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:06.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:06.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:06.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:06.997 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:44:07.474 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:44:07.952 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:44:08.429 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:44:08.907 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:44:09.385 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:44:09.862 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:44:10.340 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:44:10.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:10.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:10.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:10.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:10.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:10.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:10.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:10.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:10.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:10.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:10.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:10.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:10.817 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:44:10.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:10.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:10.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:10.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:10.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:11.294 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:44:11.772 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:44:12.250 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:44:12.727 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:44:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:44:13.684 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:44:14.161 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:44:14.639 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:44:15.117 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:44:15.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:15.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:15.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:15.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:15.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:15.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:15.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:15.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:15.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:15.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:15.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:15.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:15.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:15.595 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:44:15.598 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:15.598 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:44:15.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:15.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:16.073 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:44:16.552 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:44:17.030 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:44:17.509 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:44:17.987 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:44:18.465 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:44:18.944 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:44:19.422 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:44:19.897 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:44:19.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:19.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:19.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:19.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:19.973 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:19.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:19.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:19.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:19.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:19.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:19.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:19.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:19.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:20.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:20.042 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:20.042 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:44:20.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:20.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:20.372 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:44:20.850 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:44:21.328 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:44:21.807 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:44:22.285 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:44:22.764 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:44:23.242 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:44:23.714 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:44:24.184 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:44:24.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:24.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:24.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:24.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:24.407 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:24.407 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=6578 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:44:24.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:24.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:24.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:24.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:24.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:24.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:24.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:24.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:24.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:44:24.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:24.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:24.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:24.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:24.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:24.657 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:44:25.135 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:44:25.612 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:44:26.091 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:44:26.569 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:44:27.047 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:44:27.525 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:44:28.004 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:44:28.481 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:44:28.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:28.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:28.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:28.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:28.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:28.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:28.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:28.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:28.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:28.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:28.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:28.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:28.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:28.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:28.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:28.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:28.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:28.959 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:44:29.438 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:44:29.916 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:44:30.390 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:44:30.866 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:44:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:44:31.816 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:44:32.295 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:44:32.773 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:44:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:44:33.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:33.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:33.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:33.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:33.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:33.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:33.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:33.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:33.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:33.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:33.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:33.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:33.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:44:33.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:33.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:33.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:33.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:33.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:33.729 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:44:34.207 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:44:34.684 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:44:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:44:35.639 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:44:36.118 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:44:36.596 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:44:37.073 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:44:37.551 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:44:37.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:37.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:37.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:37.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:37.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:37.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:37.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:37.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:37.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:37.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:37.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:37.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:37.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:37.686 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:37.687 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:44:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:38.029 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:44:38.506 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:44:38.984 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:44:39.463 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:44:39.941 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:44:40.419 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:44:40.900 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:44:41.379 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:44:41.848 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:44:41.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:41.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:41.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:41.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:41.992 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:42.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:42.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:42.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:42.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:42.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:42.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:42.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:42.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:42.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:42.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:42.062 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:44:42.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:42.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:42.317 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:44:42.788 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:44:43.261 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:44:43.730 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:44:44.200 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:44:44.671 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:44:45.143 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:44:45.621 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:44:46.101 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:44:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:46.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:46.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:46.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:46.390 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:46.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:46.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:46.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:46.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:46.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:46.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:46.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:46.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:46.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:46.458 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:46.458 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:44:46.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:46.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:46.575 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:44:47.049 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:44:47.527 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:44:48.004 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:44:48.482 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:44:48.953 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:44:49.431 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:44:49.904 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:44:50.375 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:44:50.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:50.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:50.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:50.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:50.533 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:50.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:50.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:50.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:50.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:50.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:50.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:50.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:50.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:50.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:50.598 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:50.598 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:44:50.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:50.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:50.846 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:44:51.316 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:44:51.787 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:44:52.259 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:44:52.728 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:44:53.199 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:44:53.677 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:44:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:44:54.633 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:44:54.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:54.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:54.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:54.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:54.811 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:54.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:54.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:54.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:54.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:54.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:54.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:54.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:54.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:54.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:54.904 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:44:54.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:54.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:55.110 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:44:55.588 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:44:56.066 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:44:56.544 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:44:57.021 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 02:44:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 02:44:57.975 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 02:44:58.453 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 02:44:58.928 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 02:44:59.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:59.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:59.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:59.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:59.121 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:44:59.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:44:59.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:44:59.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:44:59.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:59.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:44:59.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:44:59.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:44:59.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:44:59.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:44:59.186 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:44:59.186 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:44:59.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:59.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:44:59.402 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 02:44:59.881 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 02:45:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 02:45:00.838 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 02:45:01.316 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 02:45:01.794 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 02:45:02.267 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 02:45:02.740 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 02:45:03.217 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 02:45:03.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:03.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:03.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:03.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:03.432 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:03.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:03.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:03.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:03.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:03.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:03.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:03.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:03.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:03.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:03.506 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:03.506 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:45:03.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:03.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:03.690 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 02:45:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 02:45:04.635 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 02:45:05.110 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 02:45:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 02:45:06.066 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 02:45:06.543 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 02:45:07.020 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 02:45:07.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:07.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:07.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:07.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:07.415 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:07.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:07.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:07.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:07.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:07.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:07.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:07.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:07.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:07.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:07.494 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:07.494 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:45:07.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:07.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:07.497 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 02:45:07.973 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 02:45:08.447 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 02:45:08.923 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 02:45:09.400 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 02:45:09.878 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 02:45:10.352 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 02:45:10.826 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 02:45:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 02:45:11.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:11.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:11.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:11.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:11.715 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:11.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:11.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:11.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:11.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:11.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:11.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:11.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:11.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:11.778 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 02:45:11.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:11.786 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:11.787 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:45:11.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:11.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 02:45:12.720 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 02:45:13.197 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 02:45:13.676 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 02:45:14.154 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 02:45:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 02:45:15.109 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 02:45:15.587 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 02:45:16.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:16.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:16.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:16.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:16.020 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:16.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:16.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:16.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:16.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:16.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:16.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:16.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:16.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:16.064 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 02:45:16.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:16.095 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:16.095 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:45:16.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:16.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:16.539 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 02:45:17.017 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 02:45:17.496 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 02:45:17.974 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 02:45:18.452 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 02:45:18.930 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 02:45:19.408 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 02:45:19.886 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 02:45:20.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:20.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:20.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:20.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:20.337 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:20.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:20.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:20.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:20.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:20.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:20.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:45:20.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:45:20.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:45:20.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:45:20.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:45:20.351 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:20.351 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:45:25.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:45:25.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:45:25.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:45:25.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:45:25.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:45:25.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:25.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:25.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:45:25.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:25.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:45:25.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:45:25.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:45:25.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:45:25.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:45:25.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:25.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:45:25.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:45:25.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:45:25.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:45:25.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:45:25.359 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:45:25.359 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:45:25.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:45:25.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:45:25.360 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:45:25.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:45:25.361 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:25.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:45:30.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:45:30.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:45:30.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:45:30.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:45:30.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:30.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:45:30.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:45:30.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:30.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:45:30.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:45:30.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:45:30.383 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:45:30.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:45:30.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:30.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:45:30.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:45:30.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:45:30.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:45:30.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:45:30.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:45:30.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:45:30.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:30.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:45:30.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:45:30.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:45:30.387 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:45:30.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:45:30.387 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:45:30.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:45:30.387 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:45:30.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:45:30.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:45:30.389 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:45:30.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:45:30.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:45:30.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:45:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:45:30.910 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:45:30.912 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:45:30.914 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:45:30.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:30.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:30.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:30.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:30.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:30.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:30.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:30.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:30.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:30.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:30.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:30.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:30.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:30.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:31.355 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:45:31.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:31.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:31.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:31.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:31.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:45:32.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:45:32.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:32.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:32.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:32.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:32.788 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:45:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:45:33.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:33.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:33.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:33.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:33.741 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:45:34.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:45:34.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:34.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:34.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:45:35.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:35.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:35.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:35.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:35.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:35.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:35.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:35.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:35.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:35.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:35.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:35.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:35.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:35.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:35.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:35.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:35.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:45:35.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:45:35.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:45:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:45:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:45:35.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:45:36.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:45:36.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:45:37.084 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:45:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:45:38.040 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:45:38.517 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:45:38.994 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:45:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:39.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:39.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:39.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:39.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:39.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:39.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:39.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:39.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:39.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:39.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:39.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:39.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:39.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:39.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:39.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:39.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:39.471 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:45:39.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:45:40.427 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:45:40.904 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:45:41.382 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:45:41.859 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:45:42.336 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:45:42.814 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:45:43.292 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:45:43.769 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:45:43.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:43.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:43.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:43.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:43.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:43.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:43.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:43.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:43.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:43.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:43.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:43.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:43.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:43.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:43.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:43.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:43.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:44.243 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:45:44.720 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:45:45.198 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:45:45.676 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:45:46.154 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:45:46.632 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:45:47.109 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:45:47.587 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:45:48.065 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:45:48.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:48.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:48.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:48.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:48.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:48.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:48.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:48.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:48.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:48.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:48.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:48.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:48.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:48.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:48.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:48.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:48.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:48.540 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:45:49.018 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:45:49.495 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:45:49.974 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:45:50.452 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:45:50.929 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:45:51.407 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:45:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:45:52.362 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:45:52.840 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:45:52.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:52.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:52.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:52.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:52.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:52.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:52.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:52.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:52.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:52.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:52.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:52.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:52.931 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:52.931 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:45:52.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:52.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:53.313 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:45:53.788 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:45:54.266 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:45:54.744 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:45:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:45:55.699 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:45:56.177 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:45:56.655 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:45:57.134 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:45:57.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:57.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:57.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:57.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:57.301 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:45:57.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:45:57.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:45:57.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:45:57.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:57.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:45:57.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:45:57.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:45:57.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:45:57.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:45:57.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:45:57.377 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:45:57.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:57.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:45:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:45:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:45:58.569 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:45:59.048 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:45:59.525 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:46:00.003 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:46:00.482 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:46:00.961 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:46:01.440 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:46:01.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:01.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:01.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:01.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:01.747 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:01.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:01.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:01.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:01.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:01.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:01.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:01.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:01.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:01.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:46:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:01.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:01.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:01.917 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:46:02.395 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:46:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:46:03.351 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:46:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:46:04.306 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:46:04.784 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:46:05.261 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:46:05.736 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:46:06.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:06.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:06.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:06.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:06.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:06.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:06.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:06.214 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:46:06.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:06.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:06.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:06.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:06.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:06.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:06.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:06.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:06.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:06.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:06.688 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:46:07.166 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:46:07.644 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:46:08.121 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:46:08.599 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:46:09.076 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:46:09.554 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:46:10.031 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:46:10.509 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:46:10.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:10.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:10.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:10.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:10.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:10.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:10.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:10.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:10.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:10.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:10.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:10.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:10.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:46:10.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:10.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:10.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:10.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:10.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:10.986 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:46:11.464 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:46:11.941 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:46:12.418 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:46:12.896 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:46:13.373 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:46:13.843 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:46:14.313 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:46:14.787 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:46:15.257 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:46:15.729 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:46:15.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:15.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:15.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:15.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:15.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:15.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:15.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:15.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:15.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:15.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:15.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:15.996 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:15.996 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:46:15.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:15.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:16.204 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:46:16.681 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:46:17.150 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:46:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:46:18.087 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:46:18.556 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:46:19.024 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:46:19.498 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:46:19.967 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:46:20.444 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:46:20.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:20.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:20.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:20.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:20.746 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:20.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:20.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:20.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:20.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:20.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:20.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:20.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:20.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:20.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:20.817 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:20.817 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:46:20.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:20.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:20.918 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:46:21.387 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:46:21.859 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:46:22.328 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:46:22.796 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:46:23.265 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:46:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:46:24.206 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:46:24.675 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:46:25.143 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:46:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:25.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:25.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:25.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:25.602 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:25.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:25.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:25.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:25.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:25.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:25.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:25.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:25.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:25.613 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:46:25.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:25.658 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:25.658 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:25.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:25.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:26.083 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:46:26.551 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:46:27.019 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:46:27.488 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:46:27.958 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:46:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:46:28.900 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:46:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:46:29.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:29.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:29.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:29.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:29.711 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:29.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:29.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:29.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:29.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:29.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:29.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:29.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:29.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:29.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:29.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:29.772 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:29.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:29.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:29.848 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:46:30.318 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:46:30.792 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:46:31.264 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:46:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:46:32.206 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:46:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:46:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:46:33.623 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 02:46:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:33.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:33.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:33.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:33.972 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:33.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:33.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:33.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:33.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:33.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:33.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:33.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:33.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:34.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:34.046 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:34.046 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:34.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:34.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:34.095 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 02:46:34.569 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 02:46:35.044 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 02:46:35.516 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 02:46:35.989 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 02:46:36.458 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 02:46:36.927 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 02:46:37.396 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 02:46:37.868 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 02:46:38.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:38.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:38.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:38.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:38.240 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:38.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:38.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:38.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:38.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:38.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:38.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:38.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:38.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:38.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:38.305 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:38.305 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:38.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:38.337 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 02:46:38.813 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 02:46:39.288 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 02:46:39.763 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 02:46:40.235 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 02:46:40.714 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 02:46:41.193 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 02:46:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 02:46:42.150 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 02:46:42.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:42.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:42.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:42.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:42.499 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:42.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:42.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:42.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:42.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:42.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:42.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:42.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:42.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:42.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:42.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:42.579 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:42.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:42.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:42.625 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 02:46:43.103 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 02:46:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 02:46:44.058 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 02:46:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 02:46:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 02:46:45.491 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 02:46:45.969 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 02:46:46.442 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 02:46:46.920 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 02:46:46.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:46.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:46.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:46.975 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:46.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:46.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:46.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:46.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:46.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:46.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:46.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:46.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:47.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:47.043 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:47.044 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:47.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:47.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:47.397 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 02:46:47.875 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 02:46:48.354 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 02:46:48.832 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 02:46:49.309 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 02:46:49.782 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 02:46:50.261 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 02:46:50.739 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 02:46:51.217 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 02:46:51.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:51.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:51.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:51.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:51.289 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:51.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:51.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:51.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:51.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:51.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:51.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:51.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:51.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:51.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:51.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:51.364 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:51.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:51.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:51.695 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 02:46:52.174 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 02:46:52.648 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 02:46:53.118 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 02:46:53.596 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 02:46:54.075 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 02:46:54.552 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 02:46:55.030 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 02:46:55.508 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 02:46:55.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:55.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:55.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:55.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:55.606 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:55.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:55.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:55.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:46:55.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:55.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:46:55.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:46:55.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:46:55.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:46:55.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:55.676 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:46:55.676 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:46:55.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:55.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:55.986 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 02:46:56.464 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 02:46:56.942 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 02:46:57.421 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 02:46:57.900 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 02:46:58.378 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 02:46:58.857 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 02:46:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-11 02:46:59.803 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-11 02:46:59.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:46:59.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:46:59.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:46:59.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:46:59.914 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:46:59.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:46:59.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:46:59.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:46:59.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:46:59.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:46:59.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:46:59.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:46:59.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:46:59.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:46:59.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:46:59.928 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:46:59.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19205 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.930 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:46:59.931 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=19206 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:04.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:47:04.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:47:04.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:04.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:04.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:04.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:04.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:04.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:04.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:04.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:04.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:47:04.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:47:04.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:47:04.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:04.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:04.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:04.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:47:04.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:04.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:47:04.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:04.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:47:04.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:47:04.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:04.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:04.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:04.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:47:04.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:04.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:47:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:04.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:47:04.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:47:04.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:04.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:04.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:04.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:47:04.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:04.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:47:04.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:47:04.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:47:04.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:47:04.955 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:47:04.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:47:04.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:47:04.956 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:47:09.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:47:09.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:09.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:09.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:09.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:09.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:09.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:09.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:09.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:09.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:47:09.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:47:09.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:47:09.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:09.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:09.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:09.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:47:09.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:09.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:47:09.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:09.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:47:09.976 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:47:09.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:09.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:09.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:09.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:47:09.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:09.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:47:09.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:09.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:47:09.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:09.980 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:47:09.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:09.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:47:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:47:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:47:09.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:47:09.983 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:47:09.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:47:10.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:47:10.541 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:47:10.543 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:47:10.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:10.545 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:47:10.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:10.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:10.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:10.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:10.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:10.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:10.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:10.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:10.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:10.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:10.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:10.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:10.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:10.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:47:10.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:10.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:10.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:10.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:11.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:47:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:11.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:11.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:11.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:11.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:11.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:11.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:11.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:11.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:11.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:11.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:11.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:11.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:11.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:11.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:11.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:11.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:11.900 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:47:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:11.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:11.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:47:12.853 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:47:12.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:12.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:12.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:12.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:13.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:13.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:13.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:13.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:13.072 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=662 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:13.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:13.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:13.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:13.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:13.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:13.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:13.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:13.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:13.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:13.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:13.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:13.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:13.327 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:47:13.804 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:47:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:13.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:13.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:14.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:14.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:14.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:14.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:14.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:14.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:14.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:14.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:14.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:14.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:14.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:14.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:14.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:47:14.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:14.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:14.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:14.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:14.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:47:14.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:14.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:14.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:14.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:15.233 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:47:15.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:15.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:15.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:15.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:15.692 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1223 tn=2 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:15.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:15.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:15.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:15.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:15.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:15.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:15.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:15.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:15.711 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:47:15.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:15.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:15.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:15.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:15.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:16.188 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:47:16.665 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:47:17.142 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:47:17.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:17.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:17.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:17.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:17.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:17.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:17.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:17.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:17.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:17.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:17.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:17.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:17.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:17.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:17.347 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:47:17.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:17.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:17.620 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:47:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:47:18.568 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:47:18.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:18.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:18.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:18.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:18.786 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:18.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:18.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:18.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:18.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:18.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:18.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:18.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:18.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:18.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:18.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:18.859 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:47:18.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:18.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:19.046 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:47:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:47:19.994 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:47:20.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:20.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:20.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:20.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:20.300 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:20.300 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=2210 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:20.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:20.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:20.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:20.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:20.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:20.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:20.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:20.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:20.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:20.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:20.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:20.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:20.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:20.466 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:47:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:47:21.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:21.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:21.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:21.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:21.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:21.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:21.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:21.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:21.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:21.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:21.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:21.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:21.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:21.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:21.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:21.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:21.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:21.419 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:47:21.897 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:47:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:47:22.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:22.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:22.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:22.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:22.853 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:47:22.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:22.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:22.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:22.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:22.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:22.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:22.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:22.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:22.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:22.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:22.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:22.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:23.329 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:47:23.805 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:47:24.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:24.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:24.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:24.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:24.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:24.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:24.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:24.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:24.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:24.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:24.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:24.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:24.283 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:47:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:24.312 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:24.312 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:47:24.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:24.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:24.761 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:47:25.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:25.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:25.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:25.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:25.221 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:25.239 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:47:25.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:25.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:25.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:25.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:25.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:25.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:25.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:25.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:25.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:25.293 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:25.293 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:47:25.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:25.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:25.716 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:47:26.195 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:47:26.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:26.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:26.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:26.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:26.263 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:26.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:26.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:26.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:26.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:26.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:26.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:26.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:26.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:26.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:26.340 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:26.340 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:26.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:26.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:26.673 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:47:27.150 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:47:27.628 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:47:27.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:27.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:27.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:27.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:27.787 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:27.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:27.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:27.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:27.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:27.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:27.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:27.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:27.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:27.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:27.873 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:27.873 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:27.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:27.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:28.104 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:47:28.582 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:47:29.061 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:47:29.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:29.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:29.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:29.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:29.239 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:29.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:29.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:29.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:29.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:29.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:29.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:29.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:29.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:29.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:29.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:29.306 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:29.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:29.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:29.533 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:47:30.013 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:47:30.491 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:47:30.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:30.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:30.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:30.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:30.687 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:30.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:30.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:30.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:30.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:30.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:30.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:30.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:30.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:30.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:30.758 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:30.758 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:30.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:30.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:30.968 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:47:31.447 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:47:31.925 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:47:32.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:32.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:32.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:32.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:32.140 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:32.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:32.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:32.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:32.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:32.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:32.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:32.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:32.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:32.218 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:32.218 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:32.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:32.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:32.402 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:47:32.880 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:47:33.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:33.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:33.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:33.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:33.275 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:33.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:33.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:33.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:33.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:33.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:33.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:33.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:33.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:33.334 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:33.334 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:33.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:33.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:33.359 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:47:33.837 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:47:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:47:34.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:34.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:34.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:34.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:34.730 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:34.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:34.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:34.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:34.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:34.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:34.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:34.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:34.793 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:47:34.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:34.802 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:34.802 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:34.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:34.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:47:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:47:36.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:36.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:36.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:36.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:36.182 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:36.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:36.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:36.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:36.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:36.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:36.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:36.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:36.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:36.228 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:47:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:36.250 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:36.251 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:47:36.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:36.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:36.705 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:47:37.183 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:47:37.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:37.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:37.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:37.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:37.635 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:37.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:37.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:37.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:37.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:37.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:37.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:47:37.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:47:37.649 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:47:37.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.649 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.650 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.650 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.650 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.650 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:37.650 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5916 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:42.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:47:42.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:47:42.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:42.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:42.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:42.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:42.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:47:42.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:42.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:42.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:47:42.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:47:42.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:47:42.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:47:42.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:42.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:42.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:47:42.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:47:42.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:47:42.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:47:42.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:42.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:47:42.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:47:42.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:42.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:47:42.671 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:47:42.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:47:42.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:47:42.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:42.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:47:42.673 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:47:42.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:42.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:47:42.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:47:42.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:47:42.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:47:42.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:47:42.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:42.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.677 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:47:42.677 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:47:42.677 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:47:42.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:47:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:47:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:47:43.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:47:43.200 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:47:43.201 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:47:43.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:43.203 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:47:43.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:43.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:43.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:43.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:43.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:43.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:43.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:43.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:43.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:47:43.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:43.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:43.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:43.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:43.643 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:47:43.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:43.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:43.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:44.120 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:47:44.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:47:44.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:44.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:44.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:45.075 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:47:45.552 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:47:45.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:45.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:45.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:46.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:47:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:46.508 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:47:46.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:46.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:46.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:46.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:46.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:47:47.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:47.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:47.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:47.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:47.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:47.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:47.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:47.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:47.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:47.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:47.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:47:47.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:47.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:47.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:47.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:47.463 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:47:47.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:47:47.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:47:47.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:47:47.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:47:47.940 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:47:48.418 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:47:48.895 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:47:49.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:47:49.851 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:47:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:47:50.806 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:47:50.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:50.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:50.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:50.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:50.956 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:47:50.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:50.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:50.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:50.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:50.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:50.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:50.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:50.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:51.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:47:51.023 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:51.023 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:47:51.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:51.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:51.278 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:47:51.752 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:47:52.230 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:47:52.709 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:47:53.187 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:47:53.665 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:47:54.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:54.144 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:47:54.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:54.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:54.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:54.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:54.599 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:54.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:54.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:54.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:54.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:54.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:54.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:47:54.617 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:47:54.617 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:47:54.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:54.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:54.622 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:47:55.100 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:47:55.578 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:47:56.056 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:47:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:47:57.013 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:47:57.487 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:47:57.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:47:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:47:58.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:47:58.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:58.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:58.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:58.483 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:47:58.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:47:58.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:47:58.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:47:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:58.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:58.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:58.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:47:58.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:47:58.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:47:58.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:47:58.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:47:58.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:58.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:47:58.900 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:47:59.378 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:47:59.855 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:48:00.332 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:48:00.810 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:48:01.288 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:48:01.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:01.766 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:48:02.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:02.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:02.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:02.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:02.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:02.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:02.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:02.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:02.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:02.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:02.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:02.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:02.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:02.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:02.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:02.243 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:48:02.720 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:48:03.198 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:48:03.676 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:48:04.154 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:48:04.632 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:48:05.109 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:48:05.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:05.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:05.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:05.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:05.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:05.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:05.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:05.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:05.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:05.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:05.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:05.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:05.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:05.586 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:48:05.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:05.606 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:05.607 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:48:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:06.058 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:48:06.536 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:48:07.015 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:48:07.493 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:48:07.971 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:48:08.448 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:48:08.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:08.925 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:48:09.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:09.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:09.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:09.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:09.320 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:09.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:09.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:09.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:09.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:09.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:09.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:09.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:09.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:09.347 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:48:09.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:09.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:09.403 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:48:09.882 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:48:10.360 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:48:10.839 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:48:11.317 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:48:11.796 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:48:12.275 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:48:12.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:12.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:12.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:12.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:12.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:12.670 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:12.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:12.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:12.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:12.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:12.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:48:12.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:48:12.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:48:12.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:48:12.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:48:12.676 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:48:12.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:48:17.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:48:17.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:48:17.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:48:17.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:48:17.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:48:17.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:48:17.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:48:17.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:48:17.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:48:17.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:48:17.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:48:17.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:48:17.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:48:17.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:48:17.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:48:17.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:48:17.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:48:17.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:48:17.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:48:17.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:17.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:48:17.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:48:17.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:48:17.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:48:17.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:48:17.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:48:17.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:48:17.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:48:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:17.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:48:17.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:48:17.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:48:17.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:48:17.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:48:17.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:48:17.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:48:17.704 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:48:17.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:48:17.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:48:17.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:48:17.707 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:48:17.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:48:17.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:48:17.712 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:48:18.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:48:18.233 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:48:18.236 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:48:18.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:18.238 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:48:18.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:18.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:18.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:18.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:18.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:18.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:18.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:18.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:18.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:18.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:18.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:18.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:18.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:18.673 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:48:18.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:18.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:18.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:18.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:19.151 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:48:19.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:48:19.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:19.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:19.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:19.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:20.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:48:20.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:48:20.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:20.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:20.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:20.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:21.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:48:21.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:21.540 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:48:21.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:21.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:21.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:21.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:22.018 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:48:22.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:22.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:22.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:22.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:22.094 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:22.094 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:22.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:22.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:22.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:22.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:22.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:22.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:22.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:22.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:22.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:22.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:22.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:22.496 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:48:22.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:48:22.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:48:22.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:48:22.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:48:22.974 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:48:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:48:23.929 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:48:24.407 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:48:24.885 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:48:25.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:25.363 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:48:25.840 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:48:25.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:25.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:25.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:25.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:25.990 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=1768 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:25.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:25.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:25.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:25.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:25.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:25.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:26.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:26.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:26.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:26.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:26.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:26.318 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:48:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:48:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:48:27.751 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:48:28.229 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:48:28.707 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:48:29.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:29.185 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:48:29.663 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:48:29.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:29.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:29.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:29.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:29.886 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:29.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:29.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:29.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:29.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:29.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:29.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:29.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:29.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:29.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:29.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:29.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:30.140 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:48:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:30.618 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:48:30.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:30.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:30.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:30.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:30.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:30.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:30.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:30.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:30.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:30.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:30.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:30.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:30.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:30.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:30.920 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:48:30.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:30.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:31.091 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:48:31.560 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:48:32.038 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:48:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:48:32.995 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:48:33.474 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:48:33.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:33.951 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:48:34.429 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:48:34.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:34.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:34.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:34.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:34.504 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:34.505 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3588 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:34.505 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3588 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:48:34.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:34.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:34.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:34.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:34.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:34.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:34.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:34.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:34.524 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:48:34.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:34.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:34.907 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:48:35.386 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:48:35.866 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:48:36.345 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:48:36.823 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:48:37.298 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:48:37.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:37.767 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:48:38.236 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:48:38.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:38.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:38.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:38.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:38.385 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:38.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:38.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:38.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:38.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:38.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:38.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:38.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:38.419 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:38.419 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:48:38.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:38.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:38.708 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:48:39.185 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:48:39.654 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:48:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:48:40.594 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:48:41.072 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:48:41.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:41.551 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:48:42.029 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:48:42.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:42.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:42.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:42.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:42.254 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:42.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:42.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:42.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:42.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:42.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:42.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:42.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:42.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:42.267 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:48:42.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:42.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:42.503 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:48:42.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:42.972 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:48:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:43.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:43.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:43.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:43.213 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:43.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:43.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:43.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:43.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:43.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:43.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:43.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:43.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:43.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:43.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:43.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:43.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:43.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:43.445 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:48:43.923 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:48:44.401 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:48:44.878 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:48:45.356 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:48:45.834 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:48:46.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:46.311 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:48:46.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:46.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:46.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:46.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:46.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:46.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:46.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:46.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:46.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:46.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:46.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:46.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:46.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:46.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:46.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:46.788 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:48:47.266 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:48:47.744 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:48:48.221 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:48:48.699 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:48:49.177 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:48:49.655 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:48:49.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:50.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:50.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:50.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:50.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:50.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:50.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:50.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:50.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:50.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:50.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:50.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:50.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:50.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:50.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:50.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:50.132 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:48:50.610 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:48:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:48:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:48:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:48:52.521 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:48:52.998 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:48:53.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:53.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:53.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:53.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:53.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:53.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:53.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:53.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:53.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:53.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:53.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:53.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:53.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:53.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:53.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:53.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:53.475 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:48:53.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:53.953 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:48:54.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:54.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:54.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:54.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:54.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:54.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:54.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:54.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:54.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:54.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:54.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:54.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:54.430 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:48:54.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:54.460 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:54.460 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:48:54.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:54.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:54.908 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:48:55.386 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:48:55.864 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:48:56.342 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:48:56.821 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:48:57.299 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:48:57.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:57.774 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:48:58.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:48:58.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:58.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:48:58.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:48:58.170 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:48:58.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:48:58.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:58.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:48:58.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:48:58.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:48:58.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:48:58.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:48:58.196 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:48:58.197 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:48:58.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:58.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:48:58.249 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:48:58.728 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:48:59.206 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:48:59.684 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:49:00.162 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:49:00.640 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:49:01.118 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:49:01.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:01.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:01.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:01.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:01.513 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:49:01.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:01.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:01.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:01.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:01.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:01.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:01.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:49:01.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:49:01.540 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:49:01.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:01.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:01.596 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:49:02.074 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:49:02.553 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:49:03.031 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:49:03.510 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:49:03.988 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:49:04.466 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:49:04.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:04.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:04.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:04.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:04.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:04.861 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:49:04.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:04.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:04.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:04.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:04.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:04.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:04.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:49:04.888 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:49:04.888 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:49:04.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:04.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:04.943 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:49:05.421 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:49:05.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:05.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:05.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:05.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:05.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:05.816 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:49:05.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:05.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:05.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:05.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:05.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:05.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:05.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:05.824 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:49:10.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:10.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:10.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:10.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:10.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:10.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:10.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:10.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:10.844 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:10.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:10.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:49:10.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:49:10.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:49:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:10.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:10.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:10.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:49:10.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:10.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:49:10.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:10.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:49:10.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:49:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:10.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:10.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:10.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:49:10.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:10.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:49:10.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:10.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:10.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:49:10.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:49:10.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:49:10.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:49:10.854 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:49:10.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:10.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:49:11.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:49:11.381 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:49:11.382 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:49:11.383 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:49:11.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:11.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:11.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:11.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:11.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:11.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:11.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:11.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:11.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:49:11.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:11.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:11.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:12.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:49:12.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:49:12.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:12.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:12.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:12.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:13.218 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:49:13.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:49:13.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:13.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:13.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:13.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:14.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:49:14.630 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:49:14.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:14.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:14.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:14.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:15.101 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:49:15.572 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:49:15.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:15.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:15.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:15.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:16.044 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:49:16.513 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:49:16.984 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:49:17.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:49:17.931 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:49:18.402 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:49:18.873 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:49:19.346 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:49:19.817 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:49:20.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:20.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:20.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:20.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:20.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:20.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:20.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:20.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:20.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:20.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:20.176 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:49:20.176 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.176 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:20.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:25.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:25.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:25.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:25.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:25.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:25.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:25.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:25.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:49:25.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:49:25.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:49:25.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:25.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:25.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:25.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:49:25.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:25.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:49:25.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:25.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:49:25.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:49:25.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:25.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:25.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:25.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:49:25.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:25.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:49:25.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:25.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:25.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:25.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:49:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:49:25.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:49:25.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:49:25.204 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:49:25.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:49:25.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:25.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:49:25.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:49:25.733 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:49:25.735 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:49:25.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:25.738 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:49:25.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:25.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:25.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:25.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:25.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:25.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:25.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:25.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:26.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:49:26.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:26.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:26.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:49:27.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:49:27.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:27.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:27.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:27.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:27.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:49:28.048 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:49:28.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:28.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:28.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:28.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:49:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:49:29.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:29.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:29.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:29.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:29.460 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:49:29.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:49:30.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:30.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:30.403 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:49:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:49:31.352 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:49:31.823 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:49:32.297 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:49:32.769 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:49:33.241 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:49:33.711 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:49:34.181 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:49:34.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:34.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:34.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:34.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:34.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:34.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:34.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:34.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:34.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:34.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:34.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:34.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:34.542 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:34.542 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:49:39.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:39.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:39.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:39.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:39.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:39.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:39.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:39.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:39.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:39.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:39.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:49:39.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:49:39.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:49:39.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:39.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:39.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:39.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:49:39.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:39.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:49:39.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:39.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:49:39.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:49:39.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:39.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:39.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:39.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:49:39.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:39.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:49:39.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:39.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:49:39.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:49:39.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:39.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:39.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:39.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:49:39.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:39.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:49:39.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:49:39.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:49:39.567 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:49:39.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:39.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:49:40.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:49:40.101 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:49:40.103 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:49:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:40.105 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:49:40.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:40.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:40.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:40.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:49:40.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:40.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:40.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:40.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:40.994 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:49:41.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:41.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:41.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:41.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:41.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:41.466 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:49:41.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:41.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:41.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:41.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:41.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:49:42.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:49:42.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:42.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:42.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:42.879 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:49:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:49:43.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:43.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:43.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:43.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:43.830 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:49:44.302 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:49:44.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:44.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:44.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:44.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:44.779 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:49:45.257 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:49:45.734 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:49:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:49:46.681 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:49:47.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:49:47.624 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:49:48.095 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:49:48.566 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:49:49.036 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:49:49.507 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:49:49.978 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:49:50.451 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:49:50.928 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:49:51.405 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:49:51.883 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:49:52.361 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:49:52.838 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:49:52.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:52.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:52.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:52.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:52.994 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:49:57.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:49:57.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:49:57.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:58.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:58.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:58.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:58.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:49:58.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:58.010 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:58.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:49:58.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:49:58.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:49:58.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:49:58.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:58.016 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:58.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:49:58.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:49:58.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:49:58.017 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:49:58.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:58.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:49:58.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:49:58.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:49:58.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:58.020 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:49:58.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:49:58.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:58.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:49:58.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:49:58.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:49:58.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:49:58.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:49:58.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:49:58.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:49:58.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:49:58.024 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:49:58.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:49:58.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:49:58.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:49:58.549 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:49:58.550 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:49:58.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:49:58.551 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:49:58.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:49:58.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:49:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:49:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:49:58.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:49:58.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:49:58.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:49:58.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:49:58.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:49:59.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:49:59.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:49:59.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:49:59.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:49:59.465 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:49:59.600 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:49:59.942 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:50:00.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:00.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:00.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:00.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:00.146 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:00.420 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:50:00.668 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:00.898 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:50:01.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:01.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:01.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:01.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:01.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:50:01.853 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:50:02.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:02.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:02.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:50:02.691 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:02.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:50:03.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:03.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:03.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:03.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:03.200 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:03.283 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:50:03.717 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:03.759 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:50:04.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:50:04.250 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:04.715 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:50:05.193 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:50:05.670 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:50:06.147 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:50:06.273 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:50:07.103 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:50:07.581 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:50:08.058 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:50:08.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:08.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:08.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:08.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:08.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:08.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:08.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:08.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:08.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:08.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:08.295 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:08.295 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:13.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:13.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:13.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:13.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:13.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:13.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:13.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:13.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:13.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:13.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:13.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:13.314 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:13.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:13.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:13.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:13.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:13.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:13.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:13.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:13.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:13.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:13.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:13.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:13.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:13.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:13.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:13.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:13.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:13.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:13.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:13.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:13.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:13.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:13.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:13.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:13.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:13.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:13.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:13.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:13.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:13.324 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:13.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:13.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:13.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:50:13.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:50:13.852 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:13.854 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:50:13.855 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:50:13.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:13.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:13.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:13.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:13.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:13.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:13.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:13.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:13.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:13.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:13.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:13.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:13.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:13.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:13.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:13.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:13.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:13.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:13.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:13.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:13.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.283 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:50:14.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:14.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.577 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=270 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:14.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:14.608 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:50:14.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.612 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:14.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.661 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:14.661 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:50:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.676 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:14.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:14.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:50:14.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:14.850 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:50:14.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.865 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:14.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.888 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:14.888 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:50:14.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:14.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.899 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:14.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:14.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:14.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:14.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:14.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:14.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:14.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:14.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:14.940 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:14.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:14.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.062 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:15.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:15.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:15.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:15.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:15.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:15.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:15.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:15.078 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:15.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.083 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:15.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:15.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:15.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:15.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:15.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:15.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:15.133 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:15.133 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:15.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:50:15.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.329 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:15.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:15.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:15.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:15.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:15.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:15.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:15.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:15.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:15.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:15.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:15.360 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:15.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.590 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:15.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:15.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:15.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:15.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:15.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:15.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:15.645 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:15.645 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:15.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.700 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:50:15.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:15.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.854 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:15.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:15.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:15.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:15.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:15.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:15.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:15.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:15.883 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:15.883 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:15.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:15.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:16.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:16.108 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:16.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:16.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:16.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:16.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:16.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:16.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:16.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:16.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:50:16.179 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:16.179 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:16.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:16.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:16.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:16.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:16.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:16.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:16.371 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:16.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:16.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:16.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:16.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:16.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:16.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:16.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:16.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:50:16.415 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:50:16.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:16.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:16.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:16.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:16.620 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:50:16.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:16.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:16.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:16.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:16.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:16.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:16.626 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:16.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:21.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:21.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:21.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:21.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:21.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:21.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:21.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:21.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:21.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:21.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:21.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:21.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:21.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:21.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:21.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:21.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:21.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:21.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:21.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:21.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:21.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:21.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:21.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:21.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:21.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:21.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:21.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:21.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:21.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:21.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:21.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:21.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:21.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:21.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:21.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:21.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:21.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:21.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:21.655 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:21.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:21.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:21.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:50:22.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:50:22.171 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:22.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:22.172 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:50:22.174 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:50:22.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:22.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:22.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:50:22.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:22.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:22.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:22.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:50:22.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:50:22.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 02:50:22.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:50:22.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:50:22.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:22.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:50:22.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:22.621 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:50:22.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:22.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:22.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:22.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:23.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:50:23.574 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:50:23.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:23.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:23.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:23.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:24.052 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:50:24.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:50:24.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:50:24.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:24.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:24.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:24.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:24.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:24.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:24.292 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:24.292 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:29.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:29.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:29.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:29.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:29.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:29.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:29.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:29.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:29.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:29.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:29.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:29.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:29.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:29.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:29.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:29.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:29.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:29.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:29.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:29.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:29.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:29.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:29.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:29.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:29.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:29.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:29.324 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:29.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:29.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:29.326 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:29.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:34.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:34.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:34.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:34.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:34.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:34.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:34.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:34.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:34.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:34.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:34.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:34.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:34.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:34.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:34.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:34.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:34.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:34.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:34.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:34.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:34.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:34.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:34.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:34.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:34.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:34.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:34.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:34.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:34.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:34.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:34.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:34.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:34.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:34.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:34.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:34.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:34.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:34.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:34.355 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:34.355 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:50:34.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:50:34.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:50:34.878 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:34.879 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:50:34.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:34.881 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:50:35.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:50:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:35.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:35.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:35.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:35.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:50:36.258 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:50:36.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:36.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:36.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:36.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:36.739 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:50:37.221 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:50:37.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:37.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:37.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:37.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:37.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:50:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:50:38.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:38.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:38.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:38.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:50:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:50:39.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:39.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:39.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:39.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:39.607 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:50:40.088 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:50:40.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:40.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:40.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:40.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:40.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:40.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:40.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:40.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:40.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:40.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:40.404 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:40.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:45.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:45.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:45.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:45.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:45.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:45.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:45.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:45.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:45.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:45.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:45.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:45.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:45.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:45.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:45.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:45.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:45.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:45.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:45.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:45.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:45.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:45.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:45.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:45.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:45.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:45.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:45.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:45.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:45.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:45.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:45.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:45.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:45.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:45.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:45.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:45.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:45.432 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:45.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:50:45.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:50:45.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:50:45.966 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:50:45.967 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:50:45.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:50:45.968 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:50:46.401 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:50:46.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:46.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:46.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:46.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:46.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:50:47.363 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:50:47.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:47.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:47.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:47.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:47.844 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:50:48.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:50:48.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:48.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:48.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:48.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:48.803 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:50:49.278 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:50:49.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:49.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:49.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:49.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:49.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:50:50.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:50:50.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:50.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:50.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:50.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:50.722 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:50:50.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:50.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:50.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:50.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:50.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:50.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:50.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:50.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:50.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:50.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:50.980 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.980 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:50.981 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1179 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:50:55.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:55.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:55.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:55.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:55.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:55.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:55.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:55.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:55.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:55.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:50:55.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:50:55.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:50:55.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:50:56.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:56.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:56.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:50:56.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:50:56.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:50:56.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:50:56.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:50:56.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:50:56.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:50:56.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:56.002 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:56.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:50:56.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:50:56.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:50:56.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:50:56.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:50:56.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:50:56.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:50:56.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:56.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:50:56.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:50:56.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:50:56.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:50:56.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:50:56.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:50:56.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:50:56.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:50:56.008 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:50:56.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:50:56.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:50:56.009 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:50:56.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:01.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:01.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:01.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:01.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:01.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:01.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:01.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:01.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:01.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:01.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:51:01.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:51:01.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:51:01.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:01.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:01.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:01.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:51:01.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:01.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:51:01.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:01.032 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:51:01.032 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:51:01.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:01.032 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:01.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:01.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:51:01.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:01.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:51:01.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:01.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:01.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:51:01.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:51:01.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:51:01.037 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:51:01.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:01.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:51:01.525 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:51:01.562 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:01.564 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:01.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:01.566 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:51:01.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:01.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:01.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:51:01.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:51:02.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:02.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:02.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:02.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:51:02.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:02.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:02.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:02.572 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:51:02.572 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:51:02.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:51:03.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:03.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:03.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:03.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:03.405 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:51:03.875 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:51:04.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:04.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:04.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:04.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:51:04.817 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:51:05.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:05.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:05.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:05.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:05.288 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:51:05.760 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:51:06.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:06.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:06.230 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:51:06.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:51:07.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:51:07.644 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:51:08.123 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:51:08.598 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:51:09.075 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:51:09.550 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:51:10.020 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:51:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:51:10.961 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:51:11.431 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:51:11.904 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:51:12.379 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:51:12.853 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:51:13.331 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:51:13.809 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:51:14.284 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:51:14.762 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:51:15.240 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:51:15.717 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:51:16.195 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:51:16.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:16.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:16.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:16.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:16.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:16.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:16.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:16.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:16.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:16.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:16.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:16.360 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:51:16.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:16.361 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:21.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:21.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:21.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:21.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:21.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:21.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:21.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:21.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:21.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:21.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:21.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:51:21.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:51:21.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:51:21.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:21.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:21.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:21.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:51:21.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:21.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:51:21.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:21.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:51:21.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:51:21.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:21.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:21.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:21.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:51:21.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:21.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:51:21.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:21.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:51:21.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:51:21.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:21.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:21.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:21.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:51:21.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:21.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:51:21.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:21.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:51:21.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:51:21.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:51:21.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:51:21.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:51:21.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:51:21.388 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:51:21.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:21.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:51:21.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:51:21.912 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:21.913 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:21.914 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:51:21.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:21.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:21.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:21.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:51:21.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:21.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:21.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:21.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:51:21.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:51:21.967 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:21.971 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:21.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:21.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:21.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:21.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:21.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:22.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:51:22.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:22.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:22.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:22.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:22.822 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:51:23.300 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:51:23.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:23.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:23.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:23.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:23.777 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:51:24.254 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:51:24.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:24.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:24.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:24.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:24.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:51:25.210 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:51:25.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:25.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:25.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:51:26.166 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:51:26.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:26.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:26.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:26.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:26.644 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:51:27.122 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:51:27.600 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:51:28.078 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:51:28.556 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:51:29.034 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:51:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:51:29.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:29.990 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:51:29.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:29.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:29.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:30.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:30.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:30.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:30.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:30.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:30.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:30.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:30.004 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:30.005 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:35.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:35.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:35.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:35.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:35.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:35.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:35.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:35.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:35.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:35.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:35.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:51:35.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:51:35.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:51:35.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:35.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:35.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:35.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:51:35.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:35.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:51:35.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:35.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:51:35.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:51:35.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:35.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:35.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:35.040 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:51:35.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:35.040 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:51:35.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:35.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:35.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:51:35.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:35.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:51:35.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:51:35.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:51:35.045 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:51:35.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:35.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:51:35.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:51:35.570 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:35.571 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:35.573 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:51:35.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:35.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:35.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:35.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:51:35.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:35.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:35.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:35.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:51:35.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:51:35.624 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:35.627 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:35.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:35.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:35.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:35.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:35.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:36.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:51:36.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:36.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:36.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:36.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:36.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:51:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:51:37.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:37.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:37.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:37.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:37.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:51:37.918 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:51:38.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:38.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:38.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:38.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:38.395 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:51:38.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:51:39.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:39.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:39.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:39.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:39.350 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:51:39.828 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:51:40.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:40.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:40.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:40.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:51:40.784 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:51:41.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:51:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:51:42.217 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:51:42.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:51:43.173 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:51:43.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:43.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:43.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:43.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:43.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:43.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:43.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:43.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:43.651 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:51:43.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:43.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:43.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:43.653 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:51:43.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:43.654 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:48.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:48.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:48.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:48.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:48.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:48.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:48.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:48.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:48.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:48.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:48.671 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:51:48.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:51:48.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:51:48.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:48.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:48.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:48.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:51:48.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:48.676 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:51:48.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:48.678 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:48.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:51:48.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:48.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:51:48.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:51:48.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:48.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:48.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:48.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:51:48.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:48.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:51:48.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:51:48.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:51:48.683 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:51:48.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:48.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:51:49.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:51:49.214 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:49.217 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:49.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:49.220 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:51:49.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:49.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:49.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:51:49.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:49.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:49.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:49.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:51:49.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:51:49.262 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:49.265 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:49.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:49.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:51:49.271 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:51:49.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:49.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:49.648 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:51:49.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:49.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:49.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:49.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:49.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:49.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:49.843 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:51:49.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:49.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:49.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:49.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:49.849 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.849 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:49.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:54.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:54.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:54.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:54.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:54.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:54.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:54.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:54.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:51:54.866 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:51:54.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:51:54.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:51:54.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:54.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:54.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:54.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:51:54.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:51:54.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:51:54.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:54.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:51:54.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:51:54.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:54.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:54.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:54.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:51:54.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:51:54.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:51:54.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:54.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:51:54.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:51:54.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:54.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:51:54.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:54.877 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:51:54.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:51:54.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:51:54.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:54.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:51:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:51:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:51:54.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:51:54.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:51:54.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:51:54.881 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:51:54.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:51:54.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:51:55.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:51:55.406 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:55.407 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:55.409 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:51:55.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:55.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:55.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:55.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:51:55.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:55.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:51:55.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:51:55.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:51:55.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:51:55.460 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:51:55.465 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:51:55.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:51:55.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:51:55.473 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:51:55.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:55.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:51:55.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:51:55.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:55.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:55.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:55.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:56.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:51:56.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:51:56.039 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:51:56.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:51:56.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:51:56.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:51:56.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:51:56.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:51:56.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:51:56.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:51:56.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:51:56.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:51:56.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:51:56.044 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:51:56.044 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:01.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:01.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:01.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:01.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:01.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:01.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:01.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:01.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:01.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:01.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:52:01.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:01.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:01.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:01.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:52:01.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:01.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:52:01.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:52:01.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:01.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:01.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:01.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:52:01.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:01.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:52:01.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:52:01.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:52:01.079 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:52:01.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:01.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:52:01.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:52:01.604 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:01.605 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:01.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:01.606 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:52:01.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:01.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:01.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:01.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:01.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:01.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:01.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:01.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:01.659 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:01.664 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:01.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:01.672 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:52:01.672 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:52:01.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:01.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:02.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:52:02.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:02.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:02.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:02.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:02.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:02.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:02.240 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:52:02.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:02.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:02.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:02.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:02.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:02.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:02.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:02.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:02.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:02.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:02.245 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:02.245 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:07.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:07.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:07.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:07.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:07.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:07.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:07.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:07.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:07.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:07.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:07.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:52:07.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:52:07.268 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:52:07.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:07.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:07.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:07.269 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:52:07.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:07.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:52:07.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:07.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:07.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:52:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:07.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:52:07.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:07.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:52:07.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:52:07.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:52:07.276 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:52:07.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:52:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:07.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:07.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:52:07.762 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:52:07.792 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:07.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:07.793 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:07.794 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:52:07.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:07.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:07.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:07.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:07.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:07.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:07.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:07.854 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:07.858 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:07.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:07.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:07.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:07.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:07.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:08.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:52:08.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:08.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:08.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:08.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:08.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:52:09.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:52:09.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:09.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:09.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:09.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:09.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:52:10.144 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:52:10.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:10.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:10.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:10.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:10.622 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:52:11.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:52:11.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:11.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:11.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:11.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:11.577 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:52:12.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:52:12.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:12.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:12.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:12.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:12.532 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:52:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:52:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:52:13.964 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:52:14.440 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:52:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:52:15.395 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:52:15.873 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:52:15.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:15.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:15.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:15.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:15.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:15.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:15.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:15.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:15.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:15.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:15.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:15.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:15.916 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:15.919 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:15.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:15.931 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:52:15.931 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:52:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:16.349 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:52:16.827 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:52:17.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:17.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:17.065 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:52:17.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:17.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:17.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:17.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:17.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:17.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:17.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:17.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:17.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:17.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:17.071 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:52:22.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:22.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:22.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:22.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:22.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:22.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:22.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:22.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:22.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:22.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:22.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:52:22.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:52:22.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:52:22.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:22.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:22.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:22.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:52:22.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:22.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:52:22.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:22.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:52:22.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:52:22.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:22.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:22.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:22.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:52:22.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:22.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:52:22.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:22.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:22.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:22.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:52:22.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:52:22.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:52:22.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:52:22.098 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:52:22.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:22.103 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:52:22.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:52:22.621 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:22.622 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:22.623 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:52:22.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:22.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:22.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:22.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:22.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:22.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:22.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:22.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:22.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:22.678 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:22.681 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:22.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:22.694 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:52:22.694 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:52:22.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:22.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:23.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:52:23.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:23.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:23.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:23.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:23.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:23.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:23.246 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:52:23.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:23.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:23.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:23.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:23.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:23.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:23.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:23.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:23.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:23.252 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:52:23.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=248 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=248 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=248 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:23.252 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:28.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:52:28.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:52:28.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:28.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:28.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:28.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:28.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:52:28.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:28.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:28.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:52:28.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:52:28.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:52:28.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:52:28.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:28.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:28.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:52:28.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:52:28.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:52:28.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:52:28.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:28.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:52:28.265 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:52:28.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:28.265 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:28.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:52:28.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:52:28.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:52:28.266 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:52:28.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:28.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:52:28.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:52:28.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:28.268 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:52:28.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:52:28.268 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:52:28.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:52:28.268 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:52:28.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:28.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:52:28.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:52:28.271 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:52:28.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:52:28.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:52:28.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:52:28.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:52:28.801 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:28.803 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:28.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:28.805 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:52:28.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:28.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:28.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:28.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:28.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:28.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:28.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:28.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:28.850 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:28.853 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:28.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:28.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:28.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:28.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:28.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:29.235 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:52:29.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:29.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:29.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:29.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:29.713 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:52:30.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:52:30.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:30.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:30.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:30.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:30.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:52:31.146 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:52:31.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:31.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:31.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:31.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:31.624 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:52:32.102 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:52:32.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:32.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:32.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:32.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:32.580 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:52:33.058 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:52:33.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:52:33.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:52:33.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:52:33.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:52:33.536 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:52:34.014 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:52:34.491 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:52:34.969 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:52:35.446 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:52:35.924 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:52:36.401 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:52:36.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:36.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:36.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:36.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:36.878 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:52:36.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:36.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:36.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:36.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:36.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:36.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:36.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:36.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:36.924 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:36.927 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:36.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:36.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:36.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:37.351 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:52:37.829 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:52:38.307 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:52:38.783 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:52:39.261 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:52:39.739 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:52:40.217 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:52:40.695 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:52:41.172 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:52:41.650 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:52:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:52:42.602 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:52:43.080 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:52:43.558 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:52:44.035 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:52:44.512 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:52:44.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:44.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:44.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:44.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:44.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:44.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:44.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:44.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:44.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:44.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:44.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:44.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:44.980 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:44.982 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:44.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:44.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:44.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:44.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:44.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:44.989 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:52:45.462 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:52:45.934 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:52:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:52:46.884 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:52:47.362 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:52:47.840 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:52:48.315 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:52:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:52:49.270 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:52:49.748 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:52:50.226 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:52:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:52:51.182 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:52:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:52:52.137 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:52:52.615 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:52:52.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:52.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:52.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:52.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:52.996 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=5286 tn=5 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:52.996 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=5286 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:52.996 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=5286 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:52:53.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:52:53.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:52:53.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:52:53.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:53.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:53.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:53.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:52:53.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:52:53.032 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:52:53.034 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:52:53.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:52:53.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:52:53.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:52:53.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:53.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:52:53.088 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:52:53.561 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:52:54.037 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:52:54.514 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:52:54.991 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:52:55.469 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:52:55.946 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:52:56.424 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:52:56.902 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:52:57.379 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:52:57.854 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:52:58.332 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:52:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:52:59.288 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:52:59.766 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:53:00.243 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:53:00.721 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:53:01.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:01.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:01.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:01.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:01.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:01.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:01.053 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:01.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:06.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:06.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:06.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:06.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:06.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:06.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:06.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:06.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:06.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:06.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:06.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:06.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:06.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:06.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:06.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:06.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:06.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:06.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:06.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:06.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:06.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:06.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:06.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:06.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:06.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:06.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:06.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:06.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:06.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:06.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:06.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:06.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:06.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:06.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:06.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:06.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:06.082 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:06.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:06.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:06.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:06.608 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:06.608 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:06.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:06.610 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:06.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:06.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:06.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:06.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:06.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:06.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:06.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:06.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:06.662 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:06.666 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:06.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:06.677 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:53:06.677 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:53:06.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:06.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:07.046 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:07.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:07.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:07.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:07.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:07.522 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:53:08.000 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:53:08.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:08.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:08.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:08.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:08.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:08.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:08.231 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:53:08.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:08.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:08.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:08.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:08.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:08.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:08.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:08.236 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:08.236 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:13.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:13.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:13.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:13.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:13.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:13.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:13.252 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:13.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:13.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:13.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:13.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:13.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:13.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:13.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:13.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:13.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:13.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:13.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:13.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:13.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:13.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:13.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:13.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:13.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:13.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:13.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:13.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:13.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:13.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:13.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:13.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:13.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:13.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:13.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:13.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:13.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:13.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:13.263 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:13.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:13.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:13.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:13.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:13.789 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:13.790 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:13.790 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:13.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:13.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:13.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:13.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:13.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:13.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:13.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:13.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:13.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:13.844 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:13.849 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:13.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:13.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:53:13.858 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:53:13.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:13.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:14.227 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:14.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:14.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:14.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:14.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:14.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:14.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:14.419 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:53:14.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:14.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:14.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:14.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:14.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:14.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:14.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:14.427 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:14.427 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.427 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.427 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.428 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.429 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.429 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.429 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.429 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:14.429 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:19.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:19.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:19.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:19.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:19.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:19.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:19.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:19.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:19.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:19.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:19.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:19.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:19.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:19.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:19.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:19.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:19.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:19.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:19.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:19.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:19.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:19.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:19.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:19.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:19.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:19.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:19.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:19.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:19.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:19.453 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:19.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:19.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:19.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:19.980 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:19.981 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:19.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:19.982 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:20.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:20.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:20.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:20.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:20.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:20.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:20.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:20.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:20.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:20.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:20.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:20.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:20.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:20.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:20.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:20.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:20.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:20.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:53:21.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:53:21.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:21.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:21.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:21.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:21.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:53:22.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:53:22.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:22.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:22.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:22.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:22.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:53:23.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:53:23.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:23.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:23.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:23.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:23.761 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:53:24.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:53:24.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:24.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:24.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:24.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:24.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:53:25.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:53:25.672 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:53:26.150 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:53:26.628 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:53:27.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:53:27.584 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:53:28.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:28.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:28.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:28.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:53:28.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:28.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:28.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:28.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:28.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:28.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:28.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:28.074 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:28.074 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:28.074 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:28.074 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:28.074 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:28.075 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:28.075 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:33.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:33.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:33.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:33.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:33.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:33.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:33.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:33.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:33.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:33.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:33.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:33.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:33.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:33.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:33.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:33.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:33.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:33.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:33.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:33.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:33.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:33.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:33.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:33.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:33.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:33.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:33.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:33.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:33.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:33.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:33.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:33.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:33.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:33.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:33.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:33.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:33.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:33.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:33.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:33.097 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:33.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:33.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:33.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:33.632 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:33.635 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:33.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:33.637 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:33.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:33.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:33.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:33.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:33.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:33.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:33.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:33.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:33.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:53:33.690 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:53:33.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:33.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:34.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:34.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:34.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:34.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:34.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:53:34.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:53:35.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:35.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:35.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:35.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:35.472 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:53:35.951 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:53:36.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:36.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:36.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:36.429 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:53:36.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:53:37.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:37.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:37.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:37.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:53:37.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:53:38.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:38.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:38.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:38.331 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:53:38.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:53:39.271 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:53:39.742 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:53:40.213 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:53:40.683 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:53:41.154 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:53:41.625 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:53:41.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:41.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:41.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:41.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:41.700 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:53:41.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:41.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:41.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:41.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:41.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:41.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:41.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:41.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:41.717 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:41.717 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:53:46.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:46.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:46.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:46.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:46.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:46.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:46.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:46.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:46.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:46.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:46.729 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:46.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:46.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:46.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:46.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:46.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:46.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:46.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:46.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:46.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:46.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:46.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:46.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:46.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:46.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:46.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:46.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:46.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:46.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:46.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:46.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:46.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:46.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:46.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:46.739 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:46.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:46.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:47.226 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:47.267 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:47.270 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:47.271 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:47.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:47.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:47.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:47.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:47.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:47.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:47.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:47.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:47.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:47.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:47.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:47.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:47.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:47.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:48.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:53:48.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:53:48.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:48.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:48.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:48.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:49.137 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:53:49.615 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:53:49.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:49.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:49.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:49.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:50.092 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:53:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:53:50.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:50.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:50.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:50.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:51.048 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:53:51.526 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:53:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:51.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:51.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:52.004 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:53:52.481 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:53:52.959 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:53:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:53:53.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:53.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:53.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:53.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:53.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:53.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:53.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:53.785 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:53:58.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:53:58.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:53:58.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:58.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:58.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:58.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:58.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:53:58.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:58.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:58.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:53:58.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:53:58.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:53:58.802 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:53:58.802 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:58.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:58.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:53:58.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:53:58.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:53:58.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:53:58.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:58.805 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:53:58.805 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:53:58.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:58.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:58.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:53:58.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:53:58.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:53:58.807 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:53:58.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:58.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:53:58.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:53:58.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:58.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:53:58.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:53:58.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:53:58.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:53:58.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:53:58.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:58.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:53:58.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:53:58.813 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:53:58.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:53:58.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:53:59.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:53:59.339 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:53:59.339 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:53:59.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:53:59.342 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:53:59.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:53:59.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:53:59.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:53:59.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:53:59.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:53:59.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:53:59.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:53:59.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:53:59.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:53:59.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:53:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:53:59.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:53:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:00.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:54:00.731 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:54:00.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:00.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:01.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:54:01.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:54:01.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:01.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:01.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:01.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:02.165 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:54:02.643 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:54:02.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:02.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:02.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:02.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:03.120 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:54:03.598 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:54:03.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:03.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:03.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:03.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:03.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:03.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:03.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:03.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:03.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:03.858 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:04.079 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:54:04.563 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:54:05.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:54:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:54:06.019 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:54:06.504 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:54:06.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:54:07.474 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:54:07.959 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:54:08.442 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:54:08.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:08.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:08.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:08.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:08.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:08.862 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:54:08.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:08.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:08.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:08.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:08.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:08.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:08.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:08.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:54:08.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:54:08.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:54:08.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:08.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:08.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:08.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:54:08.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:08.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:54:08.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:08.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:08.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:54:08.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:08.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:08.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:54:08.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:54:08.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:54:08.877 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:54:08.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:08.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:08.879 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:54:08.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:13.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:13.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:13.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:13.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:13.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:13.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:13.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:13.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:13.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:13.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:13.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:54:13.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:54:13.896 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:54:13.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:13.897 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:13.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:13.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:54:13.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:13.898 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:54:13.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:13.899 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:54:13.899 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:54:13.900 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:13.900 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:13.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:13.900 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:54:13.900 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:13.900 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:54:13.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:13.902 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:54:13.902 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:54:13.902 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:13.902 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:13.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:13.902 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:54:13.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:13.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:54:13.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:13.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:54:13.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:54:13.907 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:54:13.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:13.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:54:14.393 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:54:14.440 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:14.442 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:54:14.445 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:54:14.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:14.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:14.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:54:14.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:14.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:14.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:14.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:54:14.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:54:14.870 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:54:14.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:14.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:14.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:14.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:54:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:54:15.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:15.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:15.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:15.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:16.303 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:54:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:54:16.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:16.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:16.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:54:17.737 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:54:17.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:17.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:17.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:17.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:54:18.693 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:54:18.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:18.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:18.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:18.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:54:19.643 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:54:19.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:20.121 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:54:20.597 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:54:20.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:21.075 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:54:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:54:21.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:22.028 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:54:22.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:54:22.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:22.981 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:54:23.457 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:54:23.935 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:54:23.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:23.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:24.407 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:54:24.878 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:54:25.348 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:54:25.821 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:54:26.296 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:54:26.764 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:54:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:54:27.709 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:54:27.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:28.189 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:54:28.667 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:54:28.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:54:29.622 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:54:29.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:30.099 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:54:30.574 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:54:30.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:31.052 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:54:31.530 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:54:31.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:32.007 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:54:32.485 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:54:32.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:32.963 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:54:33.440 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:54:33.918 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:54:34.397 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:54:34.874 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:54:34.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:34.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:34.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:34.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:34.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:34.988 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:54:39.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:39.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:39.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:39.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:39.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:39.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:40.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:40.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:40.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:40.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:40.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:54:40.003 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:54:40.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:54:40.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:40.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:40.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:40.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:54:40.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:40.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:54:40.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:40.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:54:40.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:54:40.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:40.006 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:40.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:40.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:54:40.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:40.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:54:40.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:40.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:54:40.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:54:40.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:40.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:40.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:40.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:54:40.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:40.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:54:40.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:40.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:54:40.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:54:40.012 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:54:40.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:40.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:40.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:54:40.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:54:40.546 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:40.548 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:54:40.550 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:54:40.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:40.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:40.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:54:40.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:40.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:40.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:40.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:54:40.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:54:40.589 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:40.591 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:40.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:54:40.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:40.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:40.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:40.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:40.975 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:54:41.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:41.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:41.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:41.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:54:41.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:54:41.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:41.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:41.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:41.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:41.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:41.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:41.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:41.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:41.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:41.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:41.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:41.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:41.905 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:54:41.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:41.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:41.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:41.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:41.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:46.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:46.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:46.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:46.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:46.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:46.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:46.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:46.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:46.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:46.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:46.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:54:46.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:54:46.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:54:46.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:46.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:46.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:46.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:54:46.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:46.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:54:46.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:46.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:54:46.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:54:46.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:46.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:46.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:46.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:54:46.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:46.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:54:46.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:46.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:54:46.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:54:46.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:46.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:46.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:46.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:54:46.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:46.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:54:46.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:46.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:54:46.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:54:46.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:54:46.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:54:46.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:54:46.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:54:46.932 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:54:46.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:46.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:46.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:54:47.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:54:47.464 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:47.467 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:47.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:54:47.469 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:54:47.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:47.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:47.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:54:47.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:47.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:47.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:47.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:54:47.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:54:47.512 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:47.515 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:47.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:54:47.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:47.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:47.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:47.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:47.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:54:47.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:47.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:47.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:47.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:48.375 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:54:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 02:54:48.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:48.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:48.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:48.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:48.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:48.831 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:54:48.832 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:48.832 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:48.832 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:48.832 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:48.832 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:54:53.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:54:53.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:54:53.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:53.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:53.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:53.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:53.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:54:53.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:53.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:53.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:54:53.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:53.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:54:53.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:54:53.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:54:53.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:53.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:54:53.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:54:53.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:53.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:54:53.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:54:53.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:53.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:54:53.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:54:53.849 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:54:53.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:54:53.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:54:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:54:54.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:54:54.380 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:54:54.382 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:54:54.384 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:54:54.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:54:54.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:54:54.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:54:54.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:54:54.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:54.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:54.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:54.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:54:54.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:54:54.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:54:54.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:54:54.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:54:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:54:54.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:54:54.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:54.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:54.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:55.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:54:55.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:54:55.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:55.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:55.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:55.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:54:56.677 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:54:56.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:56.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:56.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:56.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:57.149 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:54:57.621 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:54:57.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:57.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:57.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:57.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:58.093 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:54:58.567 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:54:58.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:54:58.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:54:58.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:54:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:54:59.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:54:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:54:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:55:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:55:00.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:55:01.412 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:55:01.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:55:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:55:02.833 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:55:03.303 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:55:03.774 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:55:04.249 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:55:04.722 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:55:05.197 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:55:05.670 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:55:06.145 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:55:06.618 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:55:07.091 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:55:07.561 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:55:08.033 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:55:08.502 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:55:08.973 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:55:09.444 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:55:09.918 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:55:10.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:10.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:10.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:10.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:10.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:10.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:10.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:55:10.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:10.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:55:10.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:55:10.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:55:10.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:55:10.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:10.295 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:55:10.296 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 02:55:10.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:10.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:55:10.856 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:55:11.331 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:55:11.800 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:55:12.270 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:55:12.746 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:55:13.221 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:55:13.695 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:55:14.165 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:55:14.635 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:55:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:55:15.582 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:55:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:55:16.529 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:55:17.006 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:55:17.478 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:55:17.950 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:55:18.426 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:55:18.902 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:55:19.376 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 02:55:19.846 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 02:55:20.327 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 02:55:20.803 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 02:55:21.282 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 02:55:21.759 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 02:55:22.238 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 02:55:22.716 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 02:55:23.194 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 02:55:23.671 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 02:55:24.149 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 02:55:24.628 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 02:55:25.106 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 02:55:25.581 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 02:55:25.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:25.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:25.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:25.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:25.769 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:55:25.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:25.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:25.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:55:25.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:25.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:55:25.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:55:25.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:55:25.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:55:25.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:25.818 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:55:25.819 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 02:55:25.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:25.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 02:55:26.532 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 02:55:27.009 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 02:55:27.486 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 02:55:27.963 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 02:55:28.442 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 02:55:28.914 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 02:55:29.384 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 02:55:29.859 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 02:55:30.338 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 02:55:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 02:55:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 02:55:31.762 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 02:55:32.232 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 02:55:32.702 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 02:55:33.173 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 02:55:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 02:55:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 02:55:34.608 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 02:55:35.086 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 02:55:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 02:55:36.043 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 02:55:36.522 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 02:55:37.001 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 02:55:37.478 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 02:55:37.950 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 02:55:38.421 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 02:55:38.897 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 02:55:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 02:55:39.854 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 02:55:40.332 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 02:55:40.808 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 02:55:41.287 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 02:55:41.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:41.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:41.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:41.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:41.365 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:55:41.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:41.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:41.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:55:41.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:41.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:55:41.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:55:41.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:55:41.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:55:41.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:55:41.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:41.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:55:41.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:55:41.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:41.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:41.762 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 02:55:42.240 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 02:55:42.714 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 02:55:43.191 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 02:55:43.668 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 02:55:44.146 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 02:55:44.623 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 02:55:45.101 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 02:55:45.578 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 02:55:46.056 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 02:55:46.534 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 02:55:47.012 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 02:55:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 02:55:47.967 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 02:55:48.446 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 02:55:48.923 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 02:55:49.402 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 02:55:49.880 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 02:55:50.357 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 02:55:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 02:55:51.313 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 02:55:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 02:55:52.267 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 02:55:52.743 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 02:55:53.221 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 02:55:53.696 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 02:55:54.173 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 02:55:54.651 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 02:55:55.129 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 02:55:55.607 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 02:55:56.085 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 02:55:56.562 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 02:55:56.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:55:56.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:55:56.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:55:56.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:55:57.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:55:57.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:55:57.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:55:57.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:55:57.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:55:57.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:55:57.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:55:57.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:55:57.010 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:55:57.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:55:57.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:55:57.011 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:02.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:02.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:02.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:02.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:02.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:02.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:02.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:02.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:02.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:02.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:02.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:56:02.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:56:02.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:56:02.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:02.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:02.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:02.032 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:56:02.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:02.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:56:02.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:02.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:56:02.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:56:02.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:02.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:02.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:02.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:56:02.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:02.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:56:02.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:02.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:02.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:56:02.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:02.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:02.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:02.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:56:02.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:56:02.044 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:56:02.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:56:02.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:02.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:02.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:02.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:02.045 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:02.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:07.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:07.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:07.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:07.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:07.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:07.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:07.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:07.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:07.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:07.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:56:07.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:56:07.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:56:07.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:07.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:07.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:07.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:56:07.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:07.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:56:07.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:07.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:56:07.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:56:07.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:07.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:07.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:07.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:56:07.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:07.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:56:07.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:07.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:07.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:56:07.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:56:07.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:56:07.077 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:56:07.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:07.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:07.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:56:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:56:07.605 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:56:07.606 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:07.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:07.608 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:56:07.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:07.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:07.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:56:07.627 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:07.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:07.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:07.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:07.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:56:07.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:56:07.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:07.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:07.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:07.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:07.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:08.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:56:08.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:08.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:08.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:08.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:08.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:56:08.995 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:56:09.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:09.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:09.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:09.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:09.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:56:09.952 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:56:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:10.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:10.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:10.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:10.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:56:10.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:56:11.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:11.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:11.385 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:56:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:56:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:12.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:12.341 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:56:12.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:56:13.296 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:56:13.774 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:56:14.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:56:14.730 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:56:15.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:56:15.686 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:56:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:56:16.642 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:56:17.120 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:56:17.598 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:56:18.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:18.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:18.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:18.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:18.048 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=2343 tn=6 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:18.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:18.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:18.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:18.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:18.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:18.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:18.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:18.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:18.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:18.062 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:56:18.062 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.062 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:18.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:23.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:23.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:23.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:23.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:23.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:23.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:23.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:23.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:23.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:23.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:23.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:23.081 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:23.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:56:23.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:23.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:56:23.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:56:23.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:23.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:23.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:23.084 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:56:23.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:23.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:56:23.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:23.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:56:23.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:56:23.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:23.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:23.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:23.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:56:23.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:23.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:56:23.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:56:23.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:56:23.089 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:56:23.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:56:23.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:56:23.618 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:56:23.620 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:23.620 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:56:23.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:23.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:23.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:23.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:56:23.655 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:23.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:23.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:23.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:23.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:56:23.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:56:23.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:23.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:23.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:23.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:23.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:24.052 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:56:24.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:24.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:24.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:24.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:56:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:56:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:25.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:25.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:25.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:56:25.964 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:56:26.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:26.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:26.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:26.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:56:26.920 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:56:27.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:27.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:27.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:27.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:56:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:56:28.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:28.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:28.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:28.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:28.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:56:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:56:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:56:29.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:56:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:56:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:56:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:56:31.701 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:56:32.179 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:56:32.657 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:56:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:56:33.613 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:56:34.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:34.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:34.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:34.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:34.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:34.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:34.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:34.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:34.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:34.076 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:56:34.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:34.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:34.077 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.077 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:34.078 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:39.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:39.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:39.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:39.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:39.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:39.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:39.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:39.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:39.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:39.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:56:39.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:56:39.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:56:39.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:56:39.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:39.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:39.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:39.088 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:56:39.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:56:39.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:56:39.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:39.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:56:39.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:56:39.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:56:39.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:39.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:56:39.092 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:56:39.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:56:39.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:56:39.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:56:39.095 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:56:39.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:56:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:56:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:56:39.624 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:56:39.627 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:39.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:39.629 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:56:39.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:39.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:39.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:56:39.654 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:56:39.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:39.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:39.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:39.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:56:39.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:56:39.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:39.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:56:39.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:56:39.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:39.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:40.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:56:40.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:40.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:40.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:40.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:40.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:56:40.553 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:56:41.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:56:41.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:41.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:41.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:41.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:41.492 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:56:41.968 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:56:42.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:42.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:42.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:42.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:42.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:56:42.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:56:43.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:43.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:43.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:43.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:43.401 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:56:43.879 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:56:44.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:44.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:44.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:44.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:44.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:56:44.834 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:56:45.309 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:56:45.784 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:56:46.259 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:56:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:56:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:56:47.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:56:48.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:56:48.632 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:56:49.107 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:56:49.581 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:56:50.058 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:56:50.533 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:56:51.009 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:56:51.487 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:56:51.965 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:56:52.442 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:56:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:56:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:56:53.872 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:56:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:56:54.827 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:56:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:56:55.783 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:56:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:56:56.738 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:56:57.215 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:56:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:56:58.170 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:56:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:56:59.125 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:56:59.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:56:59.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:56:59.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:56:59.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:56:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:56:59.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:56:59.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:56:59.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:56:59.273 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:56:59.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:04.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:04.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:04.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:04.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:04.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:04.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:04.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:04.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:04.296 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:04.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:04.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:57:04.299 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:57:04.299 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:57:04.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:04.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:04.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:04.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:57:04.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:04.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:57:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:04.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:04.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:57:04.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:04.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:04.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:57:04.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:57:04.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:57:04.307 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:57:04.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:04.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:04.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:57:04.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:57:04.832 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:57:04.833 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:04.834 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:57:04.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:04.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:04.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:04.869 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:04.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:04.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:04.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:04.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:04.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:04.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:04.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:04.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:04.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:04.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:05.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:57:05.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:05.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:05.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:05.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:05.749 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:57:05.765 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:06.227 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:57:06.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:06.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:06.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:06.705 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:57:06.739 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:07.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:57:07.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:07.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:07.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:07.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:07.655 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:57:07.704 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:08.129 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:57:08.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:08.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:08.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:08.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:08.605 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:57:08.671 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:09.083 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:57:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:09.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:09.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:09.560 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:57:09.650 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:10.037 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:57:10.514 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:57:10.621 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:10.992 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:57:11.470 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:57:11.596 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:11.947 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:57:12.424 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:57:12.569 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:57:13.379 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:57:13.543 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:57:14.334 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:57:14.516 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:14.812 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:57:15.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:15.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:15.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:15.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:15.289 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:57:15.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:15.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:15.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:15.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:15.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:15.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:15.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:15.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:15.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:15.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:15.296 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:57:20.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:20.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:20.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:20.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:20.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:20.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:20.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:20.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:20.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:57:20.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:57:20.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:57:20.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:20.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:20.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:20.317 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:57:20.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:20.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:57:20.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:20.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:57:20.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:57:20.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:20.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:20.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:20.320 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:57:20.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:20.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:57:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:20.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:57:20.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:57:20.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:20.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:20.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:20.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:57:20.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:20.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:57:20.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:57:20.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:57:20.328 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:57:20.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:20.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:57:20.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:57:20.854 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:57:20.856 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:20.858 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:57:20.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:20.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:20.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:20.887 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:57:20.889 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:20.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:20.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:20.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:20.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:20.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:20.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:20.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:20.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:20.913 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:20.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:20.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:21.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:57:21.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:21.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:21.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:21.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:21.764 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:57:21.781 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:22.241 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:57:22.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:22.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:22.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:22.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:22.719 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:57:23.197 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:57:23.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:23.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:23.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:23.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:23.672 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:57:24.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:57:24.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:24.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:24.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:24.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:24.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:57:25.105 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:57:25.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:25.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:25.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:25.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:25.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:57:26.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:57:26.538 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:57:27.016 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:57:27.494 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:57:27.972 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:57:28.450 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:57:28.927 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:57:29.405 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:57:29.879 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:57:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:57:30.827 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:57:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:57:31.502 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:57:32.256 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:57:32.734 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:57:33.212 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:57:33.687 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:57:34.165 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:57:34.642 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:57:35.120 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:57:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:57:36.076 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:57:36.553 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:57:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:57:37.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:37.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:37.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:37.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:37.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:37.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:37.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:37.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:37.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:37.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:37.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:37.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:37.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:37.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:37.366 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:57:37.366 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.366 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:37.367 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:57:42.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:42.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:42.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:42.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:42.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:42.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:42.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:42.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:42.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:42.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:42.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:57:42.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:57:42.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:57:42.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:42.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:42.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:42.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:57:42.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:42.382 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:57:42.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:42.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:57:42.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:57:42.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:42.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:42.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:42.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:57:42.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:42.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:57:42.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:42.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:42.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:57:42.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:57:42.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:57:42.390 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:57:42.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:42.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:57:42.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:57:42.920 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:57:42.922 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:42.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:42.925 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:57:42.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:42.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:42.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:42.962 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:42.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:42.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:42.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:42.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:42.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:42.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:42.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:42.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:42.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:43.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:57:43.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:43.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:43.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:43.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:43.830 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:57:43.846 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:57:44.308 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:57:44.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:44.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:44.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:44.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:44.786 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:57:45.264 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:57:45.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:45.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:45.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:45.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:45.742 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:57:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:57:46.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:46.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:46.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:46.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:46.697 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:57:47.175 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:57:47.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:47.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:47.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:47.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:47.653 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:57:48.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:57:48.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:57:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:57:49.564 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:57:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:57:50.519 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:57:50.997 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:57:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:57:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:57:52.431 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:57:52.909 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:57:52.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:52.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:52.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:52.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:52.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:52.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:52.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:52.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:52.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:52.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:52.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:52.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:52.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:52.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:52.985 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:57:57.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:57:57.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:57:57.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:57.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:57.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:57.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:57.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:57:57.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:57.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:57.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:57:57.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:57:58.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:57:58.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:57:58.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:58.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:58.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:57:58.002 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:57:58.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:57:58.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:57:58.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:58.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:57:58.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:57:58.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:58.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:57:58.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:57:58.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:58.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:57:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:57:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:57:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:57:58.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:57:58.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:57:58.009 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:57:58.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:57:58.014 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:57:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:57:58.534 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:57:58.535 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:57:58.536 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:57:58.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:58.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:58.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:58.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:58.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:58.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:58.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:58.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:58.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:58.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:58.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:58.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:58.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:58.975 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:57:58.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:58.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:58.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:58.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:58.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:58.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:58.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:59.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:59.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:59.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:59.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:59.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:57:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:57:59.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:57:59.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:57:59.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:59.028 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:57:59.028 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:57:59.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:57:59.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:59.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:59.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:59.708 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:57:59.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:59.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:59.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:59.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:59.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:59.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:59.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:59.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:59.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:59.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:59.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:59.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:59.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:57:59.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:57:59.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:57:59.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:57:59.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:57:59.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:57:59.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:57:59.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:57:59.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:57:59.920 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:57:59.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:57:59.923 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:58:00.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:00.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:00.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:00.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:00.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:00.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:00.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:00.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:00.319 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:58:00.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:00.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:00.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:00.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:00.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:00.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:00.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:00.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:00.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:00.330 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:58:00.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.330 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:00.331 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:05.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:05.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:05.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:05.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:05.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:05.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:05.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:05.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:05.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:05.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:05.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:58:05.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:58:05.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:58:05.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:05.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:05.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:05.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:58:05.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:05.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:58:05.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:05.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:05.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:58:05.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:05.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:58:05.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:58:05.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:05.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:05.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:05.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:58:05.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:05.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:58:05.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:58:05.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:58:05.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:58:05.357 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:58:05.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:05.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:58:05.844 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:58:05.882 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:58:05.883 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:58:05.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:05.884 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:58:05.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:05.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:05.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:05.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:05.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:05.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:05.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:05.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:05.936 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:58:05.940 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 02:58:05.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:05.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:05.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:05.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:05.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:58:06.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:06.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:06.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:06.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:06.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:06.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:06.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:06.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:06.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:06.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:06.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:06.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:06.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:06.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:06.337 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:58:06.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:06.338 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:11.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:11.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:11.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:11.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:11.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:11.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:11.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:11.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:11.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:11.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:11.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:58:11.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:58:11.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:58:11.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:11.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:11.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:11.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:58:11.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:11.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:58:11.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:11.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:58:11.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:58:11.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:11.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:11.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:11.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:58:11.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:11.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:58:11.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:11.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:58:11.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:11.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:58:11.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:58:11.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:58:11.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:58:11.368 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:58:11.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:11.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:11.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:58:11.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:58:11.894 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:58:11.895 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:58:11.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:11.897 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:58:11.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:11.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:11.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:11.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:11.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:11.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:11.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:11.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:11.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:11.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:11.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:11.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:11.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:12.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:12.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:58:12.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:12.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:12.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:58:13.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:58:13.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:13.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:13.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:13.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:13.755 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:58:14.233 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:58:14.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:14.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:14.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:14.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:14.712 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:58:15.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:15.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:15.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:15.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:15.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:15.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:15.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:15.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:15.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:15.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:15.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:15.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:15.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:15.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:58:15.141 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 02:58:15.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:15.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:15.188 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:58:15.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:15.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:15.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:15.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:15.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:15.667 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:58:16.146 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:58:16.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:16.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:16.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:16.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:16.615 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:58:17.084 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:58:17.555 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:58:18.025 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:58:18.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:18.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:18.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:18.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:18.320 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:58:18.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:18.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:18.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:18.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:18.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:18.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:18.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:18.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:18.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:18.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:18.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:18.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:18.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:18.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:18.497 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:58:18.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:58:19.453 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:58:19.931 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:58:20.409 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:58:20.887 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:58:21.365 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:58:21.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:21.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:21.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:21.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:21.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:21.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:21.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:21.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:21.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:21.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:21.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:21.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:21.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:21.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:58:21.560 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:58:21.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:21.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:21.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:21.843 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:58:22.321 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:58:22.799 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:58:23.277 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:58:23.755 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:58:24.233 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:58:24.711 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:58:24.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:24.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:24.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:24.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:24.765 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:58:24.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:24.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:24.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:24.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:24.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:24.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:24.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:24.778 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:24.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:58:29.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:29.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:29.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:29.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:29.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:29.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:29.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:29.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:29.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:29.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:29.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:58:29.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:58:29.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:58:29.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:29.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:29.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:29.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:58:29.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:29.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:58:29.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:29.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:58:29.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:58:29.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:29.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:29.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:29.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:58:29.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:29.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:58:29.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:29.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:58:29.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:58:29.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:29.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:29.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:29.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:58:29.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:29.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:58:29.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:58:29.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:58:29.808 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:29.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:29.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:58:30.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:58:30.323 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:58:30.323 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:58:30.324 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:58:30.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:30.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:30.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:30.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:30.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:30.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:30.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:30.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:30.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:30.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:58:30.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:30.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:30.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:30.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:31.245 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:58:31.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:58:31.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:31.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:31.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:31.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:58:32.670 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:58:32.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:32.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:32.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:32.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:33.146 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:58:33.624 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:58:33.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:33.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:33.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:33.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:58:34.580 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:58:34.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:34.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:34.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:34.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:35.057 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:58:35.535 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:58:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:58:36.491 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:58:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:58:37.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:58:37.925 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:58:38.402 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:58:38.879 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:58:39.357 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:58:39.835 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:58:40.313 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:58:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:58:41.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:58:41.746 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:58:42.221 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:58:42.693 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:58:43.167 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:58:43.640 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:58:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:58:44.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:44.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:44.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:44.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:44.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:44.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:44.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:44.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:44.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:44.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:44.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:44.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:44.406 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:58:49.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:58:49.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:58:49.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:49.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:49.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:49.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:49.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:58:49.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:49.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:49.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:58:49.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:58:49.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:58:49.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:58:49.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:49.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:49.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:58:49.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:58:49.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:58:49.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:58:49.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:49.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:58:49.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:58:49.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:49.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:49.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:58:49.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:58:49.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:58:49.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:58:49.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:49.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:58:49.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:58:49.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:49.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:58:49.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:58:49.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:58:49.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:58:49.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:58:49.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:58:49.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:58:49.434 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:58:49.434 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:58:49.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:58:49.922 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:58:49.965 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:58:49.967 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:58:49.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:49.969 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:58:49.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:49.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:49.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:49.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:49.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:50.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:50.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:50.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:50.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:58:50.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 02:58:50.025 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 02:58:50.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:50.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:50.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:58:50.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:50.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:50.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:50.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:50.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:58:51.356 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:58:51.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:51.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:51.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:51.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:51.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:58:52.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:52.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:58:52.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:58:52.027 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 02:58:52.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:58:52.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:58:52.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:58:52.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:58:52.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:58:52.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:58:52.299 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:58:52.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:52.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:52.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:52.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:52.770 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:58:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:58:53.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:53.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:53.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:53.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:53.716 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:58:54.194 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:58:54.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:58:54.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:58:54.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:58:54.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:58:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:58:55.149 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:58:55.626 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:58:56.099 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:58:56.576 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:58:57.053 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:58:57.530 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:58:58.007 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:58:58.485 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:58:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:58:59.440 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:58:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:59:00.395 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:59:00.873 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:59:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:59:01.821 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:59:02.299 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:59:02.776 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:59:03.249 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:59:03.726 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:59:04.204 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:59:04.682 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:59:05.159 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:59:05.637 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:59:06.109 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:59:06.580 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:59:07.056 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:59:07.531 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:59:08.001 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:59:08.476 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:59:08.954 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:59:09.432 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:59:09.910 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:59:10.388 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:59:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:59:11.344 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:59:11.817 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 02:59:12.291 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 02:59:12.768 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 02:59:13.246 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 02:59:13.723 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 02:59:14.201 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 02:59:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 02:59:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:59:14.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:59:14.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:59:14.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:14.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:14.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:14.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:14.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:14.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:14.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:14.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:59:14.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:59:14.970 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:14.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:19.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:59:19.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:59:19.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:19.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:19.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:19.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:19.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:19.979 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:59:19.979 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:19.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:59:19.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:59:19.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:59:19.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:59:19.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:59:19.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:19.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:59:19.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:59:19.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:59:19.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:19.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:19.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:59:19.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:59:19.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:59:19.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:19.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:59:19.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:59:19.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:59:19.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:19.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:59:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:59:19.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:59:19.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:59:19.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:59:19.990 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:59:19.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:19.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:59:20.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:59:20.522 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:59:20.524 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:59:20.526 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:59:20.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:59:20.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:59:20.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:59:20.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:59:20.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:59:20.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:59:20.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:59:20.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:59:20.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:59:20.954 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:59:20.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:20.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:20.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:20.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:21.428 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:59:21.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:59:21.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:21.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:21.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:21.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:22.384 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:59:22.860 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:59:22.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:22.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:22.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:22.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:23.338 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:59:23.814 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:59:23.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:23.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:23.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:23.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:24.291 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:59:24.769 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:59:24.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:24.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:24.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:25.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:25.246 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:59:25.724 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:59:26.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:59:26.675 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:59:27.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:59:27.628 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:59:28.106 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:59:28.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:59:29.061 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:59:29.538 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:59:30.016 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:59:30.494 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:59:30.972 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:59:31.449 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:59:31.926 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:59:32.404 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:59:32.881 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 02:59:33.358 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 02:59:33.836 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 02:59:34.314 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 02:59:34.792 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 02:59:35.269 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 02:59:35.747 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 02:59:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 02:59:36.702 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 02:59:37.180 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 02:59:37.657 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 02:59:38.134 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 02:59:38.608 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 02:59:39.086 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 02:59:39.564 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 02:59:40.041 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 02:59:40.519 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 02:59:40.996 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 02:59:41.470 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 02:59:41.945 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 02:59:42.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:59:42.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:59:42.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:42.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:42.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:42.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:42.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:42.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:42.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:42.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:59:42.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:59:42.016 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 02:59:42.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:42.016 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4709 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 02:59:47.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 02:59:47.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 02:59:47.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:47.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:47.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:47.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:47.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 02:59:47.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:59:47.030 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:47.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 02:59:47.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 02:59:47.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 02:59:47.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 02:59:47.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:59:47.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:47.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 02:59:47.036 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 02:59:47.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 02:59:47.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 02:59:47.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:59:47.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 02:59:47.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 02:59:47.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 02:59:47.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:47.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 02:59:47.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 02:59:47.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:59:47.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 02:59:47.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 02:59:47.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 02:59:47.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 02:59:47.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 02:59:47.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.043 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 02:59:47.043 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 02:59:47.043 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 02:59:47.043 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 02:59:47.048 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 02:59:47.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 02:59:47.569 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 02:59:47.570 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 02:59:47.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 02:59:47.572 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 02:59:47.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 02:59:47.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 02:59:47.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 02:59:47.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 02:59:47.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 02:59:47.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 02:59:47.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 02:59:47.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 02:59:48.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 02:59:48.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:48.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:48.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:48.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:48.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 02:59:48.963 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 02:59:49.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:49.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:49.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:49.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:49.437 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 02:59:49.911 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 02:59:50.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:50.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:50.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:50.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:50.389 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 02:59:50.867 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 02:59:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:51.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:51.345 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 02:59:51.822 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 02:59:52.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 02:59:52.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 02:59:52.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 02:59:52.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 02:59:52.299 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 02:59:52.777 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 02:59:53.255 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 02:59:53.730 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 02:59:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 02:59:54.678 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 02:59:55.154 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 02:59:55.628 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 02:59:56.098 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 02:59:56.568 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 02:59:57.042 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 02:59:57.516 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 02:59:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 02:59:58.468 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 02:59:58.946 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 02:59:59.423 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 02:59:59.901 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:00:00.378 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:00:00.855 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:00:01.330 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:00:01.808 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:00:02.285 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:00:02.763 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:00:03.241 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:00:03.718 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:00:04.196 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:00:04.674 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:00:05.151 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:00:05.628 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:00:06.106 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:00:06.584 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:00:07.061 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:00:07.539 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:00:08.016 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:00:08.493 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:00:08.970 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:00:09.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:00:09.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:00:09.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:09.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:09.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:09.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:09.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:09.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:09.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:00:09.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:00:09.069 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:00:09.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:09.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:09.070 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.070 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.070 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.071 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.071 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.071 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:09.071 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4715 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:14.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:00:14.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:00:14.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:14.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:14.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:14.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:14.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:14.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:00:14.071 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:14.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:00:14.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:00:14.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:00:14.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:00:14.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:00:14.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:14.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:14.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:00:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:00:14.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:00:14.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:14.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:00:14.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:00:14.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:00:14.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:14.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:00:14.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:00:14.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:00:14.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:00:14.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:00:14.076 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:00:14.076 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:14.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:00:14.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:00:14.589 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:00:14.590 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:00:14.590 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:00:14.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:00:14.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:00:14.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:00:14.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:00:15.020 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:00:15.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:15.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:15.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:15.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:15.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:00:15.960 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:00:16.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:16.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:16.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:16.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:00:16.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:00:17.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:17.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:17.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:17.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:00:17.845 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:00:18.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:18.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:18.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:18.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:00:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:00:19.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:19.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:19.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:19.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:19.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:00:19.754 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:00:20.232 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:00:20.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:00:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:00:21.664 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:00:22.141 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:00:22.619 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:00:23.096 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:00:23.570 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:00:24.044 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:00:24.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:00:24.999 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:00:25.477 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:00:25.954 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:00:26.427 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:00:26.903 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:00:27.381 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:00:27.859 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:00:28.334 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:00:28.811 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:00:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:00:29.766 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:00:30.244 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:00:30.721 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:00:31.199 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:00:31.676 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:00:32.154 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:00:32.632 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:00:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:00:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:00:34.062 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:00:34.540 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:00:35.016 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:00:35.493 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:00:35.967 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:00:36.442 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:00:36.920 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:00:37.398 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:00:37.876 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:00:38.353 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:00:38.829 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:00:39.307 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:00:39.785 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:00:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:00:40.740 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:00:41.218 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:00:41.695 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:00:42.173 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:00:42.651 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:00:43.129 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:00:43.606 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:00:44.084 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:00:44.561 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:00:45.036 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:00:45.513 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:00:45.990 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:00:46.468 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:00:46.946 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:00:47.424 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:00:47.901 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:00:48.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:00:48.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:00:48.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:48.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:48.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:48.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:48.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:48.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:48.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:48.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:00:48.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:00:48.111 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:00:48.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:48.111 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=7289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:00:53.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:00:53.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:00:53.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:53.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:53.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:53.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:53.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:00:53.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:00:53.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:53.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:00:53.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:00:53.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:00:53.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:00:53.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:00:53.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:53.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:00:53.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:00:53.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:00:53.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:00:53.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:53.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:00:53.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:00:53.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:00:53.127 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:53.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:00:53.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:00:53.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:00:53.128 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:00:53.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:53.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:00:53.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:00:53.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:00:53.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:00:53.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:00:53.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:00:53.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:00:53.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:00:53.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:00:53.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:00:53.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:00:53.133 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:00:53.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:00:53.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:00:53.138 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:00:53.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:00:53.656 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:00:53.658 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:00:53.659 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:00:53.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:00:53.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:00:53.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:00:53.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:00:53.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:00:53.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:00:53.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:00:53.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:00:53.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:00:54.095 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:00:54.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:54.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:54.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:54.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:54.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:00:55.050 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:00:55.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:55.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:55.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:55.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:55.527 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:00:56.005 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:00:56.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:56.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:56.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:56.482 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:00:56.960 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:00:57.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:57.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:57.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:57.437 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:00:57.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:00:58.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:00:58.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:00:58.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:00:58.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:00:58.392 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:00:58.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:00:59.347 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:00:59.824 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:01:00.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:01:00.775 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:01:01.252 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:01:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:01:02.208 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:01:02.685 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:01:03.163 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:01:03.641 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:01:04.118 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:01:04.596 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:01:05.074 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:01:05.552 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:01:06.030 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:01:06.507 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:01:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:01:07.463 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:01:07.940 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:01:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:01:08.889 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:01:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:01:09.842 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:01:10.320 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:01:10.797 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:01:11.274 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:01:11.752 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:01:12.229 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:01:12.706 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:01:13.183 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:01:13.661 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:01:14.138 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:01:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:01:15.093 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:01:15.570 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:01:16.048 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:01:16.525 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:01:17.003 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:01:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:01:17.959 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:01:18.437 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:01:18.915 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:01:19.393 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:01:19.870 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:01:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:01:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:01:21.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:01:21.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:01:21.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:21.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:21.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:21.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:21.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:21.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:21.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:21.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:21.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:21.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:21.162 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:01:21.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.162 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.163 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.163 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.163 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.163 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:21.163 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:26.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:26.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:26.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:26.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:26.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:26.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:26.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:26.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:26.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:26.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:01:26.174 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:01:26.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:01:26.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:26.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:26.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:26.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:01:26.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:26.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:01:26.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:26.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:01:26.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:01:26.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:26.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:26.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:26.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:01:26.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:26.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:01:26.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:26.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:26.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:01:26.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:01:26.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:01:26.186 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:01:26.186 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:26.191 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:01:26.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:01:26.718 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:01:26.719 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:01:26.721 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:01:26.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:01:26.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:26.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:26.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:26.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:26.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:26.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:26.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:26.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:26.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:26.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:26.733 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:26.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:31.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:31.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:31.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:31.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:31.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:31.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:31.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:31.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:31.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:31.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:31.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:01:31.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:01:31.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:01:31.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:31.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:31.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:31.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:01:31.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:31.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:01:31.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:31.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:01:31.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:01:31.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:31.756 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:31.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:31.756 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:01:31.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:31.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:01:31.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:31.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:31.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:01:31.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.761 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:01:31.761 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:01:31.761 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:01:31.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:31.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:31.766 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:01:32.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:01:32.280 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:01:32.281 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:01:32.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:01:32.282 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:01:32.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:32.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:32.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:32.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:32.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:32.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:32.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:32.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:32.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:32.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:32.290 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:01:32.290 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.290 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.291 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.291 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.291 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.291 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:32.291 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:37.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:37.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:37.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:37.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:37.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:37.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:37.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:37.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:37.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:37.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:37.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:01:37.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:01:37.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:01:37.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:37.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:37.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:37.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:01:37.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:37.314 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:01:37.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:37.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:01:37.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:01:37.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:37.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:37.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:37.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:01:37.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:37.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:01:37.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:37.317 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:37.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:01:37.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:37.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:01:37.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:01:37.321 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:01:37.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:37.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:37.326 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:01:37.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:01:37.839 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:01:37.840 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:01:37.841 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:01:37.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:01:37.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:37.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:37.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:37.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:37.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:37.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:37.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:37.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:37.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:37.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:37.851 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:01:37.851 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:37.851 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:42.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:42.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:42.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:42.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:42.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:42.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:42.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:42.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:42.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:42.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:01:42.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:01:42.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:01:42.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:42.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:42.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:42.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:01:42.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:42.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:42.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:01:42.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:42.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:01:42.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:42.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:01:42.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:01:42.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:42.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:42.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:42.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:01:42.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:42.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:01:42.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:01:42.872 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:01:42.872 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:01:42.872 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:42.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:42.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:42.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:01:43.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:01:43.396 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:01:43.397 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:01:43.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:01:43.398 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:01:43.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:01:43.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:01:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:01:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:01:43.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:01:43.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:01:43.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:01:43.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:01:43.836 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:01:43.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:43.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:43.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:43.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:01:44.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:01:44.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:44.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:44.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:44.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:45.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:01:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:01:45.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:45.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:45.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:45.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:46.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:01:46.692 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:01:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:46.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:46.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:46.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:47.169 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:01:47.646 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:01:47.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:47.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:47.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:48.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:01:48.602 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:01:49.080 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:01:49.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:01:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:01:50.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:01:50.968 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:01:51.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:01:51.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:01:51.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:51.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:51.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:51.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:51.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:51.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:51.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:51.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:51.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:51.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:51.412 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:51.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:01:56.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:01:56.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:01:56.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:56.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:56.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:56.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:56.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:01:56.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:56.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:56.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:01:56.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:01:56.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:01:56.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:01:56.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:56.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:56.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:01:56.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:01:56.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:01:56.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:01:56.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:56.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:01:56.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:01:56.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:56.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:56.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:01:56.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:01:56.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:01:56.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:01:56.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:56.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:01:56.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:01:56.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:01:56.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:01:56.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:01:56.439 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:01:56.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:01:56.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:01:56.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:01:56.970 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:01:56.972 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:01:56.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:01:56.973 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:01:56.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:01:56.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:01:56.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:01:56.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:01:56.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:01:56.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:01:56.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:01:56.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:01:57.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:01:57.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:57.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:57.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:57.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:57.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:01:58.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:01:58.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:58.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:58.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:58.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:58.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:01:59.316 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:01:59.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:01:59.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:01:59.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:01:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:01:59.791 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:02:00.269 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:02:00.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:00.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:00.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:00.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:00.747 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:02:01.225 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:02:01.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:01.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:01.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:01.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:01.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:02:02.181 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:02:02.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:02:03.135 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:02:03.609 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:02:04.087 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:02:04.565 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:02:05.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:05.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:05.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:05.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:05.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:05.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:05.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:05.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:05.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:05.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:05.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:05.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:05.030 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:02:05.030 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.030 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.030 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.030 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.030 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:05.031 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:10.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:10.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:10.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:10.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:10.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:10.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:10.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:10.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:10.042 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:10.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:10.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:02:10.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:02:10.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:02:10.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:10.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:10.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:10.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:02:10.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:10.046 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:02:10.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:10.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:10.049 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:10.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:02:10.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:10.051 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:02:10.051 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:02:10.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:10.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:10.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:10.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:02:10.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:10.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:02:10.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:02:10.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:02:10.055 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:02:10.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:10.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:10.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:02:10.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:02:10.583 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:02:10.584 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:02:10.585 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:02:10.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:02:10.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:10.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:10.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:02:10.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:02:10.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:02:10.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:02:10.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:02:10.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:02:11.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:02:11.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:11.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:11.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:11.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:11.495 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:02:11.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:02:12.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:12.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:12.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:12.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:12.450 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:02:12.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:02:13.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:13.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:13.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:13.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:13.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:02:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:02:14.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:14.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:14.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:14.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:14.362 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:02:14.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:02:15.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:15.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:15.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:15.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:15.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:02:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:02:16.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:02:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:02:17.227 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:02:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:02:18.182 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:02:18.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:18.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:18.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:18.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:18.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:18.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:18.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:18.650 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:02:18.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:18.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:18.651 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.651 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.652 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:18.653 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:23.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:23.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:23.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:23.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:23.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:23.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:23.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:23.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:23.666 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:23.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:23.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:02:23.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:02:23.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:02:23.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:23.669 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:23.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:23.669 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:02:23.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:23.670 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:02:23.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:23.671 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:02:23.671 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:02:23.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:23.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:23.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:23.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:02:23.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:23.672 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:02:23.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:23.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:02:23.673 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:02:23.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:23.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:23.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:23.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:02:23.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:23.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:02:23.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.677 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:02:23.677 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:02:23.677 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:02:23.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:23.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:23.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:02:24.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:02:24.209 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:02:24.210 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:02:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:02:24.212 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:02:24.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:24.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:24.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:02:24.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:02:24.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:02:24.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:02:24.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:02:24.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:02:24.642 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:02:24.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:24.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:24.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:24.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:25.120 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:02:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:02:25.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:25.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:25.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:25.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:26.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:02:26.554 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:02:26.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:26.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:26.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:26.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:27.031 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:02:27.509 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:02:27.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:27.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:27.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:27.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:27.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:02:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:02:28.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:28.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:28.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:28.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:28.943 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:02:29.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:02:29.898 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:02:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:02:30.854 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:02:31.331 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:02:31.809 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:02:32.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:32.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:32.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:32.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:32.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:32.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:32.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:32.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:32.272 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:02:32.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.273 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:32.274 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:37.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:37.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:37.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:37.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:37.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:37.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:37.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:37.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:37.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:37.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:37.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:02:37.290 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:02:37.290 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:02:37.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:37.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:37.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:37.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:02:37.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:37.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:02:37.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:37.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:02:37.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:02:37.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:37.294 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:37.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:37.294 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:02:37.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:37.294 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:02:37.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:37.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:02:37.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:37.296 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:02:37.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:02:37.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:02:37.299 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:02:37.300 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:37.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:37.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:02:37.788 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:02:37.820 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:02:37.820 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:02:37.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:02:37.822 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:37.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:02:37.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:02:37.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:02:38.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:02:38.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:38.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:38.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:38.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:38.741 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:02:39.216 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:02:39.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:39.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:39.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:39.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:39.693 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:02:40.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:02:40.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:40.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:40.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:40.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:40.643 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:02:41.114 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:02:41.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:41.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:41.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:41.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:41.584 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:02:42.056 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:02:42.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:42.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:42.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:42.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:42.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:02:43.008 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:02:43.481 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:02:43.953 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:02:44.427 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:02:44.897 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:02:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:02:45.837 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:02:45.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:45.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:45.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:45.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:45.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:45.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:45.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:45.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:45.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:45.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:45.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:45.850 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:02:45.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:45.850 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:02:50.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:02:50.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:02:50.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:50.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:50.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:50.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:50.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:02:50.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:50.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:50.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:02:50.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:02:50.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:02:50.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:02:50.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:50.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:50.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:02:50.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:02:50.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:02:50.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:02:50.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:50.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:02:50.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:02:50.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:50.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:50.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:02:50.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:02:50.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:02:50.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:02:50.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:50.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:02:50.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:02:50.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:50.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:02:50.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:02:50.877 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:02:50.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:02:50.877 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:02:50.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:02:50.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:02:50.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:02:50.881 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:02:50.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:02:50.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:02:50.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:02:51.369 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:02:51.406 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:02:51.408 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:02:51.410 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:02:51.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:02:51.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:02:51.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:02:51.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:02:51.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:02:51.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:02:51.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:02:51.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:02:51.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:02:51.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:02:51.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:51.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:51.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:51.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:52.323 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:02:52.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:02:52.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:52.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:52.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:52.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:53.279 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:02:53.754 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:02:53.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:53.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:53.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:53.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:54.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:02:54.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:02:54.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:54.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:54.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:54.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:55.188 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:02:55.665 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:02:55.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:02:55.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:02:55.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:02:55.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:02:56.143 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:02:56.621 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:02:57.098 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:02:57.576 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:02:58.054 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:02:58.527 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:02:58.999 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:02:59.470 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:02:59.947 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:03:00.424 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:03:00.898 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:03:01.369 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:03:01.840 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:03:02.316 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:03:02.790 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:03:03.261 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:03:03.738 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:03:04.215 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:03:04.692 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:03:05.170 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:03:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:03:06.121 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:03:06.592 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:03:07.063 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:03:07.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:07.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:07.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:07.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:07.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:07.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:07.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:07.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:07.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:07.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:07.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:07.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:07.480 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:07.480 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.481 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:07.482 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:12.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:12.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:12.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:12.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:12.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:12.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:12.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:12.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:12.489 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:12.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:12.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:03:12.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:03:12.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:03:12.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:12.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:12.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:12.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:03:12.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:12.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:03:12.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:12.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:03:12.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:03:12.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:12.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:12.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:12.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:03:12.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:12.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:03:12.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:12.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:03:12.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:03:12.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:12.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:12.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:12.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:03:12.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:12.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:03:12.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:03:12.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:03:12.503 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:12.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:03:12.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:03:13.034 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:03:13.036 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:03:13.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:03:13.038 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:13.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:03:13.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:03:13.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:03:13.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:03:13.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:13.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:13.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:13.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:13.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:03:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:03:14.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:14.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:14.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:14.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:03:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:03:15.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:15.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:15.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:15.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:15.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:03:16.289 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:03:16.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:16.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:16.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:16.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:16.765 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:03:17.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:03:17.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:17.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:17.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:17.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:03:18.197 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:03:18.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:03:19.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:03:19.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:03:20.089 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:03:20.562 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:03:21.034 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:03:21.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:21.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:21.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:21.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:21.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:21.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:21.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:21.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:21.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:21.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:21.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:21.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:21.102 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:21.102 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.102 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.103 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.103 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.103 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.103 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:21.103 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:26.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:26.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:26.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:26.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:26.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:26.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:26.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:26.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:26.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:26.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:26.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:03:26.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:03:26.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:03:26.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:26.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:26.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:26.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:03:26.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:26.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:03:26.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:26.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:03:26.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:03:26.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:26.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:26.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:26.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:03:26.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:26.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:03:26.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:26.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:03:26.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:03:26.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:26.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:26.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:26.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:03:26.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:26.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:03:26.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:26.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:03:26.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:03:26.125 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:03:26.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:26.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:03:26.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:03:26.651 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:03:26.652 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:03:26.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:03:26.653 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:26.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:03:26.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:03:26.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:03:27.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:03:27.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:27.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:27.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:27.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:27.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:03:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:03:28.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:28.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:28.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:28.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:28.524 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:03:29.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:03:29.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:29.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:29.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:29.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:29.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:03:29.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:03:30.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:30.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:30.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:30.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:30.435 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:03:30.912 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:03:31.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:31.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:31.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:31.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:31.391 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:03:31.869 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:03:32.347 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:03:32.824 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:03:33.302 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:03:33.780 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:03:34.257 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:03:34.735 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:03:35.213 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:03:35.687 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:03:36.165 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:03:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:03:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:03:37.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:03:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:03:38.552 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:03:39.030 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:03:39.508 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:03:39.985 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:03:40.462 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:03:40.935 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:03:41.406 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:03:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:03:42.349 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:03:42.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:42.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:42.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:42.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:42.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:42.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:42.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:42.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:42.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:42.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:42.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:42.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:42.739 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:42.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3555 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:47.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:47.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:47.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:47.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:47.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:47.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:47.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:47.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:47.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:03:47.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:03:47.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:03:47.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:47.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:47.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:47.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:03:47.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:47.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:03:47.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:47.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:03:47.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:03:47.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:47.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:47.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:47.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:03:47.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:47.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:03:47.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:47.761 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:03:47.761 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:03:47.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:47.762 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:47.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:47.762 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:03:47.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:47.762 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:03:47.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:03:47.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:03:47.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:03:47.766 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:03:47.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:47.771 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:03:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:03:48.288 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:03:48.289 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:03:48.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:03:48.291 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:03:48.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:48.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:48.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:03:48.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:48.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:48.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:48.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:48.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:48.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:48.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:48.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:48.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:48.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:48.326 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:48.327 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.327 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.327 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.327 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.328 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:48.329 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:53.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:53.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:53.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:53.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:53.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:53.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:53.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:53.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:53.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:53.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:53.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:53.334 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:03:53.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:53.336 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:53.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:03:53.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:53.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:53.338 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:03:53.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:53.340 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:03:53.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:03:53.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:03:53.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:03:53.340 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:03:53.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:03:53.341 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:03:53.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:03:53.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:53.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:03:53.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:03:53.874 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:03:53.875 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:03:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:03:53.877 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:03:53.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:53.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:53.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:03:53.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:53.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:53.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:53.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:53.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:53.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:53.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:53.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:53.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:53.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:53.925 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:53.925 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.925 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.925 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.925 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.926 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.926 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:53.926 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:58.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:58.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:58.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:58.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:58.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:58.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:58.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:58.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:58.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:58.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:03:58.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:03:58.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:03:58.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:03:58.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:58.941 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:58.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:58.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:03:58.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:03:58.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:03:58.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:58.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:03:58.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:03:58.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:58.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:03:58.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:03:58.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:58.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:03:58.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:58.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:03:58.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:03:58.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:03:58.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:03:58.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:03:58.947 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:03:58.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:03:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:03:59.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:03:59.466 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:03:59.467 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:03:59.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:03:59.467 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:03:59.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:03:59.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:03:59.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:03:59.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:03:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:03:59.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:03:59.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:03:59.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:03:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:03:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:03:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:03:59.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:03:59.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:03:59.493 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:03:59.494 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:04.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:04.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:04.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:04.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:04.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:04.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:04.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:04.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:04.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:04.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:04.510 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:04:04.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:04:04.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:04:04.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:04.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:04.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:04.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:04:04.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:04.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:04:04.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:04.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:04.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:04.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:04:04.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:04.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:04:04.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:04:04.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:04.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:04.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:04.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:04:04.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:04.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:04:04.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:04:04.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:04:04.523 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:04:04.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:04.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:04.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:04:05.011 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:04:05.048 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:04:05.049 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:04:05.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:04:05.050 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:04:05.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:05.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:05.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:05.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:05.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:05.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:05.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:05.085 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:05.085 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:04:10.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:10.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:10.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:10.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:10.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:10.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:10.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:10.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:10.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:10.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:10.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:04:10.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:04:10.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:04:10.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:10.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:10.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:10.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:04:10.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:10.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:04:10.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:10.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:04:10.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:04:10.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:10.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:10.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:10.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:04:10.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:10.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:04:10.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:10.104 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:04:10.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:04:10.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:10.105 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:10.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:10.105 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:04:10.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:10.105 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:04:10.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:04:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:04:10.109 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:04:10.109 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:04:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.109 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:10.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:10.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:10.114 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:04:10.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:04:10.639 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:04:10.640 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:04:10.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:04:10.641 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:04:10.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:10.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:10.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:10.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:10.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:10.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:10.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:10.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:10.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:10.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:10.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:10.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:10.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:10.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:10.683 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:04:15.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:15.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:15.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:15.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:15.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:15.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:15.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:15.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:15.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:15.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:15.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:04:15.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:04:15.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:04:15.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:15.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:15.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:15.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:04:15.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:15.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:04:15.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:15.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:04:15.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:04:15.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:15.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:15.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:15.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:04:15.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:15.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:04:15.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:15.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:15.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:15.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:04:15.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:15.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:04:15.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:04:15.711 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:04:15.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:15.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:04:16.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:04:16.229 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:04:16.229 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:04:16.230 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:04:16.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:04:16.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:16.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:16.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:16.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:16.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:16.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:16.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:16.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:16.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:16.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:16.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:16.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:16.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:16.264 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:04:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:21.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:21.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:21.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:21.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:21.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:21.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:21.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:21.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:21.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:04:21.280 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:04:21.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:04:21.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:04:21.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:21.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:21.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:21.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:04:21.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:04:21.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:04:21.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:21.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:21.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:04:21.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:04:21.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:21.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:04:21.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:04:21.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:21.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:04:21.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:21.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:04:21.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:04:21.292 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:04:21.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:04:21.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:04:21.296 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:04:21.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:04:21.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:04:21.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:04:21.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:04:21.823 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:04:21.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:04:21.827 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:04:21.831 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:04:21.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:21.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:21.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:04:21.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:04:21.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:04:21.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:04:21.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:04:21.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:04:22.257 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:04:22.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:22.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:22.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:22.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:22.731 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:04:23.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:04:23.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:23.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:23.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:23.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:23.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:04:24.163 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:04:24.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:24.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:24.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:24.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:24.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:04:25.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:04:25.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:25.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:25.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:25.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:25.596 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:04:26.073 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:04:26.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:26.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:26.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:26.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:26.551 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:04:27.029 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:04:27.507 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:04:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:04:28.463 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:04:28.941 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:04:29.418 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:04:29.896 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:04:30.373 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:04:30.851 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:04:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:04:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:04:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:04:32.762 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:04:33.240 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:04:33.717 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:04:34.195 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:04:34.672 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:04:35.150 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:04:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:04:36.106 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:04:36.583 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:04:37.061 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:04:37.538 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:04:38.016 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:04:38.493 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:04:38.971 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:04:39.448 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:04:39.926 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:04:40.403 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:04:40.881 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:04:41.358 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:04:41.837 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:04:42.314 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:04:42.792 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:04:43.270 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:04:43.748 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:04:44.225 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:04:44.704 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:04:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:04:45.659 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:04:46.137 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:04:46.614 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:04:47.092 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:04:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:04:48.048 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:04:48.526 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:04:49.004 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:04:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:04:49.959 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:04:50.437 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:04:50.915 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:04:51.393 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:04:51.870 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:04:52.348 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:04:52.826 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:04:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:04:53.778 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:04:54.256 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:04:54.733 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:04:55.211 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:04:55.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:04:55.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:04:55.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:04:55.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:04:55.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:04:55.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:04:55.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:04:55.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:04:55.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:04:55.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:04:55.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:04:55.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:04:55.325 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:00.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:00.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:00.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:00.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:00.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:00.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:00.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:00.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:00.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:00.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:00.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:00.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:00.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:00.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:00.349 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:00.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:00.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:00.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:00.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:00.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:00.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:00.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:00.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:00.352 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:00.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:00.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:00.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:00.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:00.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:00.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:00.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:00.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:00.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:00.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:00.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:00.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:00.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:00.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:00.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:00.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:00.359 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:00.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:00.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:00.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:00.887 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:00.888 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:00.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:00.889 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:01.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:01.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:01.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:01.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:01.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:01.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:02.279 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:02.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:02.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:02.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:02.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:05:03.237 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:05:03.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:03.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:03.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:03.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:03.715 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:05:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:03.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:03.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:03.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:03.905 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:03.905 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:08.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:08.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:08.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:08.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:08.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:08.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:08.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:08.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:08.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:08.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:08.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:08.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:08.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:08.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:08.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:08.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:08.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:08.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:08.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:08.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:08.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:08.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:08.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:08.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:08.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:08.926 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:08.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:08.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:08.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:08.926 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:08.927 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:08.927 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:08.927 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:08.932 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:09.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:09.453 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:09.455 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:09.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:09.457 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:09.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:09.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:09.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:09.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:10.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:10.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:10.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:10.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:11.327 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:05:11.805 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:05:11.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:11.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:12.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:05:12.762 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:05:12.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:12.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:12.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:12.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:13.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:05:13.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:05:13.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:13.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:14.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:05:14.680 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:05:15.159 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:05:15.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:15.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:15.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:15.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:15.473 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:15.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:20.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:20.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:20.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:20.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:20.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:20.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:20.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:20.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:20.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:20.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:20.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:20.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:20.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:20.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:20.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:20.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:20.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:20.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:20.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:20.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:20.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:20.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:20.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:20.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:20.496 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:20.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:20.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:20.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:20.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:20.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:20.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:20.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:20.499 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:20.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:20.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:20.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:20.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:21.023 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:21.024 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:21.025 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:21.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:21.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:21.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:21.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:21.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:21.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:21.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:22.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:22.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:22.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:22.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:05:23.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:05:23.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:23.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:23.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:23.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:23.851 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:05:24.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:05:24.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:24.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:24.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:24.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:24.805 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:05:25.287 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:05:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:25.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:25.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:25.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:05:26.244 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:05:26.722 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:05:27.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:27.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:27.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:27.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:27.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:27.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:27.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:27.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:27.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:27.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:27.037 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:27.037 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:27.037 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:27.037 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:27.037 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:05:32.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:32.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:32.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:32.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:32.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:32.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:32.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:32.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:32.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:32.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:32.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:32.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:32.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:32.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:32.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:32.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:32.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:32.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:32.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:32.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:32.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:32.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:32.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:32.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:32.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:32.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:32.058 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:32.058 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:32.058 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:32.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:32.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:32.574 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:32.575 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:32.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:32.576 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:33.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:33.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:33.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:33.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:33.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:33.485 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:33.966 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:34.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:34.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:34.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:34.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:34.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:05:34.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:05:35.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:35.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:35.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:35.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:35.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:05:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:05:36.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:36.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:36.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:36.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:36.364 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:05:36.845 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:05:37.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:37.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:37.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:37.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:05:37.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:05:38.286 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:05:38.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:38.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:38.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:38.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:38.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:38.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:38.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:38.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:38.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:38.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:38.585 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:43.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:43.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:43.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:43.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:43.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:43.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:43.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:43.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:43.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:43.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:43.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:43.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:43.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:43.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:43.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:43.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:43.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:43.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:43.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:43.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:43.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:43.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:43.606 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:43.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:43.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:43.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:43.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:43.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:43.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:43.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:43.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:43.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:43.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:43.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:43.611 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:43.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:43.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:44.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:44.132 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:44.133 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:44.134 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:44.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:44.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:44.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:44.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:44.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:44.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:45.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:45.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:45.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:45.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:45.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:45.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:05:46.471 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:05:46.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:46.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:46.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:46.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:46.950 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:05:47.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:05:47.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:47.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:47.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:47.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:47.910 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:05:48.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:48.388 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:05:48.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:48.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:48.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:48.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:48.866 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:05:49.344 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:05:49.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:05:50.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:05:50.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:05:51.256 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:05:51.737 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:05:52.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:52.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:52.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:52.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:52.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:52.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:52.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:52.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:52.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:52.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:52.164 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:05:57.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:05:57.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:05:57.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:57.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:57.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:57.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:57.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:05:57.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:57.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:57.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:05:57.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:57.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:05:57.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:05:57.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:57.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:05:57.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:05:57.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:57.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:05:57.174 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:05:57.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:05:57.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:05:57.175 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:05:57.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:05:57.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:05:57.665 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:05:57.699 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:05:57.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:05:57.701 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:05:57.703 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:05:58.134 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:05:58.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:58.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:58.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:58.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:58.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:05:59.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:05:59.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:05:59.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:05:59.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:05:59.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:05:59.559 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:06:00.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:06:00.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:00.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:00.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:00.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:00.518 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:06:00.999 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:06:01.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:01.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:01.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:01.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:01.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:06:01.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:01.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:01.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:01.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:01.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:01.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:01.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:01.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:01.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:01.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:01.718 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=971 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:01.718 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=972 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:06.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:06.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:06.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:06.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:06.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:06.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:06.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:06.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:06.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:06.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:06.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:06.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:06.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:06.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:06.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:06.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:06.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:06.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:06.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:06.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:06.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:06.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:06.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:06.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:06.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:06.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:06.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:06.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:06.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:06.739 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:06.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:06.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:07.227 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:07.263 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:07.264 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:07.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:07.265 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:07.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:07.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:07.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:07.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:07.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:07.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:07.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:07.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:07.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:07.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:07.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:07.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:12.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:12.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:12.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:12.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:12.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:12.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:12.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:12.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:12.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:12.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:12.295 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:12.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:12.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:12.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:12.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:12.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:12.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:12.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:12.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:12.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:12.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:12.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:12.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:12.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:12.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:12.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:12.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:12.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:12.304 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:12.304 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:12.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:12.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:12.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:12.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:12.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:12.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:12.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:12.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:12.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:12.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:12.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:12.309 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:12.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:12.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:12.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:12.836 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:12.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:12.838 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:12.841 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:12.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:12.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:12.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:12.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:12.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:12.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:12.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:12.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:12.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:12.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:12.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:12.857 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:12.857 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:17.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:17.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:17.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:17.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:17.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:17.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:17.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:17.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:17.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:17.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:17.870 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:17.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:17.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:17.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:17.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:17.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:17.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:17.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:17.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:17.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:17.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:17.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:17.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:17.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:17.877 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:17.877 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:17.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:17.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:17.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:17.880 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:17.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:17.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:18.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:18.410 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:18.412 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:18.415 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:18.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:18.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:18.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:18.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:18.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:18.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:18.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:18.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:18.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:18.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:18.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:18.432 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:18.432 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:18.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:18.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:18.433 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:23.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:23.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:23.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:23.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:23.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:23.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:23.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:23.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:23.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:23.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:23.452 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:23.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:23.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:23.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:23.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:23.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:23.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:23.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:23.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:23.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:23.459 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:23.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:23.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:23.459 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:23.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:23.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:23.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:23.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:23.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:23.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:23.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:23.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:23.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:23.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:23.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:23.464 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:23.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:23.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:23.952 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:23.990 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:23.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:23.993 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:23.995 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:24.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:24.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:24.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:06:24.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:24.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:06:24.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:06:24.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:06:24.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:06:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:06:24.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:24.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:24.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:24.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:24.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:06:25.385 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:06:25.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:25.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:25.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:25.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:25.862 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:06:26.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:06:26.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:26.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:26.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:26.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:26.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:06:27.061 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:06:27.061 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:06:27.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:27.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:27.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:27.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:27.106 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:06:27.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:27.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:27.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:27.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:27.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:27.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:27.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:27.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:27.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:27.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:27.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:27.115 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:27.115 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:32.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:32.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:32.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:32.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:32.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:32.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:32.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:32.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:32.130 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:32.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:32.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:32.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:32.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:32.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:32.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:32.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:32.136 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:32.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:32.136 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:32.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:32.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:32.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:32.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:32.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:32.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:32.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:32.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:32.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:32.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:32.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:32.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:32.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:32.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:32.145 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:32.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:32.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:32.633 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:32.672 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:32.673 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:32.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:32.674 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:32.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:06:32.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:06:32.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:06:33.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:06:33.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:33.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:33.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:06:34.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:06:34.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:34.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:34.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:34.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:34.543 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:06:35.022 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:06:35.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:35.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:35.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:35.499 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:06:35.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:06:35.742 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:06:35.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:35.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:35.977 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:06:36.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:36.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:36.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:36.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:36.455 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:06:36.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:36.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:36.467 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:06:36.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:36.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:36.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:36.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:36.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:36.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:36.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:36.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:36.476 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:36.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:06:41.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:41.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:41.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:41.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:41.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:41.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:41.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:41.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:41.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:41.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:41.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:41.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:41.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:41.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:41.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:41.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:41.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:41.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:41.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:41.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:41.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:41.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:41.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:41.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:41.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:41.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:41.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:41.507 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:41.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:41.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:41.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:41.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:42.027 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:42.028 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:42.029 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:42.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:42.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:42.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:06:42.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:42.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:06:42.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:06:42.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:06:42.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:06:42.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:06:42.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:42.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:42.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:42.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:42.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:06:43.428 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:06:43.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:43.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:43.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:43.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:43.906 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:06:44.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:06:44.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:44.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:44.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:44.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:44.861 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:06:45.043 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:06:45.044 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:06:45.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:45.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:45.339 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:06:45.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:45.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:45.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:45.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:45.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:06:46.295 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:06:46.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:46.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:46.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:46.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:46.774 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:06:47.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:06:47.730 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:06:48.208 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:06:48.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:06:49.165 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:06:49.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:06:50.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:50.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:50.047 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:06:50.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:50.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:50.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:50.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:50.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:50.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:50.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:50.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:50.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:50.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:50.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:50.066 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:06:55.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:06:55.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:06:55.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:55.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:55.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:55.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:55.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:06:55.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:55.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:55.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:06:55.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:06:55.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:06:55.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:06:55.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:55.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:55.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:06:55.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:06:55.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:06:55.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:06:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:55.088 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:06:55.088 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:06:55.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:55.088 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:55.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:06:55.089 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:06:55.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:06:55.089 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:06:55.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:55.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:55.091 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:06:55.091 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:06:55.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:06:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:06:55.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:06:55.094 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:06:55.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:06:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:06:55.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:06:55.622 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:06:55.624 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:06:55.626 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:06:55.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:06:55.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:06:55.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:06:55.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:06:55.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:55.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:06:55.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:06:55.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:06:55.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:06:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:06:56.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:56.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:56.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:56.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:56.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:06:57.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:06:57.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:57.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:57.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:57.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:57.481 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:06:57.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:06:58.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:58.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:58.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:06:58.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:06:58.683 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:06:58.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:58.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:06:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:06:59.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:06:59.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:06:59.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:06:59.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:06:59.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:06:59.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:07:00.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:00.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:00.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:00.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:00.320 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:07:00.794 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:07:01.271 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:07:01.748 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:07:02.227 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:07:02.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:07:03.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:07:03.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:07:03.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:03.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:03.687 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:07:03.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:03.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:03.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:03.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:03.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:03.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:03.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:03.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:03.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:03.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:03.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:03.706 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:03.706 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:08.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:08.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:08.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:08.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:08.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:08.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:08.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:08.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:08.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:08.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:08.721 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:08.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:07:08.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:08.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:07:08.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:08.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:07:08.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:07:08.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:08.726 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:08.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:08.726 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:07:08.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:08.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:07:08.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:08.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:08.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:08.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:07:08.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:07:08.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:07:08.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:07:08.731 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:07:08.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:07:09.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:07:09.255 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:07:09.256 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:07:09.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:09.257 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:07:09.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:09.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:09.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:07:09.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:09.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:07:09.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:07:09.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:07:09.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:07:09.697 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:07:09.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:09.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:09.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:07:10.652 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:07:10.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:10.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:10.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:10.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:11.129 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:07:11.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:07:11.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:11.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:11.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:11.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:12.085 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:07:12.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:07:12.267 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:07:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:12.562 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:07:12.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:12.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:12.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:12.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:13.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:07:13.515 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:07:13.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:13.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:13.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:13.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:13.993 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:07:14.471 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:07:14.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:07:15.427 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:07:15.905 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:07:16.383 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:07:16.861 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:07:17.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:17.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:17.270 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:07:17.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:17.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:17.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:17.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:17.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:17.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:17.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:17.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:17.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:17.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:17.289 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:17.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:17.289 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:22.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:22.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:22.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:22.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:22.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:22.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:22.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:22.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:22.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:22.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:22.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:07:22.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:07:22.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:07:22.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:22.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:22.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:22.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:07:22.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:22.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:07:22.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:22.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:22.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:07:22.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:22.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:07:22.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:22.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:07:22.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:07:22.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:07:22.318 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:07:22.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:22.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:07:22.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:07:22.842 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:07:22.843 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:07:22.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:22.845 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:07:22.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:22.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:22.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:07:22.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:22.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:07:22.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:07:22.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:07:22.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:07:22.896 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:07:22.896 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:07:22.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:22.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:23.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:07:23.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:23.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:23.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:23.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:07:24.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:07:24.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:24.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:24.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:24.707 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:07:25.184 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:07:25.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:25.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:25.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:25.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:25.662 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:07:26.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:07:26.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:26.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:26.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:26.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:26.618 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:07:27.096 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:07:27.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:27.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:27.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:27.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:07:27.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:27.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:27.899 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:07:27.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:27.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:27.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:27.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:27.911 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:27.911 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:32.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:32.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:32.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:32.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:32.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:32.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:32.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:32.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:32.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:32.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:32.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:07:32.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:07:32.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:07:32.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:32.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:32.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:32.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:07:32.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:32.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:07:32.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:32.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:32.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:07:32.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:32.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:32.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:07:32.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:07:32.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:07:32.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:07:32.929 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:07:32.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:32.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:07:33.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:07:33.448 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:07:33.449 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:07:33.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:33.450 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:07:33.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:33.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:33.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:07:33.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:33.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:07:33.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:07:33.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:07:33.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:07:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:07:33.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:33.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:33.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:33.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:07:34.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:07:34.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:34.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:34.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:35.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:07:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:07:35.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:35.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:35.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:35.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:36.281 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:07:36.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:07:36.464 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:07:36.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:36.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:36.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:07:36.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:36.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:36.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:36.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:07:37.714 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:07:37.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:37.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:37.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:37.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:38.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:07:38.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:38.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:38.466 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:07:38.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:38.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:38.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:38.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:38.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:38.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:38.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:38.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:38.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:38.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:38.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:38.474 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:43.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:43.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:43.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:43.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:43.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:43.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:43.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:43.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:43.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:43.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:43.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:07:43.485 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:07:43.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:07:43.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:43.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:43.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:07:43.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:43.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:07:43.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:43.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:43.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:07:43.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:43.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:07:43.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:07:43.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:43.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:43.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:43.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:07:43.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:43.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:07:43.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:07:43.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:07:43.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:07:43.494 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:07:43.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:43.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:07:43.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:07:44.017 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:07:44.018 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:07:44.019 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:07:44.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:44.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:44.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:44.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:07:44.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:44.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:07:44.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:07:44.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:07:44.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:07:44.460 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:07:44.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:44.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:44.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:44.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:44.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:07:45.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:07:45.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:45.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:45.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:45.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:07:46.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:07:46.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:46.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:46.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:46.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:46.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:07:47.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:47.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:47.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:47.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:47.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:47.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:47.152 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:47.153 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:07:52.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:52.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:52.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:52.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:52.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:52.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:52.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:52.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:52.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:52.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:07:52.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:07:52.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:07:52.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:07:52.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:52.168 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:52.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:52.169 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:07:52.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:07:52.169 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:07:52.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:52.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:07:52.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:07:52.171 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:07:52.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:52.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:07:52.174 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:07:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:52.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:07:52.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:07:52.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:07:52.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:07:52.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:07:52.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:07:52.177 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:07:52.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:07:52.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:07:52.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:07:52.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:07:52.699 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:07:52.700 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:07:52.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:52.703 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:07:52.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:52.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:52.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:07:52.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:07:52.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:07:52.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:07:52.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:07:52.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:07:53.143 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:07:53.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:53.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:53.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:53.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:53.615 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:07:54.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:07:54.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:54.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:54.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:54.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:07:55.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:07:55.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:55.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:55.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:55.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:55.503 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:07:55.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:07:55.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:07:55.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:07:55.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:07:55.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:07:55.826 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:07:55.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:00.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:00.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:00.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:00.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:00.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:00.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:00.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:00.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:00.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:00.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:00.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:00.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:00.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:00.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:00.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:00.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:00.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:00.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:00.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:00.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:00.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:00.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:00.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:00.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:00.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:00.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:00.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:00.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:00.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:00.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:00.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:00.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:00.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:00.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:00.857 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:00.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:00.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:01.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:01.388 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:01.391 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:01.393 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:01.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:01.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:08:01.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:01.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:08:01.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:08:01.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:08:01.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:08:01.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:01.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:01.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:01.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:01.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:01.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:01.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:01.668 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:01.668 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:01.669 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:06.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:06.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:06.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:06.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:06.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:06.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:06.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:06.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:06.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:06.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:06.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:06.684 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:06.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:06.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:06.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:06.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:06.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:06.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:06.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:06.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:06.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:06.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:06.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:06.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:06.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:06.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:06.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:06.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:06.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:06.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:06.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:06.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:06.692 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:06.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:06.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:06.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:07.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:07.213 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:07.214 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:07.215 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:07.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:07.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:07.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:08:07.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:07.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:08:07.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:08:07.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:08:07.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:08:07.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:07.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:07.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:07.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:07.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:07.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:07.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:07.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:07.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:07.271 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:07.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:12.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:12.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:12.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:12.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:12.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:12.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:12.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:12.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:12.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:12.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:12.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:12.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:12.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:12.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:12.284 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:12.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:12.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:12.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:12.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:12.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:12.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:12.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:12.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:12.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:12.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:12.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:12.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:12.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:12.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:12.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:12.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:12.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:12.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:12.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:12.293 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:12.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:12.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:12.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:12.822 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:12.824 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:12.825 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:12.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:12.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:12.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:12.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:08:12.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:12.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:08:12.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:08:12.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:08:12.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:08:13.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:08:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:13.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:13.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:08:14.206 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:08:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:14.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:14.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:14.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:08:15.161 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:08:15.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:15.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:15.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:15.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:08:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:08:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:16.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:16.594 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:08:17.072 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:08:17.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:17.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:17.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:17.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:17.549 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:08:18.028 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:08:18.505 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:08:18.983 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:08:19.462 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:08:19.939 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:08:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:08:20.894 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:08:21.372 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:08:21.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:21.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:21.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:21.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:21.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:21.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:21.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:21.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:21.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:21.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:21.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:21.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:21.739 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:21.739 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2019 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:26.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:26.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:26.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:26.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:26.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:26.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:26.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:26.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:26.754 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:26.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:26.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:26.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:26.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:26.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:26.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:26.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:26.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:26.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:26.761 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:26.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:26.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:26.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:26.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:26.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:26.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:26.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:26.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:26.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:26.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:26.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:26.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:26.768 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:26.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:26.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:27.295 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:27.296 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:27.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:27.297 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:27.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:08:27.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:08:27.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:08:27.733 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:08:27.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:27.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:27.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:27.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:28.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:08:28.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:08:28.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:28.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:28.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:29.165 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:08:29.644 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:08:29.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:29.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:29.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:29.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:30.122 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:08:30.600 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:08:30.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:30.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:30.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:30.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:31.078 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:08:31.555 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:08:31.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:31.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:31.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:31.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:32.033 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:08:32.510 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:08:32.988 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:08:33.466 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:08:33.944 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:08:34.422 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:08:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:08:35.381 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:08:35.859 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:08:36.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:36.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:36.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:36.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:36.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:36.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:36.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:36.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:36.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:36.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:36.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:36.209 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:36.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:36.209 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:41.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:41.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:41.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:41.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:41.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:41.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:41.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:41.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:41.215 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:41.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:41.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:41.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:41.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:41.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:41.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:41.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:41.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:41.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:41.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:41.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:41.219 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:41.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:41.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:41.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:41.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:41.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:41.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:41.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:41.221 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:41.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:41.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:41.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:41.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:41.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:41.225 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:41.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:41.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:41.754 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:41.756 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:41.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:41.758 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:41.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:41.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:41.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:08:41.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:41.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:08:41.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:08:41.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:08:41.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:08:42.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:08:42.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:42.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:42.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:42.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:42.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:08:43.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:08:43.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:43.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:43.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:43.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:43.624 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:08:44.102 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:08:44.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:44.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:44.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:08:44.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:08:44.815 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-03-11 03:08:44.815 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:44.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:44.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:08:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:08:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:45.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:45.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:45.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:45.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:08:45.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:08:45.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:08:45.851 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:08:45.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:45.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:45.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:45.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:45.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:45.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:45.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:45.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:45.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:45.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:45.860 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:45.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:45.860 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:50.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:50.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:50.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:50.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:50.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:50.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:50.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:50.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:50.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:50.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:50.875 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:50.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:50.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:50.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:50.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:50.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:50.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:50.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:50.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:50.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:50.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:50.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:50.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:50.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:50.887 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:50.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:50.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:51.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:51.421 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:51.423 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:51.424 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:51.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:51.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:51.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:51.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:51.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:51.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:51.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:51.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:51.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:51.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:51.483 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:51.484 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:08:56.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:08:56.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:08:56.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:56.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:56.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:56.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:56.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:08:56.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:56.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:56.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:08:56.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:08:56.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:08:56.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:08:56.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:56.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:56.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:08:56.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:08:56.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:08:56.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:08:56.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:56.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:08:56.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:08:56.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:56.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:56.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:08:56.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:08:56.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:08:56.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:08:56.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:56.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:08:56.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:08:56.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:08:56.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:08:56.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:08:56.509 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:08:56.509 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:08:56.514 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:08:56.996 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:08:57.037 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:08:57.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:08:57.039 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:08:57.042 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:08:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:08:57.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:57.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:57.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:57.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:57.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:08:58.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:08:58.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:58.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:58.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:58.887 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:08:59.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:08:59.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:08:59.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:08:59.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:08:59.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:08:59.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:09:00.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:09:00.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:00.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:00.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:00.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:00.782 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:09:01.260 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:09:01.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:01.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:01.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:01.738 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:09:02.216 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:09:02.697 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:09:03.177 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:09:03.647 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:09:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:09:04.587 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:09:05.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:09:05.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:09:05.999 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:09:06.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:06.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:06.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:06.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:06.087 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:06.087 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2061 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:11.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:11.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:11.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:11.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:11.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:11.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:11.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:11.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:11.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:11.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:11.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:11.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:11.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:11.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:11.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:11.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:11.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:11.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:11.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:11.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:11.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:11.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:11.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:11.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:11.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:11.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:11.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:11.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:11.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:11.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:11.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:11.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:11.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:11.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:11.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:11.129 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:11.130 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:11.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:11.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:11.657 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:11.658 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:11.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:11.659 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:12.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:09:12.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:12.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:12.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:12.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:12.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:09:13.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:09:13.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:13.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:13.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:13.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:13.515 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:09:13.993 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:09:14.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:14.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:14.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:14.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:14.471 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:09:14.949 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:09:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:15.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:15.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:09:15.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:09:16.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:16.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:16.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:16.386 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:09:16.864 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:09:17.343 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:09:17.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:09:18.297 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:09:18.778 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:09:19.259 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:09:19.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:09:20.216 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:09:20.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:20.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:20.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:20.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:20.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:20.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:20.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:20.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:20.680 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:20.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:20.680 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:20.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:20.680 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2040 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:25.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:25.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:25.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:25.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:25.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:25.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:25.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:25.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:25.693 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:25.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:25.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:25.696 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:25.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:25.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:25.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:25.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:25.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:25.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:25.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:25.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:25.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:25.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:25.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:25.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:25.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:25.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:25.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:25.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:25.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:25.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:25.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:25.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:25.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:25.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:25.703 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:25.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:25.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:25.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:25.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:26.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:26.229 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:26.230 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:26.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:26.231 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:26.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:09:26.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:26.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:26.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:26.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:27.129 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:09:27.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:09:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:27.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:27.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:28.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:09:28.561 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:09:28.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:28.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:29.040 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:09:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:29.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:29.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:29.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:29.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:29.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:29.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:29.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:29.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:29.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:29.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:29.267 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=764 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:29.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=765 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:34.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:34.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:34.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:34.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:34.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:34.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:34.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:34.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:34.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:34.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:34.280 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:34.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:34.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:34.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:34.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:34.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:34.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:34.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:34.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:34.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:34.290 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:34.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:34.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:34.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:34.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:34.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:34.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:34.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:34.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:34.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:34.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:34.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:34.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:34.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:34.299 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:34.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:34.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:34.830 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:34.832 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:34.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:34.835 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:34.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:09:34.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:09:34.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:09:34.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:09:34.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:09:34.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:09:34.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:09:34.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:09:34.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:34.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:09:34.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:09:34.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:09:34.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:09:35.262 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:09:35.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:35.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:09:35.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:09:35.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:09:35.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:35.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:35.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:35.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:35.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:35.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:35.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:35.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:35.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:35.281 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:35.282 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.282 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.282 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.282 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:35.283 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:40.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:40.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:40.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:40.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:40.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:40.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:40.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:40.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:40.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:40.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:40.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:40.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:40.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:40.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:40.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:40.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:40.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:40.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:40.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:40.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:40.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:40.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:40.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:40.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:40.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:40.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:40.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:40.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:40.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:40.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:40.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:40.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:40.307 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:40.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:40.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:40.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:40.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:40.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:40.826 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:40.827 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:40.828 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:40.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:40.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:40.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:40.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:40.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:40.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:40.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:40.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:40.836 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:45.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:45.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:45.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:45.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:45.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:45.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:45.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:45.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:45.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:45.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:45.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:45.862 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:45.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:45.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:45.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:45.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:45.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:45.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:45.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:45.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:45.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:45.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:45.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:45.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:45.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:45.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:45.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:45.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:45.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:45.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:45.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:45.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:45.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:45.871 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:45.872 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:45.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:46.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:46.393 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:46.394 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:46.396 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:46.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:09:46.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:46.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:46.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:46.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:47.322 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:09:47.803 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:09:47.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:47.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:47.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:47.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:48.282 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:09:48.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:48.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:48.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:48.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:48.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:48.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:48.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:48.416 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:09:48.416 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:48.416 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:48.416 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:48.416 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:48.416 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:09:53.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:53.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:53.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:53.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:53.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:53.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:53.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:53.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:53.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:53.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:09:53.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:53.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:09:53.421 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:09:53.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:53.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:09:53.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:09:53.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:53.423 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:09:53.423 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:09:53.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:53.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:09:53.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:53.424 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:09:53.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:09:53.424 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:09:53.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:09:53.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:09:53.426 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:09:53.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:09:53.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:09:53.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:09:53.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:09:53.950 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:09:53.954 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:09:53.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:09:53.956 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:09:53.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:09:53.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:09:53.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:09:53.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:09:53.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:09:53.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:09:53.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:09:53.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:09:54.380 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:09:54.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:54.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:54.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:54.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:54.854 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:09:55.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:09:55.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:55.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:55.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:55.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:55.799 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:09:56.272 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:09:56.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:56.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:56.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:56.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:56.745 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:09:56.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:09:56.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:09:56.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:09:56.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:09:56.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:09:56.759 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:01.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:01.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:01.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:01.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:01.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:01.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:01.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:01.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:01.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:01.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:01.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:01.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:01.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:01.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:01.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:01.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:01.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:01.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:01.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:01.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:01.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:01.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:01.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:01.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:01.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:01.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:01.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:01.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:01.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:01.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:01.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:01.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:01.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:01.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:01.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:01.783 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:01.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:01.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:02.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:02.304 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:02.305 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:02.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:02.305 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:02.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:10:02.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:10:02.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:10:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:02.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:02.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:02.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:02.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:03.214 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:03.686 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:03.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:03.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:03.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:03.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:04.158 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:04.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:04.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:04.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:04.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:04.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:04.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:04.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:04.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:04.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:04.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:04.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:04.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:04.418 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:04.418 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:04.418 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:04.418 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:04.418 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:04.418 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:09.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:09.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:09.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:09.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:09.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:09.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:09.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:09.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:09.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:09.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:09.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:09.428 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:09.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:09.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:09.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:09.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:09.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:09.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:09.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:09.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:09.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:09.432 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:09.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:09.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:09.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:09.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:09.944 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:09.945 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:09.945 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:09.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:09.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:10:09.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:10:09.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:10:10.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:10.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:10.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:10.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:10.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:10.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:11.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:11.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:11.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:11.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:11.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:12.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:10:12.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:12.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:12.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:12.757 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:10:12.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:12.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:12.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:12.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:12.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:12.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:12.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:12.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:12.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:12.780 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:12.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:12.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:17.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:17.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:17.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:17.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:17.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:17.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:17.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:17.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:17.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:17.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:17.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:17.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:17.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:17.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:17.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:17.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:17.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:17.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:17.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:17.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:17.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:17.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:17.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:17.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:17.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:17.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:17.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:17.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:17.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:17.810 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:17.810 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:17.810 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:17.810 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:17.810 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:17.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:17.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:17.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:17.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:17.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:17.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:17.814 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:17.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:17.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:18.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:18.346 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:18.348 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:18.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:18.350 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:18.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:18.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:18.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:18.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:10:18.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:10:18.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:10:18.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:10:18.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:10:18.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:18.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:18.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:18.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:18.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:19.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:19.731 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:19.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:19.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:19.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:19.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:20.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:20.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:20.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:20.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:20.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:20.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:20.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:20.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:20.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:20.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:20.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:20.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:20.474 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:20.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:20.474 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:25.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:25.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:25.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:25.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:25.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:25.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:25.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:25.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:25.489 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:25.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:25.490 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:25.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:25.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:25.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:25.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:25.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:25.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:25.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:25.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:25.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:25.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:25.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:25.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:25.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:25.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:25.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:25.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:25.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:25.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:25.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:25.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:25.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:25.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:25.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:25.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:25.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:25.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:25.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:25.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:25.505 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:25.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:25.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:25.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:26.025 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:26.026 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:26.027 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:26.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:26.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:26.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:26.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:26.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:10:26.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:10:26.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:10:26.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:10:26.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:10:26.471 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:26.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:26.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:26.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:26.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:26.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:27.426 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:27.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:27.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:27.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:27.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:27.903 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:28.380 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:10:28.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:28.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:28.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:28.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:28.858 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:10:29.336 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:10:29.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:29.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:29.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:29.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:10:29.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:29.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:29.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:29.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:29.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:29.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:29.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:29.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:29.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:29.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:29.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:29.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:29.837 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:29.837 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:34.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:34.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:34.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:34.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:34.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:34.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:34.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:34.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:34.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:34.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:34.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:34.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:34.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:34.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:34.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:34.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:34.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:34.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:34.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:34.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:34.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:34.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:34.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:34.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:34.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:34.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:34.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:34.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:34.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:34.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:34.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:34.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:34.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:34.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:34.871 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:34.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:35.361 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:35.406 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:35.408 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:35.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:35.411 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:35.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:35.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:35.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:35.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:10:35.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:10:35.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:10:35.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:10:35.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:10:35.836 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:35.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:35.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:35.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:35.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:36.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:36.787 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:36.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:36.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:36.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:36.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:37.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:37.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:10:37.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:37.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:37.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:37.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:38.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:10:38.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:10:38.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:38.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:38.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:38.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:39.153 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:10:39.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:39.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:39.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:39.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:39.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:39.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:39.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:39.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:39.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:39.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:39.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:39.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:39.412 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:39.412 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=976 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:44.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:44.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:44.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:44.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:44.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:44.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:44.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:44.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:44.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:44.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:44.425 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:44.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:44.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:44.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:44.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:44.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:44.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:44.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:44.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:44.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:44.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:44.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:44.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:44.432 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:44.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:44.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:44.435 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:44.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:44.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:44.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:44.922 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:44.955 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:44.956 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:44.957 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:45.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:45.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:45.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:45.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:45.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:45.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:46.357 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:46.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:46.837 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:46.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:46.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:46.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:46.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:46.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:46.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:46.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:46.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:46.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:46.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:46.972 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=540 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.975 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:46.975 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=541 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:51.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:51.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:51.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:51.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:51.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:51.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:51.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:51.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:51.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:51.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:10:51.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:10:51.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:10:51.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:10:51.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:51.989 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:51.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:51.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:10:51.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:10:51.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:10:51.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:51.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:51.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:10:51.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:10:51.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:51.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:10:51.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:10:51.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:51.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:10:51.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:51.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:10:51.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:10:51.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:10:51.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:10:51.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:10:51.998 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:10:51.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:10:51.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:51.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:52.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:10:52.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:10:52.518 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:10:52.520 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:10:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:52.522 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:10:52.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:10:52.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:10:52.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:10:52.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:10:52.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:52.954 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:10:53.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:53.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:53.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:53.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:53.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:10:53.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:10:54.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:54.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:54.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:54.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:54.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:10:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:10:55.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:55.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:55.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:55.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:55.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:10:55.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:10:55.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:10:55.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:10:55.566 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:10:55.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:10:55.567 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:00.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:00.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:00.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:00.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:00.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:00.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:00.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:00.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:00.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:00.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:00.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:00.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:00.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:00.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:00.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:00.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:00.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:00.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:00.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:00.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:00.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:00.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:00.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:00.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:00.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:00.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:00.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:00.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:00.593 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:00.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:00.593 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:00.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:00.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:00.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:00.596 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:00.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:00.601 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:01.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:01.126 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:01.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:01.129 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:01.132 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:01.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:01.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:01.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:01.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:01.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:01.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:01.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:01.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:01.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:01.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:01.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:01.177 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:01.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:01.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:01.177 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:01.178 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:06.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:06.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:06.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:06.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:06.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:06.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:06.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:06.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:06.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:06.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:06.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:06.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:06.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:06.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:06.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:06.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:06.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:06.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:06.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:06.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:06.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:06.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:06.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:06.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:06.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:06.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:06.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:06.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:06.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:06.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:06.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:06.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:06.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:06.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:06.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:06.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:06.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:06.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:06.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:06.207 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:06.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:06.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:06.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:06.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:06.731 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:06.732 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:06.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:06.734 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:06.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:06.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:06.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:06.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:06.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:07.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:11:07.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:07.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:07.634 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:11:08.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:11:08.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:08.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:08.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:11:09.040 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:11:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:09.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:09.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:09.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:11:09.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:09.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:09.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:09.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:09.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:09.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:09.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:09.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:09.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:09.770 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:09.770 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:14.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:14.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:14.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:14.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:14.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:14.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:14.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:14.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:14.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:14.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:14.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:14.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:14.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:14.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:14.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:14.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:14.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:14.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:14.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:14.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:14.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:14.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:14.786 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:14.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:14.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:14.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:15.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:15.303 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:15.303 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:15.303 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:15.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:15.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:15.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:15.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:15.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:15.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:15.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:15.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:15.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:15.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:15.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:15.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:15.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:15.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:15.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:15.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:15.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:15.339 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:15.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:15.339 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:20.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:20.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:20.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:20.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:20.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:20.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:20.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:20.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:20.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:20.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:20.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:20.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:20.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:20.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:20.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:20.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:20.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:20.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:20.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:20.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:20.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:20.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:20.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:20.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:20.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:20.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:20.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:20.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:20.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:20.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:20.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:20.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:20.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:20.366 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:20.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:20.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:20.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:20.893 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:20.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:20.897 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:20.900 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:20.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:20.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:20.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:20.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:20.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:20.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:20.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:20.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:20.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:20.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:20.917 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:20.917 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:25.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:25.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:25.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:25.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:25.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:25.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:25.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:25.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:25.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:25.943 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:25.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:25.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:25.944 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:25.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:25.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:25.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:25.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:25.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:25.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:25.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:25.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:25.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:25.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:25.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:25.949 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:25.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:25.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:25.954 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:26.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:26.472 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:26.473 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:26.474 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:26.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:26.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:26.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:26.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:26.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:26.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:26.485 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:26.485 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:26.486 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:31.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:31.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:31.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:31.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:31.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:31.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:31.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:31.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:31.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:31.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:31.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:31.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:31.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:31.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:31.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:31.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:31.508 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:31.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:31.508 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:31.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:31.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:31.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:31.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:31.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:31.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:31.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:31.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:31.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:31.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:31.512 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:31.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:31.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:31.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:31.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:31.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:31.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:31.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:31.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:31.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:31.516 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:31.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:32.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:32.035 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:32.036 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:32.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:32.037 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:32.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:32.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:32.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:32.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:32.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:32.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:32.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:32.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:32.046 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:32.047 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:37.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:37.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:37.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:37.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:37.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:37.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:37.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:37.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:37.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:37.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:37.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:37.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:37.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:37.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:37.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:37.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:37.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:37.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:37.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:37.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:37.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:37.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:37.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:37.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:37.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:37.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:37.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:37.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:37.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:37.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:37.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:37.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:37.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:37.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:37.068 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:37.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:37.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:37.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:37.590 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:37.591 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:37.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:37.593 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:37.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:37.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:37.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:37.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:37.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:37.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:37.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:37.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:37.604 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:37.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:37.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.604 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.605 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.605 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:37.605 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:42.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:42.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:42.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:42.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:42.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:42.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:42.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:42.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:42.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:42.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:42.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:42.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:42.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:42.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:42.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:42.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:42.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:42.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:42.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:42.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:42.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:42.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:42.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:42.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:42.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:42.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:42.625 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:42.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:43.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:43.150 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:43.153 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:43.155 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:43.594 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:11:43.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:43.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:43.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:43.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:44.073 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:11:44.552 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:11:44.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:44.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:44.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:44.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:45.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:11:45.511 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:11:45.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:45.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:45.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:45.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:45.991 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:11:46.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:46.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:46.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:46.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:11:46.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:11:46.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:11:46.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:11:46.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:11:46.469 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:11:46.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:46.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:46.947 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:11:47.425 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:11:47.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:47.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:47.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:47.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:47.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:11:48.381 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:11:48.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:48.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:48.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:48.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:48.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:48.509 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:53.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:53.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:53.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:53.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:53.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:53.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:53.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:53.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:53.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:53.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:53.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:53.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:53.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:53.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:53.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:53.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:53.530 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:53.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:53.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:53.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:53.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:53.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:53.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:53.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:53.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:53.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:53.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:53.534 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:53.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:53.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:53.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:53.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:53.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:53.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:53.538 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:53.538 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:53.543 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:54.026 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:54.059 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:54.060 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:54.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:54.062 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:54.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:54.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:54.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:54.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:54.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:54.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:54.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:54.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:54.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:54.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:54.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:54.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:54.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:54.105 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.106 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:54.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:59.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:59.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:59.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:59.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:59.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:59.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:59.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:59.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:59.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:11:59.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:11:59.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:11:59.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:11:59.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:59.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:59.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:59.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:11:59.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:11:59.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:11:59.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:59.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:11:59.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:11:59.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:59.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:59.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:59.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:11:59.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:11:59.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:11:59.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:59.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:11:59.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:11:59.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:59.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:11:59.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:59.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:11:59.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:11:59.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:11:59.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:11:59.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:11:59.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:11:59.154 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:11:59.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:11:59.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:11:59.685 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:11:59.687 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:11:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:59.689 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:11:59.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:11:59.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:11:59.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:11:59.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:11:59.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:11:59.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:11:59.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:11:59.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:11:59.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:11:59.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:11:59.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:11:59.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:11:59.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:11:59.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:11:59.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:11:59.728 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:11:59.728 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:04.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:04.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:04.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:04.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:04.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:04.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:04.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:04.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:04.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:04.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:04.740 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:04.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:04.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:04.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:04.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:04.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:04.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:04.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:04.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:04.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:04.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:04.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:04.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:04.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:04.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:04.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:04.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:04.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:04.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:04.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:04.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:04.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:04.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:04.753 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:04.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:04.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:05.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:05.284 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:05.286 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:05.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:05.288 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:05.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:05.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:05.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:05.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:05.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:05.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:05.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:05.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:05.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:05.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:05.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:05.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:05.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:05.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:05.336 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:05.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:05.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:05.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:10.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:10.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:10.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:10.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:10.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:10.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:10.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:10.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:10.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:10.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:10.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:10.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:10.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:10.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:10.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:10.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:10.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:10.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:10.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:10.352 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:10.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:10.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:10.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:10.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:10.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:10.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:10.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:10.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:10.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:10.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:10.358 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:10.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:10.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:10.891 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:10.894 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:10.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.896 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:10.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:10.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:10.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:10.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:10.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:10.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:10.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:10.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:10.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:10.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:10.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:10.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:10.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:10.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:10.957 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:10.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.957 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:10.958 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:15.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:15.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:15.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:15.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:15.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:15.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:15.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:15.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:15.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:15.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:15.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:15.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:15.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:15.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:15.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:15.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:15.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:15.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:15.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:15.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:15.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:15.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:15.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:15.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:15.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:15.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:15.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:15.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:15.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:15.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:15.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:15.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:15.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:15.984 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:15.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:15.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:15.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:15.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:16.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:16.505 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:16.506 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:16.508 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:16.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:16.509 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 03:12:16.509 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 200
2026-03-11 03:12:16.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 03:12:16.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:16.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:16.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:12:17.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:17.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:17.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:17.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:17.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:17.410 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:12:17.886 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:12:17.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:18.142 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 03:12:18.142 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 0
2026-03-11 03:12:18.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 03:12:18.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:18.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:18.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:18.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:18.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:18.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:18.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:18.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:18.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:18.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:18.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:18.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:18.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:18.151 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:18.151 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.151 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.151 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.152 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.152 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.152 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:18.152 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:23.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:23.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:23.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:23.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:23.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:23.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:23.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:23.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:23.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:23.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:23.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:23.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:23.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:23.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:23.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:23.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:23.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:23.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:23.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:23.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:23.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:23.175 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:23.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:23.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:23.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:23.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:23.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:23.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:23.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:23.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:23.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:23.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:23.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:23.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:23.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:23.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:23.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:23.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:23.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:23.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:23.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:23.182 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:23.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:23.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:23.712 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:23.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:23.715 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:23.719 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:23.722 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 03:12:23.722 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 200
2026-03-11 03:12:23.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 03:12:23.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:24.149 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:12:24.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:24.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:24.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:24.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:24.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:12:24.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:24.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.106 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:12:25.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.360 [DEBUG] fake_trx.py:382 (BTS@172.18.204.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-03-11 03:12:25.361 [INFO] fake_trx.py:385 (BTS@172.18.204.20:5700) Artificial TRXC delay set to 0
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:25.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:25.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:25.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:25.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:25.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:25.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:25.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:25.371 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:25.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:25.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:25.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:25.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:25.371 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:30.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:30.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:30.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:30.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:30.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:30.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:30.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:30.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:30.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:30.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:30.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:30.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:30.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:30.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:30.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:30.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:30.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:30.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:30.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:30.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:30.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:30.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:30.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:30.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:30.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:30.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:30.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:30.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:30.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:30.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:30.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:30.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:30.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:30.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:30.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:30.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:30.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.400 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:30.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:30.401 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:30.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:30.928 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:30.930 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:30.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:30.933 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:30.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:30.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:30.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:30.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:30.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:30.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:30.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:30.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:30.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:30.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:30.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:30.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:30.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:30.974 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:30.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.974 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.975 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:30.975 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:35.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:35.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:35.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:35.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:35.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:35.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:35.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:35.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:35.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:35.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:35.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:35.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:35.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:35.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:35.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:35.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:35.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:35.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:35.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:35.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:35.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:35.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:35.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:35.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:35.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:35.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:35.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:35.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:35.997 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:35.997 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:35.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:36.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:36.001 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:36.001 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:36.001 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:36.006 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:36.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:36.525 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:36.527 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:36.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:36.530 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:36.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:36.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:36.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:36.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:36.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:36.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:36.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:36.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:36.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:36.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:36.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:36.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:36.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:36.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:36.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:36.570 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:36.571 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:12:41.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:12:41.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:12:41.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:41.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:41.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:41.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:41.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:12:41.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:41.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:41.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:12:41.581 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:12:41.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:12:41.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:12:41.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:41.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:41.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:12:41.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:12:41.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:12:41.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:12:41.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:41.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:12:41.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:12:41.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:41.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:41.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:12:41.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:12:41.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:12:41.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:12:41.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:41.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:41.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:12:41.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:12:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:12:41.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:12:41.596 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:12:41.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:12:41.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:12:41.601 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:12:42.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:12:42.125 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:12:42.127 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:12:42.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:42.129 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:12:42.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:42.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:42.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:42.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:42.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:42.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:42.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:42.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:42.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:42.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:42.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:42.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:42.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:42.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:42.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:42.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:42.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:42.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:42.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:42.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:42.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:42.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:42.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:42.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:12:42.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:42.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:42.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:42.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:43.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:12:43.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:12:43.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:43.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:43.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:43.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:43.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:12:44.470 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:12:44.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:44.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:44.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:44.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:44.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:12:45.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:45.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:45.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:45.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:45.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:45.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:45.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:45.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:45.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:45.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:45.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:45.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:45.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:45.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:45.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:45.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:12:45.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:45.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:45.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:45.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:45.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:45.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:45.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:45.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:45.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:45.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:45.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:45.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:45.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:45.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:12:46.379 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:12:46.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:12:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:12:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:12:46.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:12:46.857 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:12:47.335 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:12:47.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:12:48.292 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:12:48.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:48.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:48.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:48.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:48.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:48.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:48.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:48.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:48.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:48.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:48.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:48.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:48.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:48.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:48.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:48.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:48.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:12:49.246 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:12:49.724 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:12:50.202 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:12:50.680 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:12:51.158 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:12:51.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:51.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:51.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:51.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:51.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:51.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:51.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:51.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:51.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:51.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:51.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:51.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:51.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:51.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:51.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:51.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:51.635 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:12:51.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:51.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:51.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:51.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:51.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:51.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:51.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:51.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:51.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.112 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:12:52.590 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:12:52.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:52.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:52.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:52.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:52.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:52.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:52.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:52.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:52.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:52.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:52.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:52.824 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:12:52.824 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:12:52.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:52.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:52.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:52.896 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:12:52.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:52.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:52.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:52.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:52.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:52.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:52.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:52.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:52.916 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:12:52.916 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:12:52.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:52.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:53.067 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:12:53.541 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:12:54.010 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:12:54.480 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:12:54.950 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:12:55.421 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:12:55.892 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:12:55.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:55.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:55.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:55.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:55.922 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:12:55.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:55.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:55.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:55.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:55.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:55.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:55.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:55.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:56.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:56.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:12:56.039 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:12:56.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:56.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:56.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:56.098 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:12:56.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:56.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:56.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:56.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:56.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:56.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:56.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:56.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:56.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:12:56.125 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:12:56.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:56.367 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:12:56.846 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:12:57.325 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:12:57.804 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:12:58.283 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:12:58.761 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:59.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:59.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:59.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:59.133 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:12:59.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:12:59.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:12:59.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:12:59.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:59.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:12:59.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:12:59.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:12:59.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:12:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:12:59.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:12:59.191 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:12:59.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:59.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:12:59.238 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:12:59.707 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:13:00.177 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:13:00.647 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:13:01.118 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:13:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:13:02.059 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:13:02.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:02.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:02.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:02.199 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:02.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:02.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:02.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:02.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:02.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:02.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:02.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:02.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:02.249 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:02.249 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:02.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:02.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:02.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:02.349 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:02.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:02.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:02.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:02.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:02.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:02.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:02.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:02.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:02.388 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:02.388 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:02.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:02.533 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:13:03.012 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:13:03.490 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:13:03.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:03.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:03.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:03.672 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:03.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:03.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:03.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:03.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:03.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:03.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:03.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:03.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:03.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:03.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:03.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:03.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:03.966 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:13:03.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:03.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:03.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:03.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:03.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:03.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:03.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:03.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:04.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:04.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:04.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:04.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:04.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:04.442 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:13:04.919 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:13:05.397 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:13:05.874 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:13:06.352 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:13:06.829 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:13:07.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:07.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:07.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:07.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:07.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:07.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:07.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:07.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:07.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:07.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:07.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:07.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:07.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:07.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:07.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:07.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:07.305 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:13:07.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:07.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:07.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:07.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:07.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:07.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:07.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:07.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:07.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:07.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:07.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:07.782 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:13:08.260 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:13:08.737 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:13:09.216 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:13:09.693 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:13:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:13:10.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:10.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:10.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:10.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:10.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:10.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:10.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:10.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:10.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:10.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:10.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:10.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:10.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:10.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:10.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:10.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:10.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:10.648 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:13:11.126 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:13:11.604 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:13:12.081 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:13:12.559 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:13:13.037 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:13:13.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:13.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:13.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:13.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:13.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:13.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:13.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:13.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:13.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:13.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:13.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:13.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:13.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:13.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:13.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:13.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:13.514 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:13:13.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:13.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:13.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:13.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:13.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:13.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:13.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:13.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:13.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:13.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:13.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:13.991 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:13:14.468 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:13:14.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:14.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:14.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:14.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:14.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:14.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:14.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:14.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:14.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:14.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:14.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:14.570 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:14.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:14.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:14.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:14.627 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:14.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:14.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:14.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:14.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:14.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:14.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:14.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:14.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:14.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:14.651 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:14.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:14.946 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:13:15.425 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:13:15.902 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:13:16.377 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:13:16.846 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:13:17.319 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:13:17.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:17.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:17.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:17.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:17.659 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:17.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:17.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:17.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:17.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:17.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:17.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:17.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:17.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:17.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:17.687 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:17.687 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:17.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:17.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:17.794 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:13:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:18.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:18.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:18.187 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:18.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:18.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:18.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:18.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:18.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:18.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:18.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:18.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:18.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:18.215 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:18.215 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:18.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:18.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:13:18.741 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:13:19.218 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:13:19.696 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:13:20.174 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:13:20.652 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:13:21.130 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:13:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:21.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:21.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:21.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:21.223 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:21.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:21.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:21.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:21.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:21.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:21.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:21.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:21.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:21.275 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:21.275 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:21.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:21.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:21.608 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:13:22.086 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:13:22.564 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:13:23.041 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:13:23.518 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:13:23.996 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 03:13:24.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:24.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:24.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:24.283 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:24.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:24.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:24.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:24.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:24.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:24.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:24.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:24.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:24.328 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:24.328 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:24.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:24.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:24.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:24.391 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:24.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:24.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:24.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:24.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:24.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:24.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:24.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:24.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:24.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:24.415 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:24.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:24.474 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 03:13:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 03:13:25.430 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 03:13:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 03:13:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:26.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:26.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:26.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:26.368 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:26.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:26.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:26.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:26.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:26.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:26.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:26.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:26.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:26.385 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:13:26.385 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:26.385 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:26.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:26.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:26.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:26.386 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=9591 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:31.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:31.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:31.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:31.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:31.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:31.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:31.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:31.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:31.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:31.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:31.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:13:31.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:13:31.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:13:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:31.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:31.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:31.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:13:31.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:31.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:13:31.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:31.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:31.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:31.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:13:31.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:31.403 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:13:31.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:13:31.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:31.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:31.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:31.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:13:31.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:31.404 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:13:31.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:13:31.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:13:31.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:13:31.407 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:13:31.407 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:31.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:13:31.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:13:31.930 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:13:31.932 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:13:31.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:31.934 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:13:31.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:31.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:31.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:31.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:31.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:31.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:31.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:31.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:31.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:31.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:31.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:31.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:31.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:32.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:32.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:32.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:32.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:32.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.077 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:32.077 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:32.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.174 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:32.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:32.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:32.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:32.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:32.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:32.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:32.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:32.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:32.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:32.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:32.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:32.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:13:32.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:32.377 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:32.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:32.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:32.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:32.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:32.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:32.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:32.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:32.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:32.453 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:32.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:32.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:32.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:32.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:32.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:32.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:32.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:32.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:32.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:32.460 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:13:32.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:37.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:37.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:37.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:37.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:37.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:37.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:37.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:37.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:37.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:37.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:37.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:13:37.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:13:37.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:13:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:37.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:37.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:37.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:13:37.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:37.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:13:37.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:37.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:13:37.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:13:37.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:37.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:37.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:37.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:13:37.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:37.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:13:37.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:37.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:37.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:13:37.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:13:37.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:13:37.486 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:13:37.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:37.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:13:37.975 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:13:38.014 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:13:38.016 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:13:38.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:38.018 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:13:38.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:38.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:38.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:38.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:38.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:38.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:38.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:38.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:38.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:38.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:38.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:38.450 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:13:38.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:38.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:38.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:38.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:38.926 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:13:38.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:38.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:38.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:38.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:38.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:38.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:38.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:38.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:38.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:38.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:38.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:38.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:39.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:39.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:39.029 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:39.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.395 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:13:39.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:39.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:39.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:39.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:39.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:39.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:39.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:39.664 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:39.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:39.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:39.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:39.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:39.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:39.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:39.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:39.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:39.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:39.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:39.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:39.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:39.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:39.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:39.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:39.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:39.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:39.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:39.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:39.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:39.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:39.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:39.865 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:39.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:39.867 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:13:40.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:40.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:40.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:40.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:40.259 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:40.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:40.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:40.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:40.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:40.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:40.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:40.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:40.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:40.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:40.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:40.271 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:40.271 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:45.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:45.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:45.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:45.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:45.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:45.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:45.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:45.288 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:45.288 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:45.288 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:13:45.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:13:45.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:13:45.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:45.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:45.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:45.292 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:13:45.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:45.292 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:13:45.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:45.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:13:45.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:45.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:13:45.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:45.295 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:45.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:13:45.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:13:45.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:13:45.297 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:13:45.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:45.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:45.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:13:45.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:13:45.822 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:13:45.824 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:13:45.825 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:13:45.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:45.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:45.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:45.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:45.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:45.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:45.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:45.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:45.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:45.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:45.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:45.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:45.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:46.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:46.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:46.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:46.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:46.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.121 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:46.122 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:46.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:13:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:46.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:46.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:46.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.405 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:46.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:46.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:46.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:46.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:46.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:46.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:46.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:46.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:46.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:46.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:46.737 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:13:46.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:46.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:46.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:46.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:46.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:46.793 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:46.793 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:46.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:46.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:47.210 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:13:47.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:47.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:47.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:47.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:47.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:47.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:47.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:47.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:47.601 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:47.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:47.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:47.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:47.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:47.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:47.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:47.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:47.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:47.613 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:13:47.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:47.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:47.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.614 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:47.615 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:52.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:52.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:52.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:52.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:52.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:52.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:52.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:52.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:52.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:52.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:52.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:13:52.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:13:52.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:13:52.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:52.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:52.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:52.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:13:52.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:52.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:13:52.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:52.633 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:13:52.633 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:13:52.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:52.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:52.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:52.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:13:52.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:52.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:13:52.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:52.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:13:52.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:13:52.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:52.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:52.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:52.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:13:52.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:13:52.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:13:52.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:52.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:13:52.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:13:52.641 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:13:52.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:13:53.128 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:13:53.170 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:13:53.172 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:13:53.174 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:13:53.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:53.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:53.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:53.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:53.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:53.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:53.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:53.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:53.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:53.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:53.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:53.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:53.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:53.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:53.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:53.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:53.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:53.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:53.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.465 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:53.466 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:13:53.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.601 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:13:53.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:53.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:53.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:53.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:53.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:53.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:53.747 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:53.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:53.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:53.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:53.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:53.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:53.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:53.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:53.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:53.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:53.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:53.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:53.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:54.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:54.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:54.074 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:13:54.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:54.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:54.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:13:54.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:13:54.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:13:54.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:13:54.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:13:54.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:54.126 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:13:54.126 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:13:54.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:13:54.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:54.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:54.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:54.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:54.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:13:54.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:13:54.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:13:54.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:13:54.944 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:13:54.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:13:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:13:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:13:54.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:54.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:54.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:54.956 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:13:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:54.956 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:13:59.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:13:59.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:13:59.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:59.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:59.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:13:59.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:59.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:13:59.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:59.986 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:59.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:13:59.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:13:59.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:13:59.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:13:59.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:59.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:59.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:13:59.995 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:13:59.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:13:59.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:13:59.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:13:59.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:13:59.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:13:59.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:59.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:13:59.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:13:59.999 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:13:59.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:13:59.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:13:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:00.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:14:00.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:14:00.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:14:00.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:14:00.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:14:00.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:14:00.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:14:00.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:14:00.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:14:00.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:14:00.008 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:14:00.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:00.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:00.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:14:00.494 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:14:00.539 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:14:00.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:00.542 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:14:00.543 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:14:00.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:00.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:00.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:00.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:00.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:00.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:00.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:00.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:00.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:00.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:00.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:00.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:00.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:00.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:14:01.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:01.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:01.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:01.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:01.449 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:14:01.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:14:02.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:02.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:02.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:02.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:02.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:14:02.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:02.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:02.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:02.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:02.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:02.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:02.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:02.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:02.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:02.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:02.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:02.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:02.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:02.482 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:14:02.482 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:14:02.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:02.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:14:03.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:03.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:03.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:03.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:03.329 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:14:03.799 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:14:04.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:04.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:04.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:04.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:14:04.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:04.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:04.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:04.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:04.600 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:14:04.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:04.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:04.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:04.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:04.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:04.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:04.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:04.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:04.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:04.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:04.748 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:14:05.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:05.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:05.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:05.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:14:05.698 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:14:06.173 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:14:06.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:06.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:06.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:06.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:06.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:06.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:06.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:06.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:06.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:06.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:06.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:06.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:06.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:06.272 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:14:06.272 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:14:06.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:06.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:06.644 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:14:07.111 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:14:07.580 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:14:08.048 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:14:08.516 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:14:08.983 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:14:09.450 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:14:09.917 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:14:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:14:10.857 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:14:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:14:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:14:12.264 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:14:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:14:13.198 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:14:13.667 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:14:14.138 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:14:14.607 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:14:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:14:15.548 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:14:16.018 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:14:16.488 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:14:16.956 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:14:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:14:17.897 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:14:18.372 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:14:18.849 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:14:19.327 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:14:19.806 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:14:20.284 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:14:20.762 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:14:21.241 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:14:21.719 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:14:22.197 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:14:22.675 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:14:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:14:23.627 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:14:24.104 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:14:24.582 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:14:25.061 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:14:25.539 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:14:26.017 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:14:26.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:26.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:26.234 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:14:26.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:14:26.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:14:26.237 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:14:31.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:14:31.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:14:31.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:14:31.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:14:31.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:14:31.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:14:31.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:14:31.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:14:31.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:14:31.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:14:31.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:14:31.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:14:31.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:14:31.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:14:31.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:14:31.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:14:31.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:14:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:14:31.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:14:31.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:31.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:14:31.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:14:31.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:14:31.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:14:31.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:14:31.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:14:31.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:14:31.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:14:31.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:14:31.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:14:31.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:14:31.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:14:31.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:31.260 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:14:31.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:14:31.261 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:14:31.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:14:31.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:14:31.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:14:31.774 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:14:31.775 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:14:31.775 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:14:31.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:31.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:31.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:31.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:31.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:31.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:31.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:31.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:31.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:31.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:31.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:31.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:31.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:31.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:32.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:14:32.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:32.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:32.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:32.684 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:14:33.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:14:33.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:33.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:33.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:33.625 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:14:33.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:33.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:33.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:33.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:33.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:33.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:33.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:33.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:33.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:33.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:33.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:33.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:33.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:33.714 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:14:33.714 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:14:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:34.098 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:14:34.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:34.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:34.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:34.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:34.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:14:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:14:35.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:35.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:35.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:35.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:35.504 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:14:35.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:35.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:35.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:35.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:35.833 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:14:35.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:35.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:35.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:35.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:35.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:35.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:35.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:35.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:35.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:35.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:35.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:35.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:35.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:35.973 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:14:36.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:36.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:36.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:36.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:36.444 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:14:36.916 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:14:37.391 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:14:37.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:37.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:37.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:37.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:37.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:37.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:37.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:14:37.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:37.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:14:37.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:14:37.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:14:37.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:14:37.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:14:37.482 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:14:37.482 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:14:37.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:37.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:14:37.862 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:14:38.337 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:14:38.810 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:14:39.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:14:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:14:40.234 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:14:40.707 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:14:41.180 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:14:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:14:42.129 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:14:42.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:14:43.066 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:14:43.534 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:14:44.003 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:14:44.472 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:14:44.945 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:14:45.417 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:14:45.891 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:14:46.366 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:14:46.834 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:14:47.306 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:14:47.779 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:14:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:14:48.727 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:14:49.200 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:14:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:14:50.144 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:14:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:14:51.081 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:14:51.549 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:14:52.023 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:14:52.499 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:14:52.974 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:14:53.448 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:14:53.923 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:14:54.401 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:14:54.875 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:14:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:14:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:14:56.291 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:14:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:14:57.247 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:14:57.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:14:57.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:14:57.439 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:14:57.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:14:57.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:14:57.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:14:57.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:14:57.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:14:57.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:14:57.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:14:57.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:14:57.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:14:57.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:14:57.442 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:14:57.442 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5654 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:02.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:02.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:02.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:02.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:02.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:02.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:02.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:02.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:02.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:02.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:02.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:15:02.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:15:02.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:15:02.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:02.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:02.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:02.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:15:02.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:02.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:15:02.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:02.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:02.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:15:02.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:02.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:02.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:15:02.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:15:02.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:15:02.472 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:02.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:15:02.960 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:15:03.001 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:15:03.003 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:15:03.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:03.005 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:15:03.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:03.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:03.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:03.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:03.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:03.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:03.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:03.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:03.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:03.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:03.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:03.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:03.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:03.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:03.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:03.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:03.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:03.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:03.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:03.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:03.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:03.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:03.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:03.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:03.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:15:03.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:03.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:03.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:03.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:03.911 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:15:04.388 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:15:04.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:04.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:04.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:04.865 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:15:05.343 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:15:05.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:05.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:05.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:05.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:05.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:05.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:05.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:05.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:05.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:05.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:05.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:05.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:05.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:05.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:05.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:05.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:05.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:05.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:05.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:05.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:05.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:05.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:05.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:05.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:05.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:05.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:05.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:05.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:05.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:05.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:05.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:05.820 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:15:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:15:06.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:06.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:06.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:06.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:06.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:15:07.245 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:15:07.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:07.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:07.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:07.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:07.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:15:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:07.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:07.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:07.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:07.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:07.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:07.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:07.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:07.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:07.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:07.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:07.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:07.864 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:08.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:08.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:08.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:08.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:08.134 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:08.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:08.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:08.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:08.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:08.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:08.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:08.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:08.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:08.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:08.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:15:08.200 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:08.200 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:08.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:08.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:08.668 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:15:09.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:15:09.614 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:15:10.083 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:15:10.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:10.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:10.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:10.463 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:10.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:10.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:10.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:10.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:10.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:10.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:10.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:10.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:10.502 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:10.503 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:10.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.555 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:15:10.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:10.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:10.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:10.781 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:10.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:10.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:10.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:10.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:10.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:10.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:10.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:10.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:10.840 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:10.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:10.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:11.030 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:15:11.508 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:15:11.980 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:15:12.450 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:15:12.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:12.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:12.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:12.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:12.879 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:12.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:12.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:12.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:12.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:12.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:12.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:12.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:12.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:15:12.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:12.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:12.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:12.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:12.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:13.397 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:15:13.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:13.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:13.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:13.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:13.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:13.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:13.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:13.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:13.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:13.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:13.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:13.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:13.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:13.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:13.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:13.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:13.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:13.874 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:15:14.351 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:15:14.830 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:15:15.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:15.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:15.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:15.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:15.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:15.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:15.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:15.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:15.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:15.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:15.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:15.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:15.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.306 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:15:15.784 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:15:15.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:15.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:15.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:15.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:15.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:15.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:15.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:15.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:15.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:15.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:15.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:15.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:15.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:15.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:15.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:16.261 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:15:16.738 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:15:17.216 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:15:17.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:17.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:17.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:17.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:17.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:17.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:17.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:17.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:17.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:17.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:17.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:17.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:17.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:17.685 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:17.685 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:17.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:17.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:17.693 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:15:18.171 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:15:18.650 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:15:18.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:18.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:18.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:18.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:18.971 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:18.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:18.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:18.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:18.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:18.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:18.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:18.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:18.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:19.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:19.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:19.032 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:19.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:19.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:15:19.606 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:15:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:15:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:15:21.040 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:15:21.517 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:15:21.994 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:15:22.473 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:15:22.947 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:15:23.422 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:15:23.895 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:15:24.372 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:15:24.849 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:15:25.325 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:15:25.804 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:15:26.282 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:15:26.760 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:15:27.238 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:15:27.716 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:15:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:15:28.674 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:15:29.149 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:15:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:15:30.106 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:15:30.584 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:15:31.062 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:15:31.540 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:15:32.015 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:15:32.491 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:15:32.969 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:15:33.448 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:15:33.926 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:15:34.398 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:15:34.875 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:15:35.353 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:15:35.825 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:15:36.303 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:15:36.781 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:15:37.260 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:15:37.738 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:15:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:15:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:15:38.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:38.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:38.989 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:38.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:38.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:38.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:38.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:38.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:38.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:38.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:38.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:38.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:38.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:38.991 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:15:43.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:43.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:43.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:43.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:43.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:43.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:44.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:44.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:44.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:44.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:44.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:15:44.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:15:44.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:15:44.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:44.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:44.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:44.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:15:44.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:44.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:15:44.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:44.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:15:44.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:15:44.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:44.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:44.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:44.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:15:44.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:44.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:15:44.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:44.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:44.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:44.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:15:44.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:15:44.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:15:44.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:15:44.022 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:44.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:15:44.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:15:44.550 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:15:44.552 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:15:44.554 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:15:44.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:44.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:44.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:44.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:44.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:44.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:44.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:44.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:44.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:44.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.833 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:44.833 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:44.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.908 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:44.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:44.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:44.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:44.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:44.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:44.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:44.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:44.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:15:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:44.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:44.983 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:44.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:44.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:45.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:45.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:45.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.070 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:45.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:45.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:45.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:45.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:45.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:45.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:45.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:45.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:45.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:45.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:45.691 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:45.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.772 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:45.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:45.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:45.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:45.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:45.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:45.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:45.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:45.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:45.832 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:45.832 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:45.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:45.925 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:15:46.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:46.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:46.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:46.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:46.012 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:46.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:46.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:46.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:46.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:46.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:46.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:46.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:46.023 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=430 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.023 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:46.024 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:15:51.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:51.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:51.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:51.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:51.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:51.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:51.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:51.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:51.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:51.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:15:51.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:15:51.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:15:51.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:15:51.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:51.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:51.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:51.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:15:51.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:15:51.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:15:51.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:51.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:15:51.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:15:51.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:51.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:51.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:51.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:15:51.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:15:51.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:15:51.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:51.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:15:51.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:15:51.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:51.043 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:15:51.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:15:51.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:15:51.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:15:51.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:15:51.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:15:51.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:15:51.048 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:15:51.048 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:15:51.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:15:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:15:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:15:51.577 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:15:51.579 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:15:51.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:51.579 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:15:51.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:51.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:51.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:51.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:51.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:51.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:51.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:51.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:51.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:51.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:51.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:51.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:51.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.011 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:15:52.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:52.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:52.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:52.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:52.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:15:52.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:52.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:52.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:52.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:52.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:52.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:52.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:52.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:52.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:52.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:52.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:52.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:52.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:52.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.966 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:15:52.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:52.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:52.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:52.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:53.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:53.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:53.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:53.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:53.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:53.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:53.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:53.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:53.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:53.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:53.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:53.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:53.068 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:53.068 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:53.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.438 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:15:53.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:53.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:53.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:53.718 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:53.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:53.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:53.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:53.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:53.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:53.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:53.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:53.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:53.774 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:53.774 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:15:53.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:53.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:15:54.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:54.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:54.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:54.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:54.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.199 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:54.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:54.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:54.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:54.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:54.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:54.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:54.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:54.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:54.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:54.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:54.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:54.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:54.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:54.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:54.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:15:54.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:54.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:54.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:54.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:54.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:54.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:54.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:54.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:54.848 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:54.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:54.857 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:15:55.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:55.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:55.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:55.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:55.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:55.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:55.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:55.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:55.254 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:55.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:55.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:55.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:15:55.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:55.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:15:55.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:15:55.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:15:55.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:15:55.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:55.278 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:15:55.278 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:15:55.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:55.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:55.335 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:15:55.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:15:55.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:15:55.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:15:55.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:15:55.731 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:15:55.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:15:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:15:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:15:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:15:55.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:15:55.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:15:55.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:15:55.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:15:55.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:15:55.734 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:15:55.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:00.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:00.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:00.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:00.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:00.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:00.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:00.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:00.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:00.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:00.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:00.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:00.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:00.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:00.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:00.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:00.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:00.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:00.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:00.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:00.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:00.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:00.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:00.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:00.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:00.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:00.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:00.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:00.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:00.757 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:00.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:00.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:00.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:00.760 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:00.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:00.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:00.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:01.248 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:01.282 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:01.283 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:01.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.285 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:01.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:01.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:01.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:01.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.574 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:01.575 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:01.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.671 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:01.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:01.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.724 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:01.727 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:01.727 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:01.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:01.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:01.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:01.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:01.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.797 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:01.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:01.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:01.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:01.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:01.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:01.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:01.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:01.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:01.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:01.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:02.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:02.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:02.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:02.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:02.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:02.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:02.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:02.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:02.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:02.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:02.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:02.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:02.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:02.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:02.257 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:02.257 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:02.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.678 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:02.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:02.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:02.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:02.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:02.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:02.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:02.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:02.837 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:02.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:02.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:02.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:02.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:02.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:02.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:02.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:02.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:02.922 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:02.922 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:03.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:03.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:03.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:03.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:03.071 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:03.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:03.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:03.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:03.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:03.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:03.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:03.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:03.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:03.082 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:03.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:03.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:03.083 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:08.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:08.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:08.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:08.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:08.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:08.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:08.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:08.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:08.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:08.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:08.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:08.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:08.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:08.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:08.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:08.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:08.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:08.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:08.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:08.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:08.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:08.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:08.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:08.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:08.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:08.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:08.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:08.105 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:08.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:08.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:08.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:08.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:08.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:08.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:08.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:08.110 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:08.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:08.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:08.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:08.638 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:08.638 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:08.640 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:08.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:08.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:08.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:08.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:08.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:08.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:08.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:08.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:08.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:08.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:08.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:08.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:08.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:08.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:09.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:09.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:09.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:09.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:09.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:09.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:09.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:09.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:09.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:09.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:09.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:09.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:09.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:09.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:09.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:09.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:09.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:09.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:09.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:09.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:09.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:09.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:09.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:10.027 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:10.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:10.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:10.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:10.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:10.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:16:10.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:10.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:10.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:10.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:10.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:10.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:10.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:10.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:10.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:10.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:10.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:10.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:10.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:10.607 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:10.607 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:10.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:10.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:16:11.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:11.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:11.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:11.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:11.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:16:11.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:11.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:11.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:11.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:11.746 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:11.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:11.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:11.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:11.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:11.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:11.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:11.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:11.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:11.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:11.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:11.772 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:11.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:11.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:11.922 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:16:12.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:12.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:12.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:12.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:16:12.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:12.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:12.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:12.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:12.709 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:12.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:12.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:12.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:12.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:12.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:12.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:12.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:12.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:12.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:12.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:12.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:12.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:12.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:12.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:16:13.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:13.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:13.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:13.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:16:13.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:13.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:13.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:13.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:13.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:13.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:13.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:13.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:13.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:13.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:13.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:13.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:13.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:13.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:13.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:13.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:13.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:13.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:16:14.292 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:16:14.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:14.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:14.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:14.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:14.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:14.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:14.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:14.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:14.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:14.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:14.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:14.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:14.393 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:14.393 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:14.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:14.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:16:15.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:16:15.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:16:16.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:16.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:16.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:16.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:16.183 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:16.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:16.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:16.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:16.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:16.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:16.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:16.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:16.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:16:16.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:16.244 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:16.244 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:16.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:16.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:16.671 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:16:17.149 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:16:17.627 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:16:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:18.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:18.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:18.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:18.088 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:18.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:18.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:18.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:18.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:18.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:18.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:18.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:18.102 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:18.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:23.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:23.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:23.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:23.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:23.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:23.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:23.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:23.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:23.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:23.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:23.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:23.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:23.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:23.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:23.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:23.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:23.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:23.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:23.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:23.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:23.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:23.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:23.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:23.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:23.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:23.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:23.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:23.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:23.123 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:23.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:23.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:23.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:23.126 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:23.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:23.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:23.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:23.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:23.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:23.660 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:23.662 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:23.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:23.666 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:23.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:23.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:23.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:23.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:23.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:23.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:23.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:23.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:23.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:23.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:23.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:23.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:23.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:23.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:23.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:23.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:23.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:23.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:23.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:23.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:23.843 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:23.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:23.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:23.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:23.993 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:24.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:24.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:24.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:24.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:24.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:24.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:24.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:24.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:24.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:24.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:24.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:24.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:24.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:24.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:24.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:24.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:24.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:24.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:24.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:24.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:24.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:24.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:24.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:24.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:24.370 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:24.371 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:24.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:24.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:25.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:25.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:25.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:25.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:25.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:25.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:25.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:25.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:25.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:25.193 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:25.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:25.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:25.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:25.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:25.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:25.201 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:30.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:30.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:30.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:30.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:30.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:30.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:30.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:30.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:30.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:30.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:30.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:30.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:30.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:30.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:30.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:30.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:30.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:30.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:30.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:30.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:30.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:30.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:30.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:30.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:30.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:30.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:30.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:30.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:30.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:30.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:30.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:30.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:30.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:30.231 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:30.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:30.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:30.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:30.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:30.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:30.762 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:30.764 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:30.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:30.767 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:30.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:30.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:30.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:30.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:30.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:30.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:30.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:30.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:30.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:30.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:30.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:30.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:30.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:30.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:30.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:30.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:30.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:30.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:30.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:30.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:30.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:30.958 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:30.958 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:30.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:30.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:31.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:31.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:31.101 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:31.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:31.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:31.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:31.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:31.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:31.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:31.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:31.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:31.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:31.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:31.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:31.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:31.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:31.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:31.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:31.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:31.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:31.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:31.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:31.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:31.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:31.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:31.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:31.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:31.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:31.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:31.483 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:31.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:31.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:32.144 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:32.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:32.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:32.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:32.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:32.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:32.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:32.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:32.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:32.304 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:32.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:32.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:32.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:32.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:32.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:32.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:32.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:32.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:32.318 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:32.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:32.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:32.318 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:32.319 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:37.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:37.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:37.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:37.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:37.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:37.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:37.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:37.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:37.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:37.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:37.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:37.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:37.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:37.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:37.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:37.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:37.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:37.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:37.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:37.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:37.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:37.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:37.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:37.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:37.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:37.332 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:37.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:37.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:37.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:37.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:37.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:37.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:37.334 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:37.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:37.339 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:37.857 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:37.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:37.858 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:37.859 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:37.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:37.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:37.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:37.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:37.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:37.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:37.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:37.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:37.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:37.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:37.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:37.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:38.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:38.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:38.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:38.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:38.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.115 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:38.115 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:38.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.285 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:38.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:38.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:38.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:38.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:38.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:38.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:38.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:38.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:38.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:38.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:38.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:38.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:38.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:38.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:38.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:38.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:38.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:38.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:38.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:38.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:38.585 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:38.585 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:38.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:38.768 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:39.246 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:39.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:39.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:39.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:39.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:39.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:39.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:39.406 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:39.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:39.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:39.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:39.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:39.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:39.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:39.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:39.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:39.419 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:39.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:39.421 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:44.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:44.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:44.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:44.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:44.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:44.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:44.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:44.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:44.429 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:44.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:44.430 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:44.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:44.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:44.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:44.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:44.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:44.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:44.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:44.433 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:44.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:44.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:44.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:44.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:44.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:44.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:44.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:44.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:44.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:44.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:44.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:44.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:44.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:44.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:44.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:44.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:44.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:44.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:44.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:44.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:44.440 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:44.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:44.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:44.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:44.971 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:44.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:44.974 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:44.975 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:44.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:44.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:44.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:44.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:44.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:44.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:44.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:44.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:45.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:45.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:45.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:45.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:45.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:45.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:45.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:45.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.220 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:45.220 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:45.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.390 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:45.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:45.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:45.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:45.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:45.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:45.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:45.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:45.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:45.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:45.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:45.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:45.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:45.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:45.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:45.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:45.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:45.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:45.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:45.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:45.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:45.688 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:45.688 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:45.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:45.875 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:46.350 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:46.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:46.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:46.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:46.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:46.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:46.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:46.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:46.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:46.505 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:46.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:46.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:46.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:46.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:46.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:46.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:46.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:46.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:46.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:46.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:46.517 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:46.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:51.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:51.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:51.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:51.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:51.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:51.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:51.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:51.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:51.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:51.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:16:51.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:16:51.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:16:51.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:16:51.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:51.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:51.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:51.535 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:16:51.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:16:51.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:16:51.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:51.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:16:51.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:16:51.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:51.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:51.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:16:51.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:16:51.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:16:51.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:51.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:16:51.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:16:51.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:51.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:16:51.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:51.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:16:51.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:16:51.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:16:51.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:51.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:16:51.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:16:51.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:16:51.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:16:51.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:16:51.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:16:51.542 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:16:51.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:16:51.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:16:51.547 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:16:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:16:52.067 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:16:52.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:52.070 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:16:52.072 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:16:52.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:52.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:52.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:52.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:52.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:52.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:52.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:52.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:52.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:52.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:52.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:52.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:52.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:52.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:52.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:52.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:52.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:52.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:52.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:52.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:52.502 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:52.502 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:16:52.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:52.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:16:52.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:52.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:52.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:52.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:16:52.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:53.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:53.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:53.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:53.002 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:53.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:53.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:53.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:53.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:53.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:53.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:53.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:53.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:53.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:53.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:53.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:53.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:16:53.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:53.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:53.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:53.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:53.931 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:16:54.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:54.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:54.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:54.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:54.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:54.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:16:54.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:54.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:16:54.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:16:54.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:16:54.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:16:54.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:54.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:16:54.114 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:16:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:54.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:16:54.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:54.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:54.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:54.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:16:55.366 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:16:55.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:55.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:55.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:55.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:55.844 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:16:56.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:16:56.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:16:56.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:16:56.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:16:56.167 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:16:56.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:16:56.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:16:56.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:16:56.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:16:56.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:16:56.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:16:56.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:16:56.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:16:56.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:16:56.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:16:56.178 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:16:56.179 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:01.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:01.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:01.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:01.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:01.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:01.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:01.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:01.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:01.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:01.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:01.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:01.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:01.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:01.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:01.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:01.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:01.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:01.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:01.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:01.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:01.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:01.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:01.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:01.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:01.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:01.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:01.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:01.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:01.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:01.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:01.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:01.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:01.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:01.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:01.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:01.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:01.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:01.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:01.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:01.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:01.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:01.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:01.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:01.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:01.206 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:01.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:01.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:01.733 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:01.735 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:01.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:01.736 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:01.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:01.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:01.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:01.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:01.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:01.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:01.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:01.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:01.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:01.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:01.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:02.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:02.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:02.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:02.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:02.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:02.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:02.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:02.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:02.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:02.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:17:02.173 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:02.174 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:17:02.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:02.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:02.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:02.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:02.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:17:02.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:02.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:02.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:02.664 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:02.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:02.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:02.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:02.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:02.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:02.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:02.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:02.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:02.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:02.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:02.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:02.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:03.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:17:03.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:03.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:03.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:03.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:03.600 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:17:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:03.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:03.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:03.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:03.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:03.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:03.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:03.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:03.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:03.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:03.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:03.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:03.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:03.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:03.783 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:17:03.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:03.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:04.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:17:04.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:04.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:04.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:04.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:04.556 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:17:05.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:17:05.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:05.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:05.510 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:17:05.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:05.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:05.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:05.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:05.833 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:05.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:05.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:05.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:05.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:05.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:05.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:05.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:05.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:05.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:05.839 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:05.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:05.839 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:05.839 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:05.839 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:05.839 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:10.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:10.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:10.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:10.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:10.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:10.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:10.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:10.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:10.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:10.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:10.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:10.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:10.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:10.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:10.857 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:10.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:10.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:10.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:10.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:10.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:10.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:10.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:10.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:10.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:10.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:10.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:10.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:10.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:10.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:10.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:10.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:10.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:10.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:10.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:10.866 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:10.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:10.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:10.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:11.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:11.391 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:11.393 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:11.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:11.395 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:11.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:11.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:11.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:11.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:11.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:11.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:11.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:11.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:11.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:11.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:11.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:11.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:11.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:11.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:11.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:11.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:11.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:11.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:11.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:11.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:11.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:17:11.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:11.835 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:17:11.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:11.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:11.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:11.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:11.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:12.308 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:17:12.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:12.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:12.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:12.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:12.327 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:12.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:12.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:12.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:12.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:12.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:12.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:12.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:12.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:12.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:12.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:12.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:12.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:12.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:17:12.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:12.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:13.263 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:17:13.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:13.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:13.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:13.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:13.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:13.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:13.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:13.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:13.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:13.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:13.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:13.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:13.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:13.447 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:13.447 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:17:13.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:13.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:13.735 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:17:13.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:13.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:13.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:13.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:14.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:17:14.693 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:17:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:14.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:14.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:15.171 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:17:15.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:15.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:15.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:15.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:15.494 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:15.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:15.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:15.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:15.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:15.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:15.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:15.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:15.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:15.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:15.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:15.501 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:15.501 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:15.501 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:15.501 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:15.501 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:15.501 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:20.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:20.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:20.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:20.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:20.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:20.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:20.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:20.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:20.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:20.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:20.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:20.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:20.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:20.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:20.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:20.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:20.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:20.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:20.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:20.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:20.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:20.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:20.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:20.517 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:20.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:20.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:20.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:20.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:20.521 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:20.521 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:20.521 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:20.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:21.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:21.054 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:21.056 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:21.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.057 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:21.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:21.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:21.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:21.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:21.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:21.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:21.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:21.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:21.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:21.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:21.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:21.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:21.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:21.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:21.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:21.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:21.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:21.483 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:17:21.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.483 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:17:21.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:21.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:21.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:21.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:21.955 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:17:21.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:21.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:21.972 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:21.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:21.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:21.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:21.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:21.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:21.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:21.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:21.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:21.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:21.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:21.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:21.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:17:22.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:22.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:22.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:22.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:17:23.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:23.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:23.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:23.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:23.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:23.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:23.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:23.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:23.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:23.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:23.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:23.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:23.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:23.152 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:23.152 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:17:23.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:23.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:17:23.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:23.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:23.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:23.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:23.856 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:17:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:17:24.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:24.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:24.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:24.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:24.812 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:17:25.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:25.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:25.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:25.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:25.134 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:25.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:25.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:25.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:25.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:25.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:25.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:25.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:25.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:25.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:25.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:25.140 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:30.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:30.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:30.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:30.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:30.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:30.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:30.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:30.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:30.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:30.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:30.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:30.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:30.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:30.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:30.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:30.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:30.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:30.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:30.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:30.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:30.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:30.163 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:30.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:30.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:30.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:30.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:30.165 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:30.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:30.165 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:30.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:30.165 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:30.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:30.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:30.168 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:30.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:30.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:30.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:30.698 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:30.700 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:30.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:30.702 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:30.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:30.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:30.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:30.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:30.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:30.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:30.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:30.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:30.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:30.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:30.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:30.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:30.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:30.742 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:30.743 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:35.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:35.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:35.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:35.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:35.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:35.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:35.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:35.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:35.756 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:35.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:35.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:35.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:35.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:35.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:35.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:35.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:35.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:35.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:35.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:35.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:35.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:35.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:35.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:35.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:35.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:35.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:35.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:35.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:35.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:35.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:35.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:35.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:35.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:35.773 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:35.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:35.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:35.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:36.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:36.315 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:36.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:36.318 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:36.319 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:36.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:36.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:36.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:36.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:36.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:36.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:36.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:36.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:36.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:36.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:36.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:36.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:36.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:36.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:36.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:36.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:36.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:36.368 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:41.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:41.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:41.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:41.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:41.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:41.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:41.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:41.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:41.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:41.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:41.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:41.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:41.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:41.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:41.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:41.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:41.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:41.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:41.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:41.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:41.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:41.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:41.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:41.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:41.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:41.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:41.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:41.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:41.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:41.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:41.402 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:41.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:41.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:41.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:41.928 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:41.929 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:41.930 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:41.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:41.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:41.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:41.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:41.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:41.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:41.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:41.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:41.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:41.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:41.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:41.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:41.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:41.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:41.971 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:41.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:41.973 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:17:46.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:46.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:46.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:46.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:46.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:46.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:46.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:46.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:46.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:46.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:46.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:46.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:46.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:46.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:46.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:46.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:46.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:46.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:46.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:46.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:46.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:46.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:46.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:46.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:46.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:46.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:46.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:46.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:46.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:46.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:46.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:46.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:46.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:46.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:46.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:46.999 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:47.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:47.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:47.001 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:47.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:52.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:17:52.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:17:52.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:52.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:52.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:52.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:52.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:17:52.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:52.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:52.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:17:52.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:17:52.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:17:52.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:17:52.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:52.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:52.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:17:52.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:17:52.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:17:52.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:17:52.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:52.022 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:17:52.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:17:52.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:52.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:52.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:17:52.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:17:52.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:17:52.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:17:52.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:52.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:17:52.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:17:52.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:17:52.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:17:52.029 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:17:52.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:52.033 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:17:52.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:17:52.558 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:17:52.560 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:17:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:52.563 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:17:52.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:52.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:52.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:52.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:52.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:52.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:52.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:52.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:52.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:52.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:52.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:52.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:52.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:52.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:17:53.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:53.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:53.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:53.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:53.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:17:53.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:53.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:53.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:53.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:53.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:53.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:53.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:53.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:53.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:53.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:53.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:53.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:53.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:53.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:53.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:53.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:53.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:17:54.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:54.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:54.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:54.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:54.421 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:17:54.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:54.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:54.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:54.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:54.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:54.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:54.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:54.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:54.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:54.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:54.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:54.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:54.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:54.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:54.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:54.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:17:55.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:55.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:55.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:55.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:55.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:17:55.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:55.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:55.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:55.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:55.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:55.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:55.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:55.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:55.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:55.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:55.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:55.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:55.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:55.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:55.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:55.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:55.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:55.852 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:17:56.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:56.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:56.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:56.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:56.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:17:56.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:56.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:56.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:56.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:56.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:56.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:56.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:56.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:56.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:56.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:56.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:56.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:56.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:56.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:56.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:56.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:56.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:56.801 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:17:57.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:17:57.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:17:57.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:17:57.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:17:57.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:57.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:57.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:57.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:57.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:57.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:57.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:57.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:57.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:57.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:57.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:57.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:57.182 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:17:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:17:57.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:57.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:57.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:57.722 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:57.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:57.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:57.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:57.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:57.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:57.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:57.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:57.749 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:17:57.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:57.807 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:17:57.807 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-03-11 03:17:57.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:57.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:58.219 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:17:58.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:58.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:58.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:58.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:58.347 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:17:58.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:58.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:58.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:58.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:58.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:58.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:58.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:58.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:58.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:58.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:58.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:58.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:58.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:58.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:58.690 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:17:58.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:59.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:59.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:59.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:59.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:59.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:59.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:59.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:59.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:59.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:59.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:59.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:59.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.166 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:17:59.644 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:17:59.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:59.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:59.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:59.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:17:59.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:17:59.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:17:59.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:59.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:59.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:17:59.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:17:59.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:17:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:17:59.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:17:59.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:17:59.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:17:59.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.121 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:18:00.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:00.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:00.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:00.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:00.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:00.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:00.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:00.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:00.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:00.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:00.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:00.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:00.315 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:18:00.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:18:00.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:00.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:00.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:00.904 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:00.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:00.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:00.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:00.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:00.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:00.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:00.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:00.970 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:00.970 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:18:00.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:00.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:01.067 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:18:01.546 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:18:01.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:01.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:01.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:01.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:01.550 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:01.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:01.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:01.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:01.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:01.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:01.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:01.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:01.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:01.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:01.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:01.596 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:01.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:01.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:02.023 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:18:02.500 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:18:02.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:02.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:02.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:02.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:02.506 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:02.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:02.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:02.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:02.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:02.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:02.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:02.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:02.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:02.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:02.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:02.604 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:02.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:02.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:18:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:18:03.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:03.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:03.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:03.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:03.487 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:03.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:03.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:03.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:03.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:03.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:03.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:03.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:03.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:03.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:03.557 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:03.558 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:03.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:03.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:03.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:18:04.411 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:18:04.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:04.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:04.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:04.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:04.461 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:04.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:04.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:04.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:04.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:04.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:04.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:04.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:04.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:04.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:04.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:04.514 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:04.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:04.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:04.889 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:18:05.367 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:18:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:05.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:05.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:05.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:05.434 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:05.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:05.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:05.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:05.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:05.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:05.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:05.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:05.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:05.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:05.515 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:05.515 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:05.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:05.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:05.842 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:18:06.320 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:18:06.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:06.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:06.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:06.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:06.406 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:06.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:06.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:06.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:06.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:06.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:06.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:06.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:06.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:06.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:06.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:06.462 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:06.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:06.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:06.796 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:18:07.274 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:18:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:07.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:07.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:07.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:07.380 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:07.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:07.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:07.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:07.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:07.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:07.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:07.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:07.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:07.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:07.420 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:07.420 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:07.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:07.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:07.752 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:18:08.231 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:18:08.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:08.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:08.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:08.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:08.350 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:08.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:08.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:08.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:08.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:08.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:08.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:08.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:08.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:08.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:08.370 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:18:08.370 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:18:08.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:08.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:08.703 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:18:09.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:18:09.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:09.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:09.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:09.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:09.313 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:18:09.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:09.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:09.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:09.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:09.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:09.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:09.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:09.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:09.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:09.324 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:18:09.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:14.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:14.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:14.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:14.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:14.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:14.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:14.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:14.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:14.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:14.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:14.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:14.333 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:18:14.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:14.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:18:14.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:14.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:18:14.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:14.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:18:14.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:14.337 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:14.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:18:14.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:18:14.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:18:14.339 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:14.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:18:14.827 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:18:14.857 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:18:14.858 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:18:14.860 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:18:14.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:14.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:14.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:14.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:14.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:14.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:14.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:14.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:14.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:14.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:14.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:14.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:14.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:14.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:15.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:15.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:15.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:18:15.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:15.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:15.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:15.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:15.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:15.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:15.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:15.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:18:15.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:18:15.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:18:15.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:18:15.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:18:15.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:18:15.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:18:15.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:18:15.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:18:15.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:18:15.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:15.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:15.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:15.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:15.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:15.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:15.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:15.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:15.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:15.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:15.970 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:18:15.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:15.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:20.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:20.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:20.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:20.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:20.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:20.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:20.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:20.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:20.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:20.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:20.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:18:20.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:18:20.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:18:20.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:20.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:20.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:20.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:18:20.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:20.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:18:20.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:20.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:18:20.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:18:20.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:20.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:20.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:20.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:18:20.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:20.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:18:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:20.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:20.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:18:20.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:18:20.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:18:20.996 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:18:20.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:20.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:21.001 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:18:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:18:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:18:22.442 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:18:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:18:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:18:23.877 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:18:24.355 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:18:24.833 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:18:25.314 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:18:25.792 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:18:26.274 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:18:26.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:18:27.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:18:27.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:18:28.197 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:18:28.679 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:18:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:18:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:18:30.120 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:18:30.600 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:18:31.082 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:18:31.563 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:18:32.045 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:18:32.527 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:18:33.006 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:18:33.482 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:18:33.951 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:18:34.420 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:18:34.889 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:18:35.358 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:18:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:18:36.311 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:18:36.787 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:18:37.256 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:18:37.725 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:18:38.195 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:18:38.664 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:18:39.133 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:18:39.602 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:18:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:18:40.545 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:18:41.026 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:18:41.504 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:18:41.984 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:18:42.466 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:18:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:18:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:18:43.903 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:18:44.372 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:18:44.841 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:18:45.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:45.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:45.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:45.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:45.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:45.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:45.027 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:18:45.027 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:45.028 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:18:50.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:18:50.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:18:50.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:50.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:50.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:50.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:50.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:18:50.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:50.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:50.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:18:50.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:18:50.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:18:50.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:18:50.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:50.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:50.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:18:50.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:18:50.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:18:50.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:18:50.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:50.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:18:50.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:18:50.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:18:50.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:50.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:18:50.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:18:50.051 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:18:50.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:18:50.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:18:50.054 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:18:50.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:18:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:18:50.058 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:18:50.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:18:51.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:18:51.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:18:51.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:18:52.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:18:52.918 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:18:53.395 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:18:53.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:18:54.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:18:54.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:18:55.296 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:18:55.778 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:18:56.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:18:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:18:57.221 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:18:57.702 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:18:58.182 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:18:58.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:18:59.143 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:18:59.625 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:19:00.107 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:19:00.587 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:19:01.065 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:19:01.543 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:19:02.021 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:19:02.501 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:19:02.982 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:19:03.457 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:19:03.925 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:19:04.396 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:19:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:19:05.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:19:05.840 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:19:06.321 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:19:06.802 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:19:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:19:07.755 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:19:08.236 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:19:08.708 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:19:09.182 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:19:09.658 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:19:10.136 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:19:10.611 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:19:11.080 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:19:11.549 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:19:12.018 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:19:12.486 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:19:12.966 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:19:13.440 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:19:13.908 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:19:14.387 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:19:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:19:15.349 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:19:15.831 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:19:16.311 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:19:16.789 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:19:17.269 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:19:17.750 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:19:18.219 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:19:18.688 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:19:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:19:19.647 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:19:20.125 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:19:20.599 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:19:21.077 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:19:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:19:22.038 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:19:22.519 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:19:22.999 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:19:23.475 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:19:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:19:24.431 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:19:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:19:25.387 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:19:25.865 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:19:26.340 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:19:26.808 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:19:27.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:27.279 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:19:27.748 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:19:28.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:28.216 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:19:28.687 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:19:29.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:19:29.641 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:19:30.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:30.118 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:19:30.586 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:19:31.055 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:19:31.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:31.534 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:19:32.014 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:19:32.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:32.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:32.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:32.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:32.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:32.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:19:32.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:19:32.091 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:19:37.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:19:37.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:19:37.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:37.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:37.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:37.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:37.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:37.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:19:37.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:37.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:19:37.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:19:37.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:19:37.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:19:37.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:19:37.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:37.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:37.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:19:37.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:19:37.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:19:37.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:19:37.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:19:37.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:19:37.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:19:37.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:37.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:19:37.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:19:37.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:19:37.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:19:37.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:19:37.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:19:37.116 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:19:37.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:19:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:19:37.646 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:19:37.648 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:37.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:37.649 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:19:37.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:37.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:37.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:19:37.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:37.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:37.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:37.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:19:37.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:19:37.694 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:37.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:37.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:37.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:37.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:37.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:38.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:19:38.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:38.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:38.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:38.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:19:38.558 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:19:39.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:19:39.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:39.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:39.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:39.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:39.491 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:19:39.969 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:19:40.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:40.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:40.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:40.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:19:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:19:41.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:41.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:41.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:19:41.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:41.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:41.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:41.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:41.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:41.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:19:41.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:41.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:41.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:41.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:19:41.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:19:41.533 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:41.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:41.548 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:19:41.549 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:19:41.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:41.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:41.873 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:19:42.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:42.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:42.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:42.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:42.351 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:19:42.829 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:19:43.307 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:19:43.785 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:19:44.257 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:19:44.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:19:45.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:19:45.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:45.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:45.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:45.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:45.590 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:19:45.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:45.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:45.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:19:45.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:45.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:45.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:45.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:19:45.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:19:45.614 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:45.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:45.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:45.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:45.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:45.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:45.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:19:46.110 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:19:46.151 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:19:46.629 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:19:47.106 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:19:47.583 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:19:48.061 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:19:48.538 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:19:49.015 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:19:49.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:49.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:49.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:49.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:49.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:49.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:49.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:19:49.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:49.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:49.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:49.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:19:49.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:19:49.483 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:49.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:49.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:19:49.486 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:19:49.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:49.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:49.493 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:19:49.961 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:19:50.436 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:19:50.914 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:19:51.303 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:19:51.392 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:19:51.870 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:19:52.260 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:19:52.348 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:19:52.826 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:19:53.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:53.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:53.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:53.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:53.223 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:19:53.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:53.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:53.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:53.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:53.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:53.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:53.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:53.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:19:53.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:19:53.237 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:19:53.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:53.238 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.238 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.238 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.238 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.239 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:53.240 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:19:58.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:19:58.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:19:58.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:58.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:58.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:58.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:58.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:19:58.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:19:58.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:58.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:19:58.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:19:58.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:19:58.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:19:58.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:19:58.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:58.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:19:58.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:19:58.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:19:58.260 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:19:58.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:58.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:19:58.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:19:58.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:19:58.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:58.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:19:58.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:19:58.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:19:58.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:19:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:19:58.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:19:58.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:19:58.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:19:58.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:58.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:19:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:19:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:19:58.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:19:58.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:19:58.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:19:58.267 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:19:58.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:19:58.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:19:58.272 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:19:58.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:19:58.792 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:19:58.794 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:58.797 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:19:58.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:19:58.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:19:58.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:19:58.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:58.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:58.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:58.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:19:58.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:19:58.848 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:58.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:19:58.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:19:58.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:19:58.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:58.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:19:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:19:59.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:19:59.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:19:59.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:19:59.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:19:59.710 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:19:59.726 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:19:59.729 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:20:00.188 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:20:00.213 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:00.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:00.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:00.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:00.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:00.665 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:20:00.699 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:01.143 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:20:01.187 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:01.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:01.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:01.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:01.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:01.621 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:20:01.673 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:02.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:20:02.160 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:02.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:02.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:02.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:02.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:02.575 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:20:02.647 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:03.053 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:20:03.133 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:03.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:03.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:03.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:20:03.620 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:04.009 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:20:04.108 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:04.487 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:20:04.595 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:04.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:20:05.082 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:05.442 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:20:05.569 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:05.920 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:20:06.056 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:06.398 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:20:06.543 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:06.876 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:20:07.030 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:07.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:07.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:07.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:07.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:07.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:07.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:07.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:07.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:07.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:07.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:07.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:07.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:07.057 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:07.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:07.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:20:07.060 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:20:07.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:07.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:07.348 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:20:07.750 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:07.826 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:20:08.238 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:08.298 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:20:08.718 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:08.768 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:20:09.199 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:09.239 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:20:09.679 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:09.710 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:20:10.159 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:10.181 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:20:10.639 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:10.653 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:20:11.119 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:11.123 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:20:11.593 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:20:11.598 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:12.064 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:20:12.079 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:12.534 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:20:12.558 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:13.005 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:20:13.039 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:13.476 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:20:13.518 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:13.947 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:20:13.999 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:14.417 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:20:14.479 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:14.888 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:20:14.958 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:14.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:14.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:14.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:14.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:14.964 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:20:14.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:14.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:14.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:14.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:14.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:14.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:14.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:14.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:14.976 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:14.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:14.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:14.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:14.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:14.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:15.323 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:15.363 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:20:15.799 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:15.801 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:20:15.841 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:20:16.276 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:16.318 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:20:16.754 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:16.795 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:20:17.231 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:17.273 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:20:17.709 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:17.750 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:20:18.185 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:18.227 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:20:18.663 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:18.705 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:20:19.140 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:19.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:20:19.611 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:19.654 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:20:20.089 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:20:20.567 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:20.609 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:20:21.045 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:21.087 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:20:21.523 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:21.564 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:20:22.000 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:22.042 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:20:22.477 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:22.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:22.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:22.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:22.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:22.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:22.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:22.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:22.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:22.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:22.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:22.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:22.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:22.511 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:22.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:22.519 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:20:22.521 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:20:22.521 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:20:22.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:22.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:22.909 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:22.991 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:20:23.379 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:23.381 [DEBUG] fake_trx.py:269 (MS@172.18.204.22:6700) Recv SETTA cmd
2026-03-11 03:20:23.466 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:20:23.857 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:23.943 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:20:24.333 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:24.422 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:20:24.813 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:24.900 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:20:25.290 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:20:25.768 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:25.857 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:20:26.247 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:26.335 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:20:26.725 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:26.814 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:20:27.205 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:27.292 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:20:27.682 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:27.770 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:20:28.160 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:28.249 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:20:28.638 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:20:29.117 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:29.204 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:20:29.594 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:29.682 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:20:30.072 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:30.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:30.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:30.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:30.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:30.082 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:20:30.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:30.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:30.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:30.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:30.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:30.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:30.093 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:20:30.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:30.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:30.094 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.095 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.096 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:30.097 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:35.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:35.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:35.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:35.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:35.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:35.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:35.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:35.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:35.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:35.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:35.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:20:35.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:20:35.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:20:35.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:35.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:35.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:35.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:20:35.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:35.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:20:35.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:35.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:35.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:20:35.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:35.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:35.110 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:20:35.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:20:35.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:20:35.113 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:20:35.113 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:20:35.113 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:35.118 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:20:35.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:20:35.644 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:20:35.646 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:35.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:35.649 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:20:35.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:35.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:35.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:35.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:35.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:35.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:35.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:35.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:35.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:35.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:35.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:35.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:36.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:20:36.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:36.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:36.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:36.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:20:37.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:20:37.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:37.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:37.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:37.510 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:20:37.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:37.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:37.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:37.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:37.808 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=577 tn=7 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:37.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:37.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:37.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:37.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:37.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:37.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:37.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:37.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:37.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:37.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:37.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:37.984 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:20:38.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:38.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:38.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:38.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:38.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:20:38.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:20:39.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:39.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:39.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:39.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:39.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:20:39.889 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:20:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:39.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:39.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:39.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:39.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:39.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:39.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:39.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:39.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:39.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:39.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:39.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:39.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:39.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:39.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:39.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:40.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:40.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:40.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:40.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:40.366 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:20:40.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:20:41.321 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:20:41.799 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:20:42.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:42.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:42.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:42.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:42.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:42.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:42.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:42.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:42.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:42.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:42.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:42.090 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:42.090 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:20:47.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:47.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:47.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:47.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:47.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:47.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:47.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:47.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:47.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:47.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:47.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:20:47.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:20:47.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:20:47.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:47.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:47.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:47.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:47.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:20:47.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:47.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:20:47.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:47.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:47.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:47.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:20:47.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:20:47.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:20:47.106 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:20:47.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:47.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:47.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:20:47.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:20:47.630 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:20:47.633 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:47.634 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:20:47.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:47.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:47.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:47.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:47.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:47.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:47.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:47.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:47.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:47.697 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:20:47.697 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:20:47.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:47.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:48.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:20:48.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:48.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:48.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:48.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:48.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:20:49.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:20:49.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:49.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:49.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:49.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:49.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:20:49.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:49.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:49.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:49.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:49.807 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:20:49.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:49.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:49.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:49.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:49.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:49.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:49.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:49.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:49.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:49.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:20:49.835 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:20:49.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:49.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:49.985 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:20:50.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:50.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:50.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:50.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:50.458 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:20:50.937 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:20:51.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:51.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:51.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:51.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:51.415 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:20:51.893 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:20:51.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:51.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:51.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:51.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:51.939 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:20:51.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:51.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:51.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:51.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:51.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:51.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:51.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:51.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:51.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:51.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:51.975 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:20:56.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:20:56.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:20:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:56.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:56.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:20:56.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:56.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:56.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:20:56.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:20:56.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:20:56.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:20:56.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:56.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:56.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:20:56.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:20:56.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:20:56.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:20:56.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:56.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:20:56.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:20:56.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:56.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:56.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:20:56.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:20:56.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:20:56.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:20:56.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:56.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:20:56.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:20:56.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:56.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:20:56.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:20:56.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:20:56.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:20:56.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:20:56.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:56.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:20:56.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:20:56.997 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:20:56.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:20:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:20:57.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:20:57.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:20:57.517 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:20:57.518 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:20:57.519 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:20:57.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:57.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:57.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:57.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:57.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:57.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:57.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:57.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:57.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:57.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:57.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:57.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:57.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:57.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:57.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:20:58.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:58.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:58.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:58.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:58.435 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:20:58.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:20:59.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:20:59.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:20:59.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:20:59.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:20:59.391 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:20:59.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:59.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:59.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:59.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:59.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:20:59.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:20:59.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:20:59.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:59.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:59.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:59.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:20:59.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:20:59.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:20:59.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:20:59.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:20:59.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:59.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:20:59.868 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:21:00.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:00.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:00.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:00.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:00.346 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:21:00.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:21:01.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:01.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:01.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:01.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:01.301 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:21:01.779 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:21:01.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:01.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:01.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:01.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:01.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:01.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:01.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:01.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:01.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:01.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:01.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:01.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:01.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:01.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:01.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:01.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:01.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:02.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:02.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:02.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:02.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:02.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:21:02.733 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:21:03.211 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:21:03.689 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:21:03.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:03.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:03.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:03.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:03.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:03.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:03.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:03.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:03.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:03.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:03.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:03.990 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:03.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.991 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.991 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.991 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.991 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:03.991 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:08.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:08.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:08.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:08.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:08.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:08.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:08.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:09.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:09.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:09.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:09.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:09.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:09.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:09.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:09.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:09.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:09.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:09.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:09.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:09.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:09.009 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:09.009 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:09.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:09.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:09.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:09.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:09.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:09.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:09.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:09.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:09.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:09.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:09.014 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:09.014 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:09.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:09.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:09.015 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:09.015 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:09.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:09.020 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:09.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:09.542 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:09.544 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:09.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:09.546 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:09.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:09.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:09.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:09.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:09.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:09.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:09.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:09.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:09.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:09.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:21:09.608 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:21:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:09.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:10.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:10.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:10.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:10.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:10.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:21:11.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:11.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:11.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:11.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:11.405 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:21:11.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:11.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:11.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:11.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:11.741 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:21:11.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:11.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:11.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:11.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:11.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:11.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:11.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:11.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:11.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:11.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:21:11.780 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:21:11.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:11.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:11.874 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:21:12.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:12.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:12.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:12.345 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:21:12.816 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:21:13.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:13.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:13.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:13.286 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:21:13.765 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:21:13.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:13.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:13.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:13.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:13.889 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:21:13.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:13.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:13.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:13.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:13.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:13.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:13.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:13.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:13.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:13.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:13.899 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:13.899 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.900 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:13.901 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:18.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:18.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:18.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:18.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:18.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:18.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:18.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:18.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:18.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:18.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:18.904 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:18.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:18.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:18.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:18.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:18.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:18.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:18.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:18.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:18.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:18.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:18.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:18.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:18.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:18.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:18.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:18.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:18.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:18.913 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:18.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:18.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:18.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:19.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:19.438 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:19.440 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:19.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:19.442 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:19.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:19.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:19.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:19.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:19.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:19.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:19.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:19.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:19.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:19.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:19.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:19.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:19.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:19.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:19.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:19.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:19.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:20.830 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:21:20.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:20.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:20.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:20.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:21.308 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:21:21.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:21.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:21.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:21.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:21.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:21.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:21.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:21.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:21.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:21.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:21.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:21.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:21.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:21.682 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:21.682 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:26.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:26.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:26.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:26.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:26.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:26.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:26.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:26.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:26.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:26.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:26.709 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:26.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:26.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:26.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:26.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:26.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:26.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:26.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:26.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:26.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:26.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:26.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:26.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:26.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:26.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:26.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:26.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:26.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:26.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:26.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:26.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:26.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:26.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:26.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:26.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:26.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:26.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:26.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:26.734 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:26.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:26.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:27.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:27.264 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:27.266 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:27.267 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:27.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:27.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:27.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:27.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:27.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:27.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:27.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:27.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:27.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:27.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:27.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:21:27.325 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:21:27.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:27.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:27.700 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:27.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:27.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:27.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:28.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:28.642 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:21:28.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:28.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:28.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:28.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:29.113 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:21:29.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:29.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:29.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:29.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:29.507 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:21:29.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:29.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:29.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:29.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:29.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:29.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:29.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:29.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:29.518 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:34.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:34.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:34.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:34.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:34.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:34.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:34.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:34.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:34.529 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:34.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:34.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:34.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:34.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:34.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:34.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:34.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:34.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:34.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:34.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:34.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:34.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:34.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:34.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:34.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:34.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:34.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:34.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:34.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:34.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:34.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:34.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:34.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:34.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:34.543 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:34.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:34.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:35.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:35.076 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:35.078 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:35.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:35.080 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:35.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:35.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:35.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:35.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:35.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:35.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:35.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:35.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:35.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:35.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:35.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:35.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:35.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:35.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:35.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:35.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:35.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:35.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:35.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:35.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:35.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:35.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:35.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:35.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:35.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:35.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:35.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:35.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:35.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:35.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:35.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:35.985 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:35.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:35.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:35.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:35.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:35.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:35.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:35.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:35.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:35.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:35.997 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:35.998 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.998 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.998 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.998 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.999 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.999 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:35.999 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:40.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:40.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:40.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:40.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:40.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:40.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:41.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:41.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:41.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:41.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:41.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:41.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:41.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:41.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:41.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:41.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:41.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:41.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:41.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:41.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:41.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:41.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:41.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:41.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:41.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:41.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:41.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:41.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:41.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:41.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:41.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:41.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:41.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:41.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:41.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:41.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:41.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:41.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:41.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:41.022 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:41.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:41.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:41.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:41.550 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:41.553 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:41.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:41.555 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:41.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:41.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:41.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:41.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:41.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:41.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:41.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:41.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:41.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:41.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:41.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:41.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:41.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:41.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:42.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:42.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:42.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:42.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:42.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:42.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:42.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:42.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:42.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:42.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:42.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:42.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:42.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:42.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:42.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:42.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:42.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:42.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:42.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:42.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:42.460 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:42.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:42.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:42.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:42.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:42.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:42.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:42.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:42.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:42.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:42.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:42.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:42.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:42.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:42.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:42.514 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:42.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:47.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:47.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:47.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:47.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:47.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:47.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:47.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:47.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:47.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:47.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:47.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:47.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:47.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:47.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:47.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:47.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:47.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:47.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:47.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:47.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:47.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:47.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:47.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:47.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:47.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:47.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:47.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:47.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:47.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:47.540 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:47.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:47.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:47.542 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:47.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:47.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:48.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:48.068 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:48.071 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:48.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:48.073 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:48.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:48.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:48.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:48.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:48.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:48.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:48.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:48.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:48.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:48.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:48.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:48.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:48.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:48.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:48.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:48.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:48.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:48.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:48.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:48.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:48.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:48.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:48.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:48.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:48.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:48.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:48.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:48.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:48.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:48.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:48.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:48.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:48.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:48.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:48.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:48.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:48.990 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:21:48.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:48.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:48.990 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:21:53.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:53.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:53.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:53.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:53.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:54.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:54.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:54.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:54.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:21:54.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:21:54.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:21:54.007 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:21:54.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:54.007 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:54.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:54.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:21:54.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:21:54.008 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:21:54.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:54.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:21:54.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:21:54.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:21:54.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:54.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:21:54.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:21:54.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:54.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:21:54.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:54.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:21:54.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:21:54.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:21:54.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:21:54.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:21:54.015 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:21:54.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:21:54.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:21:54.020 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:21:54.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:21:54.537 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:21:54.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:54.539 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:21:54.541 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:21:54.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:54.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:54.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:21:54.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:54.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:21:54.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:21:54.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:21:54.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:21:54.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:21:54.650 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:21:54.650 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:21:54.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:54.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:21:54.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:21:55.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:55.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:55.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:55.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:55.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:21:55.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:21:56.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:56.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:56.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:56.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:56.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:21:56.893 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:21:57.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:57.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:57.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:21:57.849 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:21:58.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:58.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:58.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:58.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:21:58.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:21:58.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:21:58.655 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:21:58.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:21:58.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:21:58.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:21:58.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:21:58.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:21:58.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:21:58.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:21:58.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:21:58.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:21:58.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:21:58.659 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:03.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:03.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:03.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:03.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:03.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:03.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:03.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:03.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:03.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:03.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:03.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:03.671 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:03.671 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:03.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:03.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:03.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:03.672 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:03.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:03.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:03.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:03.673 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:03.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:03.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:03.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:03.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:03.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:03.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:03.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:03.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:03.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:03.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:03.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:03.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:03.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:03.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:03.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:03.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:03.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:03.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:03.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:03.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:03.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:03.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:03.679 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:03.679 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:03.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:04.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:04.204 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:04.206 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:04.209 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:04.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:04.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:04.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:04.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:04.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:04.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:04.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:04.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:04.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:04.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:04.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:04.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:04.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:04.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:04.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:04.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:04.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:04.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:04.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:04.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:04.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:04.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:04.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:04.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.643 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:04.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:04.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:04.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:04.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:04.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:04.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:04.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:04.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:04.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:04.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:04.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:04.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:04.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:04.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:04.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:04.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:04.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:04.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:04.781 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:04.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=236 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:09.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:09.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:09.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:09.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:09.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:09.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:09.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:09.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:09.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:09.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:09.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:09.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:09.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:09.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:09.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:09.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:09.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:09.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:09.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:09.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:09.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:09.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:09.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:09.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:09.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:09.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:09.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:09.806 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:09.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:09.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:10.326 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:10.327 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:10.328 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:10.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:10.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:10.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:10.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:10.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:10.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:10.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:10.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:10.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:10.394 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:22:10.394 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:22:10.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:10.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:10.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:10.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:10.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:10.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:10.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:22:11.706 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:22:11.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:11.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:11.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:11.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:12.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:22:12.648 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:22:12.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:12.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:13.118 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:22:13.590 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:22:13.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:13.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:13.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:13.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:14.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:22:14.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:14.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:14.399 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:22:14.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:14.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:14.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:14.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:14.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:14.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:14.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:14.403 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:14.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.403 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:14.404 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=994 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:19.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:19.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:19.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:19.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:19.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:19.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:19.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:19.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:19.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:19.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:19.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:19.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:19.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:19.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:19.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:19.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:19.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:19.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:19.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:19.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:19.431 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:19.431 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:19.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:19.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:19.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:19.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:19.433 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:19.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:19.433 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:19.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:19.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:19.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:19.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:19.435 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:19.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:19.440 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:19.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:19.955 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:19.956 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:19.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:19.957 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:19.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:19.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:19.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:20.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:20.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:20.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:20.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:20.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:20.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:20.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:20.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:20.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:20.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:20.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:20.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:20.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:20.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:20.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:20.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:20.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:20.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:20.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:20.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:20.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:20.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:20.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:20.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:20.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:20.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:20.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:20.748 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:20.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:20.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:20.748 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:25.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:25.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:25.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:25.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:25.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:25.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:25.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:25.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:25.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:25.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:25.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:25.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:25.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:25.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:25.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:25.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:25.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:25.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:25.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:25.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:25.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:25.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:25.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:25.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:25.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:25.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:25.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:25.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:25.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:25.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:25.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:25.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:25.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:25.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:25.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:25.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:25.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:25.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:25.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:25.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:25.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:25.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:25.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:25.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:25.781 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:25.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:25.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:26.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:26.314 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:26.317 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:26.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:26.318 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:26.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:26.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:26.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:26.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:26.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:26.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:26.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:26.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:26.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:26.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:26.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:26.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:26.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:26.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:26.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:26.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:26.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:27.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:27.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:27.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:27.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:27.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:27.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:27.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:27.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:27.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:27.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:27.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:27.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:27.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:27.154 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:27.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:27.155 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.155 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.155 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.155 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.156 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:27.157 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:32.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:32.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:32.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:32.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:32.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:32.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:32.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:32.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:32.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:32.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:32.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:32.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:32.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:32.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:32.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:32.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:32.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:32.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:32.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:32.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:32.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:32.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:32.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:32.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:32.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:32.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:32.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:32.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:32.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:32.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:32.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:32.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:32.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:32.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:32.188 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:32.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:32.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:32.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:32.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:32.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:32.720 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:32.723 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:32.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:32.725 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:32.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:32.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:32.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:32.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:32.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:32.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:32.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:32.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:32.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:32.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:32.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:32.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:32.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:33.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:33.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:33.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:33.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:33.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:33.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:33.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:33.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:33.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:33.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:33.549 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:33.550 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:33.550 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:33.550 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:33.550 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:33.550 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:38.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:38.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:38.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:38.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:38.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:38.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:38.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:38.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:38.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:38.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:38.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:38.569 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:38.569 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:38.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:38.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:38.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:38.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:38.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:38.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:38.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:38.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:38.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:38.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:38.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:38.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:38.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:38.577 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:38.577 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:38.577 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:38.582 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:39.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:39.104 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:39.107 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:39.109 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:39.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:39.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:39.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:39.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:39.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:39.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:39.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:39.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:39.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:39.212 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:22:39.212 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:22:39.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:39.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:39.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:39.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:39.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:39.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:39.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:40.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:22:40.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:40.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:40.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:40.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:40.078 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:22:40.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:40.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:40.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:40.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:40.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:40.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:40.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:40.083 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:45.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:45.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:45.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:45.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:45.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:45.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:45.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:45.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:45.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:45.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:45.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:45.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:45.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:45.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:45.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:45.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:45.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:45.098 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:45.098 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:45.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:45.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:45.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:45.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:45.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:45.100 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:45.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:45.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:45.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:45.627 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:45.628 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:45.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:45.629 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:45.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:45.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:45.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:45.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:45.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:45.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:45.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:45.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:45.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:45.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:45.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:45.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:45.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:46.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:46.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:46.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:46.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:46.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:46.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:46.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:46.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:46.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:46.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:46.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:46.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:46.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:46.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:46.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:46.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:46.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:46.474 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:46.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:46.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:46.475 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.475 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.475 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.475 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.475 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.476 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:46.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:51.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:51.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:51.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:51.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:51.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:51.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:51.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:51.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:51.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:51.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:51.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:51.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:51.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:51.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:51.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:51.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:51.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:51.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:51.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:51.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:51.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:51.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:51.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:51.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:51.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:51.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:51.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:51.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:51.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:51.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:51.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:51.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:51.494 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:51.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:51.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:51.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:51.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:51.498 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:51.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:51.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:51.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:51.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:52.037 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:52.039 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:52.040 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:52.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:52.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:52.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:52.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:52.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:52.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:52.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:52.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:52.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:52.079 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:22:52.079 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:22:52.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:52.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:52.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:52.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:52.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:52.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:52.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:52.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:52.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:52.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:52.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:52.913 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:22:52.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:52.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:52.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:52.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:52.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:52.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:52.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:52.926 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:22:52.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:52.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:52.927 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.927 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.927 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.927 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.928 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:52.929 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:22:57.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:22:57.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:22:57.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:57.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:57.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:57.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:57.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:22:57.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:57.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:57.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:22:57.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:22:57.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:57.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:22:57.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:22:57.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:57.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:22:57.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:22:57.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:57.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:57.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:22:57.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:22:57.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:22:57.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:22:57.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:57.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:22:57.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:22:57.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:22:57.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:22:57.950 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:22:57.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:22:57.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:22:57.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:22:58.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:22:58.480 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:22:58.481 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:22:58.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:58.482 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:22:58.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:58.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:58.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:58.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:58.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:58.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:58.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:58.913 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:22:58.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:58.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:58.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:58.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:22:59.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:22:59.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:59.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:22:59.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:59.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:59.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:22:59.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:22:59.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:22:59.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:22:59.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:22:59.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:22:59.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:22:59.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:22:59.867 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:22:59.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:22:59.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:22:59.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:22:59.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:00.345 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:23:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:00.822 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:23:00.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:00.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:00.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:00.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:00.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:00.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:00.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:00.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:00.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:00.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:00.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:00.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:00.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:00.873 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:23:00.873 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.873 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=624 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:00.874 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:05.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:05.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:05.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:05.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:05.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:05.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:05.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:05.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:05.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:05.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:05.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:23:05.890 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:23:05.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:23:05.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:05.891 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:05.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:05.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:23:05.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:05.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:23:05.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:05.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:23:05.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:23:05.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:05.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:05.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:05.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:23:05.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:05.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:23:05.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:05.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:23:05.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:23:05.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:05.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:05.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:05.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:23:05.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:05.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:23:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:05.898 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:23:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:23:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:23:05.899 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:23:05.899 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:23:05.899 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:23:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:05.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:05.904 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:23:06.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:23:06.435 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:23:06.438 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:23:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:23:06.440 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:23:06.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:06.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:06.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:23:06.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:06.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:06.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:06.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:23:06.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:23:06.862 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:23:06.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:06.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:06.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:06.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:07.337 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:23:07.814 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:23:07.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:07.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:07.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:07.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:08.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:23:08.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:23:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:08.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:08.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:08.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:09.234 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:23:09.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:23:09.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:09.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:09.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:09.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:10.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:23:10.662 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:23:10.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:10.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:10.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:10.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:11.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:23:11.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:11.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:11.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:11.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:11.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:11.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:23:12.095 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:23:12.564 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:23:13.033 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:23:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:23:13.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:23:14.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:14.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:14.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:14.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:14.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:14.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:14.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:14.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:14.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:14.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:14.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:14.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:14.378 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:23:19.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:19.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:19.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:19.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:19.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:19.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:19.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:19.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:19.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:19.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:19.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:23:19.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:23:19.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:23:19.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:19.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:19.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:19.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:23:19.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:19.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:23:19.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:19.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:23:19.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:19.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:23:19.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:19.402 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:23:19.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:23:19.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:19.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:19.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:23:19.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:19.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:23:19.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:23:19.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:23:19.406 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:23:19.407 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:19.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:23:19.893 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:23:19.934 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:23:19.937 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:23:19.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:23:19.939 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:23:19.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:19.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:19.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:23:19.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:19.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:19.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:19.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:23:19.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:23:20.370 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:23:20.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:20.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:20.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:20.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:20.846 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:23:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:23:21.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:21.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:21.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:21.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:23:22.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:23:22.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:22.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:22.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:22.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:22.757 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:23:23.235 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:23:23.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:23.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:23.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:23.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:23.710 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:23:24.184 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:23:24.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:24.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:24.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:24.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:23:24.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:24.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:24.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:24.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:24.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:25.140 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:23:25.616 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:23:26.085 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:23:26.554 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:23:27.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:23:27.505 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:23:27.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:27.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:27.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:27.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:27.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:27.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:27.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:27.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:27.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:27.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:27.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:27.659 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:23:27.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=1769 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:27.660 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1769 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:32.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:32.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:32.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:32.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:32.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:32.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:32.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:32.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:32.683 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:32.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:32.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:23:32.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:23:32.686 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:23:32.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:32.686 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:32.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:32.687 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:23:32.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:32.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:23:32.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:32.689 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:23:32.689 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:23:32.689 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:32.689 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:32.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:32.689 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:23:32.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:32.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:23:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:32.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:23:32.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:23:32.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:32.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:32.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:32.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:23:32.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:32.692 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:23:32.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:23:32.694 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:23:32.694 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:23:32.694 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:32.699 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:23:33.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:23:33.222 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:23:33.224 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:23:33.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:23:33.226 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:23:33.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:33.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:33.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:23:33.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:33.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:33.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:33.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:23:33.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:23:33.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:23:33.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:33.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:33.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:33.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:34.136 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:23:34.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:23:34.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:34.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:34.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:34.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:35.092 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:23:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:23:35.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:35.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:35.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:35.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:36.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:23:36.525 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:23:36.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:36.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:36.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:36.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:37.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:23:37.480 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:23:37.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:37.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:37.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:37.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:37.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:23:37.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:37.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:37.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:37.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:37.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:38.430 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:23:38.901 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:23:39.371 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:23:39.842 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:23:40.312 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:23:40.784 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:23:40.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:40.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:40.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:40.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:40.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:40.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:40.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:40.959 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:40.959 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:45.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:45.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:45.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:45.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:45.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:45.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:45.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:45.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:45.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:45.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:45.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:45.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:23:45.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:45.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:23:45.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:45.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:23:45.988 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:23:45.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:45.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:45.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:45.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:23:45.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:45.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:23:45.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:45.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:45.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:23:45.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:23:45.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:23:45.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:23:45.994 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:23:45.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:45.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:23:46.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:23:46.520 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:23:46.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:23:46.523 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:23:46.525 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:23:46.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:46.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:46.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:23:46.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:46.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:46.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:46.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:23:46.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:23:46.959 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:23:46.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:47.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:47.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:47.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:47.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:23:47.914 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:23:48.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:48.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:48.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:48.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:48.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:23:48.869 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:23:49.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:49.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:49.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:49.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:49.345 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:23:49.823 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:23:50.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:50.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:50.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:50.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:50.301 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:23:50.778 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:23:51.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:51.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:51.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:51.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:51.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:23:51.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:23:51.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:23:51.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:23:51.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:51.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:23:51.734 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:23:52.214 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:23:52.693 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:23:53.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:23:53.645 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:23:54.114 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:23:54.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:23:54.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:23:54.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:54.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:54.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:54.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:54.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:54.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:54.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:54.492 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (TRX1@172.18.204.20:5700/1) RX TRXD message (ver=1 fn=1818 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:54.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1818 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:23:59.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:23:59.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:23:59.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:59.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:59.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:59.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:59.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:23:59.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:59.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:59.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:23:59.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:23:59.510 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:23:59.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:23:59.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:59.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:59.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:23:59.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:23:59.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:23:59.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:23:59.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:23:59.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:23:59.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:23:59.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:59.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:59.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:23:59.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:23:59.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:23:59.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:23:59.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:59.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:23:59.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:23:59.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:23:59.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:23:59.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:23:59.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:23:59.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:23:59.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:23:59.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.524 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:23:59.524 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:23:59.524 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:23:59.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:23:59.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:24:00.012 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:24:00.055 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:24:00.057 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:24:00.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:24:00.059 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:24:00.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:24:00.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:24:00.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:24:00.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:24:00.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:24:00.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:24:00.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:24:00.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:24:00.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:24:00.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:00.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:00.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:00.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:00.966 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:24:01.444 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:24:01.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:01.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:01.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:01.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:01.921 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:24:02.399 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:24:02.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:02.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:02.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:02.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:02.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:24:03.351 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:24:03.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:03.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:03.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:03.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:24:04.306 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:24:04.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:04.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:04.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:04.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:04.784 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:24:04.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD NOHANDOVER
2026-03-11 03:24:04.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:24:04.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:24:04.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:24:04.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:24:05.262 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:24:05.740 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:24:06.219 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:24:06.697 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:24:07.175 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:24:07.653 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:24:07.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:24:07.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:24:07.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:07.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:07.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:07.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:07.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:07.780 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:24:07.780 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=1763 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.780 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:07.781 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:12.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:12.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:12.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:12.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:12.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:12.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:12.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:12.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:12.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:12.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:24:12.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:12.796 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:12.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:24:12.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:12.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:24:12.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:24:12.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:12.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:12.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:12.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:24:12.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:12.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:24:12.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.801 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:24:12.801 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:24:12.801 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:24:12.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:12.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:12.806 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:24:13.286 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:24:13.327 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:24:13.329 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:24:13.331 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:24:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:24:13.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:24:13.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:13.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:13.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:13.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:14.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:24:14.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:24:14.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:14.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:14.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:14.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:24:15.655 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:24:15.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:15.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:15.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:15.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:16.132 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:24:16.609 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:24:16.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:16.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:16.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:16.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:17.087 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:24:17.566 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:24:17.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:17.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:17.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:17.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:18.043 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:24:18.521 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:24:18.999 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:24:19.480 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:24:19.961 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:24:20.442 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:24:20.923 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:24:21.401 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:24:21.878 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:24:22.358 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:24:22.839 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:24:23.319 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:24:23.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:23.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:23.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:23.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:23.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:23.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:23.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:23.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:23.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:23.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:23.348 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:24:23.349 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.349 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.349 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.349 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:23.350 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:24:28.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:28.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:28.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:28.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:28.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:28.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:28.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:28.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:28.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:28.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:28.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:24:28.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:24:28.361 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:24:28.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:28.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:28.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:28.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:24:28.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:28.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:24:28.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:28.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:24:28.363 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:24:28.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:28.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:28.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:28.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:24:28.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:28.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:24:28.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:28.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:28.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:24:28.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:24:28.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:24:28.369 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:24:28.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:24:28.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:24:28.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:28.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:28.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:28.371 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:24:33.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:33.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:33.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:33.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:33.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:33.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:33.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:33.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:33.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:33.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:33.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:24:33.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:24:33.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:24:33.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:33.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:33.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:33.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:24:33.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:33.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:24:33.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:33.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:24:33.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:24:33.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:33.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:33.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:33.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:24:33.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:33.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:24:33.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:33.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:24:33.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:24:33.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:33.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:33.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:33.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:24:33.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:33.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:24:33.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:33.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:24:33.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:24:33.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:24:33.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:24:33.401 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:24:33.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:24:33.886 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:24:33.932 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:24:33.934 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:24:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:24:33.936 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:24:33.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:24:33.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:24:33.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:24:33.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:24:33.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:24:33.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:24:33.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:24:33.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:24:34.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:24:34.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:34.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:34.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:34.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:24:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:24:35.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:35.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:35.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:35.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:35.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:24:36.270 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:24:36.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:36.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:36.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:36.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:36.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:24:37.220 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:24:37.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:37.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:37.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:24:38.166 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:24:38.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:38.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:38.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:38.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:38.638 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:24:39.117 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:24:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:24:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:24:40.549 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:24:41.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:24:41.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:24:41.981 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:24:41.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:24:41.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:24:41.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:41.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:41.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:41.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:41.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:41.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:41.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:41.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:41.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:41.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:41.985 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:24:46.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:46.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:46.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:46.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:46.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:46.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:47.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:47.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:47.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:47.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:47.004 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:24:47.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:24:47.007 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:24:47.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:47.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:47.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:47.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:24:47.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:47.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:24:47.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:47.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:24:47.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:24:47.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:47.011 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:47.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:47.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:24:47.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:47.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:24:47.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:47.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:47.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:24:47.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:47.014 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:24:47.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:24:47.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:24:47.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:24:47.014 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:24:47.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:24:47.015 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:24:47.015 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:47.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:47.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:47.016 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:24:52.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:24:52.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:24:52.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:52.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:52.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:52.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:52.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:24:52.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:52.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:52.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:24:52.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:24:52.034 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:24:52.034 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:24:52.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:52.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:52.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:24:52.035 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:24:52.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:24:52.036 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:24:52.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:52.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:24:52.036 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:24:52.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:52.036 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:52.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:24:52.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:24:52.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:24:52.037 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:24:52.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:52.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:24:52.038 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:24:52.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:52.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:24:52.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:24:52.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:24:52.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:24:52.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:24:52.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:24:52.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:24:52.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:24:52.042 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:24:52.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:24:52.047 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:24:52.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:24:52.569 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:24:52.571 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:24:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:24:52.574 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:24:52.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:24:52.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:24:52.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:24:52.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:24:52.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:24:52.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:24:52.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:24:52.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:24:53.007 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:24:53.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:53.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:53.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:53.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:24:53.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:24:54.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:54.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:54.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:54.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:54.437 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:24:54.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:24:55.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:55.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:55.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:55.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:55.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:24:55.869 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:24:56.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:56.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:56.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:56.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:56.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:24:56.824 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:24:57.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:24:57.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:24:57.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:24:57.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:24:57.301 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:24:57.779 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:24:58.257 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:24:58.735 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:24:59.213 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:24:59.690 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:25:00.168 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:25:00.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:00.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:00.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:00.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:00.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:00.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:00.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:00.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:00.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:00.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:00.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:00.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:00.626 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:00.626 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:05.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:05.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:05.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:05.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:05.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:05.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:05.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:05.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:05.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:05.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:05.639 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:05.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:05.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:05.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:05.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:05.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:05.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:05.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:05.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:05.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:05.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:05.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:05.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:05.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:05.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:05.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:05.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:05.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:05.647 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:05.647 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:05.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:05.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:05.651 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:05.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:05.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:05.653 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:05.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:10.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:10.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:10.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:10.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:10.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:10.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:10.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:10.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:10.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:10.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:10.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:10.684 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:10.685 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:10.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:10.685 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:10.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:10.686 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:10.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:10.686 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:10.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:10.689 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:10.689 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:10.689 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:10.689 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:10.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:10.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:10.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:10.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:10.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:10.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:10.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:10.693 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.697 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:10.697 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:10.698 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:10.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:25:11.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:25:11.229 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:25:11.231 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:25:11.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:25:11.232 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:11.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:25:11.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:25:11.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:25:11.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:25:11.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:11.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:11.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:11.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:12.140 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:25:12.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:25:12.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:12.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:12.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:12.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:13.095 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:25:13.573 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:25:13.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:13.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:13.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:13.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:14.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:25:14.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:25:14.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:14.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:14.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:14.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:14.991 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:25:15.466 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:25:15.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:15.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:15.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:15.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:15.935 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:25:16.411 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:25:16.889 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:25:17.367 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:25:17.845 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:25:18.322 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:25:18.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:25:19.277 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:25:19.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:19.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:19.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:19.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:19.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:19.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:19.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:19.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:19.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:19.285 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:19.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:24.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:24.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:24.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:24.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:24.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:24.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:24.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:24.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:24.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:24.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:24.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:24.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:24.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:24.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:24.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:24.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:24.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:24.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:24.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:24.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:24.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:24.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:24.297 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:24.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:24.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:24.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:24.300 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:24.300 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:24.300 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:24.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:24.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:24.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:24.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:24.302 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:24.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:24.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:29.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:29.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:29.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:29.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:29.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:29.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:29.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:29.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:29.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:29.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:29.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:29.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:29.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:29.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:29.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:29.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:29.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:29.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:29.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:29.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:29.326 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:29.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:29.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:29.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:29.328 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:29.328 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:29.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:29.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:29.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:29.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:29.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:29.329 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:29.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:29.332 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:29.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:29.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:25:29.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:25:29.858 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:25:29.858 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:25:29.859 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:25:29.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:25:29.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:29.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:29.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:25:29.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:25:29.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:25:29.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:25:29.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:25:29.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:25:30.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:25:30.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:30.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:30.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:30.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:30.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:25:31.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:25:31.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:31.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:25:32.208 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:25:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:32.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:32.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:32.686 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:25:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:25:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:33.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:33.642 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:25:34.119 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:25:34.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:34.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:34.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:34.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:34.597 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:25:35.075 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:25:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:25:36.030 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:25:36.507 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:25:36.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:25:37.463 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:25:37.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:37.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:37.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:37.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:37.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:37.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:37.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:37.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:37.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:37.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:37.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:37.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:37.922 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:37.922 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:25:42.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:42.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:42.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:42.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:42.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:42.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:42.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:42.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:42.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:42.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:42.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:42.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:42.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:42.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:42.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:42.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:42.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:42.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:42.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:42.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:42.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:42.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:42.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:42.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:42.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:42.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:42.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:42.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:42.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:42.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:42.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:42.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:42.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:42.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:42.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:42.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:42.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:42.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:42.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:42.949 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:42.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:42.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:42.950 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:42.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:25:47.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:25:47.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:47.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:47.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:47.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:47.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:25:47.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:47.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:47.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:25:47.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:25:47.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:25:47.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:25:47.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:47.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:47.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:25:47.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:25:47.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:25:47.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:25:47.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:47.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:25:47.966 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:25:47.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:47.968 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:25:47.968 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:25:47.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:25:47.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:25:47.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:25:47.971 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:25:47.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:25:47.975 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:25:48.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:25:48.493 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:25:48.494 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:25:48.495 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:25:48.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:25:48.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:25:48.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:25:48.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:25:48.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:25:48.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:25:48.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:25:48.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:25:48.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:25:48.935 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:25:48.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:48.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:48.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:49.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:25:49.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:25:49.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:49.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:49.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:50.368 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:25:50.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:25:50.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:50.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:50.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:50.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:51.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:25:51.800 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:25:51.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:51.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:51.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:51.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:52.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:25:52.755 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:25:52.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:25:52.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:25:52.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:25:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:25:53.233 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:25:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:25:54.183 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:25:54.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:25:55.138 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:25:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:25:56.094 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:25:56.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:25:57.048 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:25:57.526 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:25:58.004 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:25:58.482 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:25:58.959 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:25:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:25:59.915 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:26:00.393 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:26:00.870 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:26:01.348 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:26:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:26:02.304 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:26:02.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:02.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:02.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:02.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:02.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:02.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:02.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:02.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:02.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:02.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:02.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:02.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:02.514 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:02.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3106 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3106 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.514 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:02.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3107 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:07.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:07.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:07.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:07.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:07.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:07.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:07.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:07.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:07.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:07.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:07.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:07.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:07.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:07.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:07.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:07.529 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:07.529 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:07.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:07.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:07.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:07.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:07.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:07.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:07.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:07.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:07.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:07.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:07.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:07.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:07.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:07.534 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:07.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:07.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:07.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:07.535 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:07.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:12.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:12.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:12.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:12.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:12.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:12.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:12.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:12.566 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:12.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:12.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:12.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:12.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:12.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:12.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:12.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:12.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:12.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:12.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:12.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:12.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:12.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:12.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:12.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:12.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:12.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:12.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:12.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:12.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:12.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:12.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:12.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:12.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:12.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:12.576 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:12.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:12.577 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:12.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:12.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:12.582 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:12.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:12.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:26:13.070 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:26:13.119 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:26:13.122 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:26:13.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:26:13.125 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:26:13.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:13.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:13.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:26:13.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:26:13.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:26:13.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:26:13.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:26:13.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:26:13.547 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:26:13.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:13.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:13.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:13.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:14.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:26:14.502 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:26:14.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:14.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:14.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:14.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:14.979 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:26:15.457 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:26:15.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:15.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:15.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:15.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:15.934 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:26:16.411 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:26:16.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:16.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:16.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:16.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:16.889 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:26:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:26:17.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:17.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:17.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:17.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:26:18.322 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:26:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:26:19.277 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:26:19.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:26:20.231 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:26:20.708 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:26:21.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:21.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:21.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:21.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:21.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:21.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:21.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:21.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:21.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:21.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:21.173 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:21.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:21.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:21.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:21.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:26:26.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:26.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:26.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:26.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:26.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:26.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:26.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:26.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:26.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:26.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:26.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:26.190 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:26.190 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:26.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:26.190 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:26.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:26.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:26.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:26.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:26.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:26.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:26.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:26.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:26.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:26.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:26.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:26.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:26.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:26.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:26.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:26.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:26.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:26.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:26.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:26.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:26.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:26.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:26.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:26.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:26.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:26.200 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:26.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:26.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:26.202 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:26.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:31.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:31.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:31.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:31.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:31.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:31.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:31.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:31.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:31.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:31.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:31.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:31.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:31.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:31.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:31.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:31.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:31.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:31.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:31.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:31.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:31.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:31.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:31.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:31.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:31.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:31.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:31.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:31.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:31.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:31.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:31.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:31.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:31.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:31.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:31.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:31.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:31.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:31.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:31.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:31.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:31.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:31.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:31.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:31.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:31.232 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:31.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:26:31.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:31.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:26:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:26:31.755 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:26:31.757 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:26:31.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:26:31.759 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:26:31.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:31.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:31.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:26:31.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:26:31.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:26:31.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:26:31.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:26:31.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:26:32.198 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:26:32.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:32.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:32.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:32.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:26:33.153 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:26:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:33.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:33.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:26:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:26:34.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:34.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:34.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:34.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:34.584 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:26:35.058 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:26:35.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:35.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:35.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:35.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:35.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:26:36.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:26:36.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:36.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:36.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:36.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:36.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:26:36.966 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:26:37.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:26:37.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:26:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:26:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:26:39.353 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:26:39.831 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:26:40.308 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:26:40.786 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:26:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:26:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:26:41.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:41.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:41.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:41.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:41.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:41.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:41.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:41.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:41.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:41.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:41.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:41.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:41.774 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:46.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:46.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:46.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:46.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:46.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:46.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:46.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:46.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:46.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:46.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:46.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:46.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:46.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:46.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:46.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:46.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:46.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:46.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:46.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:46.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:46.794 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:46.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:46.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:46.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:46.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:46.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:46.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:46.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:46.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:46.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:46.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:46.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:46.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:46.800 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:46.801 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:46.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:46.803 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:26:46.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:51.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:26:51.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:26:51.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:51.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:51.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:51.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:51.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:26:51.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:51.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:51.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:26:51.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:26:51.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:26:51.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:26:51.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:51.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:51.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:26:51.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:26:51.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:26:51.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:26:51.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:51.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:26:51.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:26:51.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:51.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:51.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:26:51.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:26:51.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:26:51.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:26:51.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:51.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:26:51.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:26:51.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:26:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:26:51.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:26:51.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:26:51.832 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:26:51.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:26:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:26:52.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:26:52.366 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:26:52.369 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:26:52.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:26:52.371 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:26:52.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:26:52.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:26:52.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:26:52.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:26:52.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:52.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:52.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:52.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:53.274 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:26:53.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:26:53.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:53.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:53.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:54.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:26:54.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:26:54.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:54.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:54.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:54.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:55.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:26:55.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:26:55.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:55.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:55.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:55.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:56.137 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:26:56.614 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:26:56.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:26:56.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:26:56.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:26:56.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:26:57.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:26:57.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:26:58.047 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:26:58.524 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:26:59.001 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:26:59.479 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:26:59.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:27:00.434 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:27:00.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:27:01.389 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:27:01.867 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:27:02.345 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:27:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:27:03.300 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:27:03.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:27:03.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:27:03.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:03.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:03.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:03.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:03.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:03.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:03.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:03.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:03.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:03.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:03.419 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:08.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:08.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:08.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:08.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:08.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:08.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:08.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:08.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:08.434 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:08.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:08.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:27:08.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:27:08.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:27:08.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:08.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:08.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:08.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:08.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:08.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:08.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:27:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:08.437 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:08.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:27:08.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:27:08.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:27:08.438 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:27:08.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:08.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:08.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:08.440 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:13.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:13.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:13.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:13.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:13.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:13.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:13.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:13.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:13.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:13.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:13.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:27:13.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:27:13.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:27:13.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:13.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:13.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:13.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:27:13.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:13.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:27:13.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:13.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:27:13.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:27:13.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:13.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:13.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:13.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:27:13.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:13.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:27:13.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:13.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:27:13.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:27:13.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:13.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:13.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:13.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:27:13.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:13.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:27:13.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:13.476 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:27:13.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:27:13.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:27:13.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:27:13.477 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:27:13.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:13.482 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:27:13.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:27:14.007 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:27:14.008 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:27:14.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:27:14.009 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:27:14.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:27:14.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:27:14.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:27:14.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:27:14.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:14.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:14.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:14.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:27:15.398 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:27:15.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:15.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:15.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:15.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:27:16.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:27:16.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:16.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:16.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:16.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:27:17.309 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:27:17.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:17.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:17.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:17.787 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:27:18.265 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:27:18.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:18.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:18.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:18.743 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:27:19.220 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:27:19.698 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:27:20.176 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:27:20.654 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:27:21.132 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:27:21.609 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:27:22.086 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:27:22.564 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:27:23.042 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:27:23.516 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:27:23.994 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:27:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:27:24.949 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:27:25.427 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:27:25.904 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:27:26.382 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:27:26.859 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:27:27.337 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:27:27.814 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:27:28.291 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:27:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:27:29.246 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:27:29.724 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:27:30.202 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:27:30.679 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:27:31.156 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:27:31.634 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:27:32.112 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:27:32.589 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:27:33.066 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:27:33.544 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:27:34.022 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:27:34.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:27:34.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:27:34.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:34.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:34.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:34.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:34.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:34.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:34.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:34.073 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:34.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:39.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:39.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:39.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:39.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:39.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:39.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:39.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:39.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:39.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:39.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:39.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:27:39.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:27:39.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:27:39.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:39.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:39.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:39.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:27:39.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:39.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:27:39.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:39.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:27:39.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:27:39.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:39.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:39.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:39.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:27:39.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:39.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:27:39.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:39.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:39.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:27:39.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:39.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:27:39.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:27:39.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:27:39.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:27:39.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:27:39.100 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:27:39.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:27:39.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:39.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:39.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:39.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:39.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:39.103 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:44.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:44.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:44.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:44.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:44.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:44.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:44.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:44.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:44.117 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:44.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:44.118 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:27:44.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:27:44.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:27:44.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:44.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:44.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:44.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:27:44.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:44.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:27:44.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:44.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:27:44.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:27:44.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:44.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:44.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:44.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:27:44.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:44.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:27:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:44.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:44.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:44.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:27:44.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:44.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:27:44.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:27:44.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:27:44.131 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:27:44.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:44.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:44.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:27:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:27:44.665 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:27:44.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:27:44.669 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:27:44.671 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:27:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:27:45.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:45.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:45.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:45.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:45.579 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:27:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:27:46.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:46.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:46.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:46.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:46.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:27:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:27:47.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:47.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:47.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:47.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:47.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:27:47.971 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:27:48.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:48.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:48.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:48.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:48.440 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:27:48.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:27:49.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:49.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:49.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:49.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:49.378 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:27:49.848 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:27:50.326 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:27:50.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:27:51.281 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:27:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:27:52.237 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:27:52.715 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:27:53.193 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:27:53.665 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:27:54.142 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:27:54.620 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:27:54.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:54.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:54.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:54.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:54.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:54.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:54.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:54.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:54.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:54.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:54.684 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:54.684 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:27:59.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:59.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:59.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:59.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:59.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:59.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:59.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:59.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:59.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:59.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:27:59.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:59.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:27:59.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:27:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:59.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:27:59.711 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:27:59.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:27:59.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:27:59.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:27:59.712 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:59.712 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:27:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:27:59.712 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:27:59.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:27:59.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:27:59.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:27:59.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:27:59.715 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:27:59.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:27:59.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:27:59.716 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:27:59.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:04.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:04.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:04.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:04.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:04.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:04.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:04.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:04.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:04.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:04.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:04.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:04.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:04.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:04.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:04.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:04.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:04.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:04.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:04.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:04.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:04.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:04.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:04.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:04.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:04.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:04.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:04.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:04.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:04.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:04.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:04.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:04.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:04.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:04.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:04.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:04.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:04.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:04.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:04.746 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:04.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:28:04.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:04.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:28:05.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:28:05.277 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:28:05.279 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:28:05.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:28:05.281 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:28:05.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:28:05.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:05.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:05.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:05.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:06.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:28:06.674 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:28:06.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:06.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:06.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:06.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:07.152 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:28:07.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:28:07.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:07.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:07.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:07.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:28:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:28:08.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:08.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:08.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:08.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:09.056 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:28:09.526 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:28:09.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:09.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:09.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:09.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:10.006 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:28:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:28:10.968 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:28:11.449 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:28:11.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:28:12.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:28:12.883 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:28:13.365 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:28:13.837 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:28:14.306 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:28:14.775 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:28:15.244 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:28:15.722 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:28:16.200 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:28:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:28:17.142 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:28:17.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:17.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:17.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:17.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:17.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:17.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:17.296 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:17.296 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2688 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:22.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:22.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:22.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:22.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:22.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:22.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:22.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:22.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:22.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:22.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:22.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:22.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:22.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:22.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:22.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:22.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:22.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:22.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:22.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:22.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:22.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:22.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:22.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:22.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:22.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:22.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:22.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:22.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:22.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:22.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:22.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:22.325 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:22.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:22.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:22.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:22.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:22.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:22.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:22.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:22.329 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:22.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:22.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:22.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:22.331 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:22.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:27.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:27.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:27.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:27.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:27.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:27.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:27.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:27.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:27.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:27.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:27.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:27.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:27.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:27.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:27.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:27.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:27.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:27.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:27.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:27.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:27.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:27.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:27.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:27.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:27.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:27.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:27.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:27.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:27.357 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:27.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:27.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:27.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:27.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:28:27.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:28:27.888 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:28:27.891 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:28:27.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:28:27.893 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:28:27.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:28:27.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:28:27.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:28:27.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:27.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:28:27.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:28:27.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:28:27.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:28:27.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:28:27.935 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:28:27.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:27.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:28.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:28:28.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:28.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:28.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:28.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:28:29.276 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:28:29.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:29.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:29.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:28:30.232 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:28:30.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:30.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:30.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:30.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:30.710 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:28:31.188 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:28:31.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:31.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:31.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:31.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:31.666 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:28:32.144 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:28:32.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:32.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:32.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:32.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:32.622 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:28:33.100 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:28:33.578 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:28:34.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:28:34.534 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:28:35.011 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:28:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:28:35.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:28:35.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:28:35.940 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:28:35.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:35.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:35.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:35.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:35.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:35.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:35.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:35.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:35.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:35.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:35.946 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:35.946 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:40.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:40.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:40.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:40.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:40.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:40.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:40.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:40.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:40.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:40.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:40.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:40.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:40.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:40.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:40.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:40.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:40.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:40.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:40.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:40.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:40.965 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:40.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:40.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:40.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:40.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:40.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:40.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:40.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:40.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:40.970 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:40.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:40.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:40.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:40.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:40.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:40.972 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:40.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:45.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:45.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:45.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:45.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:45.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:45.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:45.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:45.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:45.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:45.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:45.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:45.991 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:45.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:45.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:45.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:45.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:45.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:45.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:45.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:45.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:45.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:45.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:45.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:45.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:45.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:45.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:45.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:45.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:45.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:45.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:45.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:45.997 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:45.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:45.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:46.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:46.000 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:46.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:46.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:28:46.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:28:46.488 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:28:46.526 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:28:46.527 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:28:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:28:46.528 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:28:46.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:28:46.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:28:46.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:28:46.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:46.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:28:46.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:28:46.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:28:46.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:28:46.531 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:28:46.531 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:28:46.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:46.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:28:46.966 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:28:47.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:47.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:47.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:47.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:47.444 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:28:47.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:28:48.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:48.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:48.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:48.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:48.400 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:28:48.878 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:28:49.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:49.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:49.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:49.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:49.356 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:28:49.835 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:28:50.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:50.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:50.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:50.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:50.312 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:28:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:28:51.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:51.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:51.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:51.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:51.268 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:28:51.746 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:28:52.223 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:28:52.701 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:28:53.179 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:28:53.651 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:28:54.126 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:28:54.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:28:54.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:28:54.536 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:28:54.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:54.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:54.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:54.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:54.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:54.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:54.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:54.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:54.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:54.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:54.544 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:54.544 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:28:59.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:59.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:59.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:59.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:59.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:59.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:59.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:59.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:59.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:59.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:28:59.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:28:59.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:28:59.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:28:59.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:59.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:59.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:28:59.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:28:59.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:28:59.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:28:59.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:28:59.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:28:59.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:28:59.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:59.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:59.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:28:59.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:28:59.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:28:59.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:28:59.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:59.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:28:59.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:28:59.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:28:59.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:28:59.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:59.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:59.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:59.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:28:59.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:28:59.575 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:28:59.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:28:59.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:59.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:59.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:28:59.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:28:59.576 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:28:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:04.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:04.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:04.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:04.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:04.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:04.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:04.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:04.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:04.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:04.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:29:04.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:29:04.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:29:04.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:04.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:04.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:04.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:29:04.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:04.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:29:04.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:04.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:29:04.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:29:04.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:04.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:04.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:04.606 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:29:04.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:04.606 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:29:04.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:04.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:29:04.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:29:04.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:04.609 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:04.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:04.609 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:29:04.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:04.609 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:29:04.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:04.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:29:04.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:29:04.613 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:29:04.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:29:05.101 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:29:05.142 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:29:05.143 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:29:05.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:29:05.145 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:29:05.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:05.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:05.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:29:05.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:05.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:29:05.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:29:05.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:29:05.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:29:05.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:29:05.192 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:29:05.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:05.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:05.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:29:05.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:05.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:05.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:06.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:29:06.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:29:06.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:06.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:06.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:07.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:29:07.488 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:29:07.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:07.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:07.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:07.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:07.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:29:08.443 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:29:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:08.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:08.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:08.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:08.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:29:09.398 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:29:09.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:09.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:09.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:09.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:09.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:29:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:29:10.833 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:29:11.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:29:11.789 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:29:12.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:29:12.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:29:13.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:13.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:13.196 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:29:13.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:13.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:13.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:13.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:13.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:13.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:13.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:13.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:13.205 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:29:13.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:13.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:13.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:13.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:18.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:18.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:18.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:18.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:18.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:18.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:18.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:18.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:18.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:18.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:18.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:29:18.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:29:18.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:29:18.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:18.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:18.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:18.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:29:18.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:18.216 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:29:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:18.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:29:18.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:29:18.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:18.219 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:18.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:18.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:29:18.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:18.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:29:18.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:18.222 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:18.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:29:18.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:29:18.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:29:18.227 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:29:18.227 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:29:18.227 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:29:18.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:18.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:18.229 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:18.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:23.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:23.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:23.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:23.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:23.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:23.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:23.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:23.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:23.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:23.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:23.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:29:23.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:29:23.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:29:23.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:23.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:23.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:23.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:29:23.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:23.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:29:23.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:23.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:29:23.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:29:23.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:23.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:23.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:23.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:29:23.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:23.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:29:23.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:23.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:29:23.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:29:23.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:23.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:23.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:23.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:29:23.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:23.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:29:23.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:29:23.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:29:23.255 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:29:23.255 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:29:23.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:23.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:23.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:29:23.740 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:29:23.782 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:29:23.783 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:29:23.784 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:29:23.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:29:23.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:23.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:23.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:29:23.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:23.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:29:23.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:29:23.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:29:23.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:29:23.830 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:29:23.830 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:29:23.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:24.218 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:29:24.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:24.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:24.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:24.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:24.695 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:29:25.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:29:25.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:25.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:25.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:25.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:25.652 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:29:26.130 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:29:26.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:26.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:26.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:26.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:26.607 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:29:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:29:27.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:27.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:27.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:27.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:27.563 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:29:28.040 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:29:28.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:28.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:28.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:29:28.996 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:29:29.475 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:29:29.953 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:29:30.431 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:29:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:29:31.387 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:29:31.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:31.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:31.835 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:29:31.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:31.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:31.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:31.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:31.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:31.838 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:29:36.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:36.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:36.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:36.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:36.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:36.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:36.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:36.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:36.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:36.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:36.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:29:36.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:29:36.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:29:36.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:36.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:36.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:36.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:29:36.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:36.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:29:36.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:36.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:36.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:36.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:29:36.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:36.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:36.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:29:36.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:29:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:29:36.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:29:36.865 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:29:36.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:36.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:36.867 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:36.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:41.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:41.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:41.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:41.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:41.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:41.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:41.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:41.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:41.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:41.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:29:41.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:29:41.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:29:41.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:29:41.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:41.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:41.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:41.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:29:41.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:29:41.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:29:41.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:41.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:29:41.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:29:41.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:41.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:41.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:41.895 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:29:41.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:29:41.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:29:41.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:41.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:29:41.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:29:41.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:41.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:29:41.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:41.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:29:41.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:29:41.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:29:41.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:41.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:29:41.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:29:41.904 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:29:41.904 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:29:41.904 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:29:41.909 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:29:42.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:29:42.433 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:29:42.434 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:29:42.436 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:29:42.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:29:42.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:42.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:42.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:29:42.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:42.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:29:42.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:29:42.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:29:42.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:29:42.482 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:29:42.483 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:29:42.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:42.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:29:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:29:42.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:42.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:42.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:42.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:43.348 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:29:43.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:29:43.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:43.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:43.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:43.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:44.304 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:29:44.782 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:29:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:44.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:44.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:44.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:45.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:29:45.738 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:29:45.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:45.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:45.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:45.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:46.217 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:29:46.695 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:29:46.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:46.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:46.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:46.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:47.173 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:29:47.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:29:48.129 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:29:48.607 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:29:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:29:49.563 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:29:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:29:50.519 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:29:50.988 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:29:51.460 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:29:51.939 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:29:52.416 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:29:52.894 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:29:53.368 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:29:53.837 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:29:54.308 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:29:54.784 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:29:55.257 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:29:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:29:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:29:56.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:29:56.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:29:56.489 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:29:56.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:29:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:29:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:29:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:29:56.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:29:56.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:29:56.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:29:56.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:29:56.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:29:56.492 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:29:56.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:29:56.492 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:01.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:01.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:01.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:01.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:01.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:01.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:01.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:01.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:01.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:01.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:01.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:01.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:01.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:01.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:01.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:01.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:01.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:01.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:01.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:01.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:01.501 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:01.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:01.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:01.501 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:06.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:06.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:06.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:06.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:06.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:06.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:06.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:06.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:06.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:06.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:06.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:06.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:06.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:06.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:06.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:06.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:06.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:06.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:06.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:06.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:06.522 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:06.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:06.522 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:06.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:06.522 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:06.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:06.523 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:06.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:06.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:06.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:06.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:06.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:06.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:06.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:06.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:06.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:06.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:06.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:06.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:06.532 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:06.532 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:06.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:06.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:30:07.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:30:07.054 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:30:07.054 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:30:07.055 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:07.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:30:07.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:30:07.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:30:07.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:30:07.094 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:30:07.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:07.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:07.475 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:30:07.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:07.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:07.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:07.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:30:08.413 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:30:08.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:08.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:30:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:30:09.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:09.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:09.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:09.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:09.822 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:30:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:30:10.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:10.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:10.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:10.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:10.763 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:30:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:30:11.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:11.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:11.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:11.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:11.704 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:30:12.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:30:12.650 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:30:13.123 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:30:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:30:14.071 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:30:14.549 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:30:15.022 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:30:15.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:15.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:15.099 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:30:15.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:15.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:15.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:15.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:15.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:15.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:15.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:15.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:15.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:15.106 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:30:15.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:15.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:20.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:20.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:20.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:20.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:20.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:20.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:20.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:20.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:20.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:20.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:20.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:20.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:20.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:20.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:20.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:20.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:20.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:20.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:20.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:20.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:20.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:20.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:20.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:20.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:20.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:20.127 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:20.127 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:20.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:30:20.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:20.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:20.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:20.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:20.129 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:30:25.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:25.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:25.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:25.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:25.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:25.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:25.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:25.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:25.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:25.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:25.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:25.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:25.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:25.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:25.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:25.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:25.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:25.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:25.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:25.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:25.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:25.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:25.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:25.145 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:25.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:30:25.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:30:25.681 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:30:25.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:30:25.684 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:30:25.685 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:30:25.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:25.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:25.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:30:25.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:25.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:30:25.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:30:25.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:30:25.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:30:26.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:30:26.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:26.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:26.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:26.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:26.565 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:30:27.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:30:27.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:27.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:27.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:27.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:27.519 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:30:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:30:28.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:28.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:28.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:28.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:28.468 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:30:28.940 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:30:29.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:29.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:29.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:29.415 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:30:29.893 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:30:30.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:30.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:30.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:30.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:30:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:30:31.326 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:30:31.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:30:32.279 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:30:32.754 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:30:33.233 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:30:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:30:34.187 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:30:34.663 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:30:35.133 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:30:35.602 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:30:35.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:35.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:35.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:35.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:35.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:35.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:35.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:35.722 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:35.723 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:30:40.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:40.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:40.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:40.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:40.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:40.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:40.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:40.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:40.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:40.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:40.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:40.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:40.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:40.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:40.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:40.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:40.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:40.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:40.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:40.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:40.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:40.752 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:40.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:40.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:40.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:40.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:40.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:40.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:40.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:40.754 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:40.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:40.754 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:40.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:40.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:40.757 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:40.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:40.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:40.758 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:30:40.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:45.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:45.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:45.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:45.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:45.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:45.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:45.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:45.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:45.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:45.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:30:45.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:30:45.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:30:45.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:30:45.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:45.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:45.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:45.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:30:45.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:30:45.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:30:45.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:45.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:30:45.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:30:45.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:30:45.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:45.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:30:45.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:30:45.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:45.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:30:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:30:45.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:30:45.785 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:30:45.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:30:45.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:30:46.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:30:46.315 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:30:46.317 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:30:46.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:30:46.320 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:30:46.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:46.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:46.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:30:46.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:46.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:30:46.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:30:46.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:30:46.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:30:46.362 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:30:46.362 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-03-11 03:30:46.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:46.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:30:46.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:30:46.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:46.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:46.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:46.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:47.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:30:47.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:30:47.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:47.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:47.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:47.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:48.174 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:30:48.645 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:30:48.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:48.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:48.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:48.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:49.124 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:30:49.602 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:30:49.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:49.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:49.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:49.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:50.080 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:30:50.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:30:50.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:50.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:50.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:50.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:51.035 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:30:51.512 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:30:51.988 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:30:52.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:30:52.940 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:30:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:30:53.891 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:30:54.369 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:30:54.848 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:30:55.325 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:30:55.800 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:30:56.273 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:30:56.751 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:30:57.228 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:30:57.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:30:57.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:30:57.367 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:30:57.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:30:57.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:30:57.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:30:57.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:30:57.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:30:57.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:30:57.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:30:57.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:30:57.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:30:57.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:30:57.370 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:02.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:02.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:02.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:02.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:02.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:02.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:02.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:02.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:02.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:02.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:02.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:31:02.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:31:02.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:31:02.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:02.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:02.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:02.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:31:02.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:02.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:31:02.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:02.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:02.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:31:02.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:02.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:02.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:31:02.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:31:02.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:31:02.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:31:02.396 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:31:02.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:02.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:02.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:02.398 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:02.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:07.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:07.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:07.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:07.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:07.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:07.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:07.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:07.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:31:07.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:31:07.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:31:07.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:07.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:07.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:07.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:31:07.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:07.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:31:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:07.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:31:07.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:31:07.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:07.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:07.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:31:07.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:07.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:31:07.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:07.429 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:31:07.429 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:31:07.429 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:07.429 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:07.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:07.429 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:31:07.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:07.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:31:07.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:31:07.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:31:07.432 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:31:07.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:07.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:31:07.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:31:07.966 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:31:07.968 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:31:07.969 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:31:07.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:31:08.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:31:08.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:08.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:08.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:08.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:08.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:31:09.314 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:31:09.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:09.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:09.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:09.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:09.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:31:10.252 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:31:10.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:10.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:10.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:10.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:31:11.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:31:11.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:11.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:11.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:11.660 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:31:12.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:31:12.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:12.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:12.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:12.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:12.599 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:31:13.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:31:13.538 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:31:14.014 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:31:14.491 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:31:14.963 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:31:15.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:31:15.904 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:31:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:31:16.841 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:31:17.311 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:31:17.782 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:31:17.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:17.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:17.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:17.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:17.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:17.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:17.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:17.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:17.984 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:17.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:17.984 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.985 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.986 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.986 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.986 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:17.986 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:22.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:22.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:22.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:22.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:22.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:22.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:22.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:22.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:22.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:22.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:22.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:22.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:31:22.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:22.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:31:23.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:23.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:23.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:31:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:23.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:23.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:31:23.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:31:23.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:31:23.005 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:31:23.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:23.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:23.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:23.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:23.007 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:28.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:28.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:28.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:28.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:28.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:28.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:28.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:28.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:28.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:28.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:28.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:31:28.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:31:28.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:31:28.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:28.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:28.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:28.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:31:28.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:28.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:31:28.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:28.027 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:31:28.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:31:28.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:28.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:28.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:28.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:31:28.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:28.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:31:28.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:28.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:28.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:31:28.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:31:28.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:31:28.033 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:31:28.034 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:28.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:28.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:28.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:31:28.515 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:31:28.572 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:31:28.575 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:31:28.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:31:28.576 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:31:28.987 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:31:29.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:29.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:29.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:29.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:29.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:31:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:31:30.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:30.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:30.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:30.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:30.398 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:31:30.866 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:31:31.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:31.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:31.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:31.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:31.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:31:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:31:32.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:32.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:32.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:32.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:32.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:31:32.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:31:33.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:33.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:33.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:33.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:33.214 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:31:33.682 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:31:34.151 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:31:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:31:35.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:31:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:31:36.033 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:31:36.502 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:31:36.971 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:31:37.444 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:31:37.913 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:31:38.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:31:38.853 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:31:39.322 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:31:39.792 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:31:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:31:40.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:40.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:40.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:40.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:40.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:40.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:40.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:40.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:40.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:40.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:40.595 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:40.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2725 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.595 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2725 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2725 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2725 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.596 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.597 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.597 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.597 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:40.597 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:45.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:45.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:45.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:45.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:45.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:45.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:45.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:45.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:45.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:31:45.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:45.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:31:45.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:31:45.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:45.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:31:45.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:31:45.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:31:45.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:45.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:31:45.620 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:31:45.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:45.622 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:31:45.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:31:45.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:31:45.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:31:45.623 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:31:45.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:31:45.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:31:46.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:31:46.145 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:31:46.146 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:31:46.148 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:31:46.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:31:46.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:31:46.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:31:46.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:31:46.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:31:46.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:31:46.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:31:46.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:31:46.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:31:46.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:31:46.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:46.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:46.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:47.047 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:31:47.520 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:31:47.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:47.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:47.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:47.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:47.990 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:31:48.462 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:31:48.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:48.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:48.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:48.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:48.931 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:31:49.401 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:31:49.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:49.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:49.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:49.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:49.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:31:50.342 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:31:50.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:50.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:50.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:50.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:50.818 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:31:51.289 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:31:51.767 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:31:52.243 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:31:52.720 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:31:53.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:31:53.669 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:31:54.138 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:31:54.609 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:31:55.080 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:31:55.557 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:31:56.030 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:31:56.500 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:31:56.970 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:31:57.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:31:57.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:31:57.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:31:57.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:31:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:31:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:31:57.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:31:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:31:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:31:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:31:57.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:31:57.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:31:57.207 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:31:57.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2501 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:02.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:02.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:02.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:02.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:02.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:02.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:02.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:02.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:02.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:02.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:02.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:32:02.220 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:32:02.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:32:02.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:02.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:02.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:02.221 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:32:02.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:02.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:32:02.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:02.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:32:02.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:02.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:32:02.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:02.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:32:02.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:32:02.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:02.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:02.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:02.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:32:02.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:02.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:32:02.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:02.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:32:02.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:32:02.231 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:32:02.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:02.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:32:02.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:32:02.763 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:32:02.764 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:32:02.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:02.765 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:02.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:02.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:02.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:03.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:32:03.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:03.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:03.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:03.645 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:32:04.115 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:32:04.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:04.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:04.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:04.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:04.586 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:32:05.056 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:32:05.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:05.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:05.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:05.527 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:32:05.998 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:32:06.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:06.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:06.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:06.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:06.468 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:32:06.940 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:32:07.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:07.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:07.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:07.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:07.414 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:32:07.890 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:32:08.362 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:32:08.833 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:32:09.305 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:32:09.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:32:10.248 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:32:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:32:11.196 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:32:11.669 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:32:12.142 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:32:12.611 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:32:13.084 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:32:13.556 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:32:14.029 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:32:14.507 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:32:14.979 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:32:15.449 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:32:15.920 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:32:16.391 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:32:16.862 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:32:17.333 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:32:17.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:17.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:17.804 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:32:17.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:17.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:17.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:17.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:17.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:17.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:17.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:17.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:17.811 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:32:17.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3369 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.812 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.813 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.813 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.813 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.813 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:17.813 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:22.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:22.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:22.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:22.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:22.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:22.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:22.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:22.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:22.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:22.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:22.823 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:32:22.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:32:22.826 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:32:22.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:22.826 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:22.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:22.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:32:22.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:22.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:32:22.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:22.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:32:22.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:32:22.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:22.831 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:22.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:22.831 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:32:22.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:22.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:32:22.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:22.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:32:22.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:32:22.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:22.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:22.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:22.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:32:22.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:22.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:32:22.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:22.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:32:22.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:32:22.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:32:22.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:32:22.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:32:22.839 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:32:22.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:22.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:32:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:32:23.369 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:32:23.370 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:32:23.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:23.372 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:32:23.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:23.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:23.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:23.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:23.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:23.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:23.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:23.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:23.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:23.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:23.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:23.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:23.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:23.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:23.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:23.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:23.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:23.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:23.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:23.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:23.418 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.419 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:23.420 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:28.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:28.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:28.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:28.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:28.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:28.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:28.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:28.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:28.437 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:28.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:28.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:32:28.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:32:28.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:32:28.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:28.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:28.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:28.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:32:28.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:28.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:32:28.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:28.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:28.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:32:28.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:28.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:32:28.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:32:28.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:28.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:28.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:32:28.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:28.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:28.448 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:32:28.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:28.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:32:28.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:32:28.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:32:28.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:32:28.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:32:28.453 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:32:28.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:28.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:32:28.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:32:28.978 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:32:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:28.980 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:32:28.982 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:32:29.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:29.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:29.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:29.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:29.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:32:29.171 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:32:29.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.339 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:32:29.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:29.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:29.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:32:29.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:29.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:29.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:29.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:29.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:29.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:29.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:29.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:29.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:29.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:29.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:29.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:29.825 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:32:29.825 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:32:29.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:29.883 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:32:30.350 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:32:30.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:30.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:30.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:30.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:30.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:30.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:30.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:30.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:30.663 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:32:30.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:30.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:30.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:30.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:30.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:30.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:30.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:30.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:30.672 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:30.672 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=480 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:35.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:35.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:35.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:35.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:35.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:35.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:35.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:35.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:35.687 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:35.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:32:35.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:32:35.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:32:35.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:32:35.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:35.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:35.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:32:35.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:32:35.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:32:35.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:35.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:32:35.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:32:35.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:35.694 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:32:35.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:32:35.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:32:35.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:32:35.696 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:32:35.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:32:35.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:32:35.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:32:36.183 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:32:36.223 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:32:36.225 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:32:36.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:36.227 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:32:36.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:36.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:36.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:36.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:36.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:36.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:36.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:36.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:36.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:36.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:36.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:36.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:36.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:36.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:36.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:36.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:36.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:32:36.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:36.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:36.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:36.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:37.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:32:37.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:32:37.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:37.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:37.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:37.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:32:38.550 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:32:38.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:38.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:38.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:38.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:39.027 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:32:39.500 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:32:39.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:39.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:39.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:39.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:39.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:32:40.444 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:32:40.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:40.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:40.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:40.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:40.921 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:32:41.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:41.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:41.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:41.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:41.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:41.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:41.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:41.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:41.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:41.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:41.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:41.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:41.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:41.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:41.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:41.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:41.392 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:32:41.392 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:32:41.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:41.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:41.393 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:32:41.864 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:32:42.335 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:32:42.805 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:32:43.276 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:32:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:32:44.223 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:32:44.696 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:32:45.170 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:32:45.642 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:32:46.118 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:32:46.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:46.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:46.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:46.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:46.397 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:32:46.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:46.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:46.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:46.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:46.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:46.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:46.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:46.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:46.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:46.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:46.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:46.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:46.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:46.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:46.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:46.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:46.591 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:32:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:32:47.539 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:32:48.014 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:32:48.492 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:32:48.970 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:32:49.447 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:32:49.922 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:32:50.398 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:32:50.876 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:32:51.354 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:32:51.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:51.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:51.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:51.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:51.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:51.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:51.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:51.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:51.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:51.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:32:51.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:51.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:51.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:32:51.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:32:51.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:32:51.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:32:51.490 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:32:51.490 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:32:51.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:51.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:51.829 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:32:52.301 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:32:52.773 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:32:53.243 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:32:53.714 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:32:54.190 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:32:54.664 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:32:55.133 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:32:55.604 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:32:56.075 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:32:56.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:32:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:32:56.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:32:56.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:32:56.499 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:32:56.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:32:56.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:32:56.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:32:56.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:32:56.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:32:56.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:32:56.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:32:56.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:32:56.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:32:56.515 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:32:56.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:32:56.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.515 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.516 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:32:56.517 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:01.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:33:01.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:33:01.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:01.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:01.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:01.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:01.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:01.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:01.535 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:01.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:01.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:33:01.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:33:01.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:33:01.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:01.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:01.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:01.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:33:01.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:01.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:33:01.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:01.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:01.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:01.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:33:01.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:01.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:01.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:33:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:33:01.546 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:33:01.546 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:33:01.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:01.551 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:33:02.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:33:02.073 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:33:02.074 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:33:02.076 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:33:02.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:02.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:02.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:02.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:02.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:02.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:02.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:02.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:02.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:02.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:02.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:02.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:02.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:02.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:02.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:02.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:02.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:02.489 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:33:02.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:02.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:02.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:02.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:02.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:33:03.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:33:03.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:03.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:03.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:03.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:03.899 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:33:04.376 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:33:04.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:04.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:04.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:04.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:04.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:33:05.319 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:33:05.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:05.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:05.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:05.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:05.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:33:06.261 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:33:06.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:06.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:06.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:33:07.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:07.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:07.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:07.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:07.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:07.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:07.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:07.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:07.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:07.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:07.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:07.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:07.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:07.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:07.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:07.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:07.197 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:33:07.197 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:33:07.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:07.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:07.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:33:07.673 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:33:08.143 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:33:08.620 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:33:09.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:33:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:33:10.033 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:33:10.504 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:33:10.975 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:33:11.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:33:11.916 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:33:12.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:12.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:12.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:12.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:12.205 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:33:12.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:12.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:12.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:12.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:12.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:12.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:12.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:12.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:12.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:12.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:12.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:12.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:12.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:12.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:12.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:12.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:12.388 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:33:12.861 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:33:13.333 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:33:13.810 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:33:14.285 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:33:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:33:15.229 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:33:15.704 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:33:16.176 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:33:16.648 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:33:17.126 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:33:17.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:17.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:17.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:17.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:17.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:17.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:17.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:17.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:17.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:17.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:17.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:17.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:17.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:17.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:17.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:17.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:17.311 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:33:17.311 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:33:17.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:17.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:17.600 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:33:18.069 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:33:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:33:19.018 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:33:19.488 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:33:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:33:20.440 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:33:20.912 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:33:21.389 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:33:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:33:22.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:22.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:22.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:22.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:22.321 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:33:22.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:22.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:22.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:22.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:22.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:22.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:22.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:22.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:22.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:33:22.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:33:22.336 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:33:22.336 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:22.337 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4489 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:27.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:33:27.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:33:27.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:27.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:27.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:27.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:27.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:27.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:27.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:27.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:27.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:33:27.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:33:27.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:33:27.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:27.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:27.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:27.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:33:27.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:27.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:33:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:27.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:27.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:33:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:27.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:33:27.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:27.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:33:27.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:33:27.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:33:27.356 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:33:27.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:27.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:27.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:33:27.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:33:27.892 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:33:27.894 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:33:27.896 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:33:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:27.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:27.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:27.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:27.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:27.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:27.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:27.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:27.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:27.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:27.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:27.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:27.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:27.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:27.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:27.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:27.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:28.301 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:33:28.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:28.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:28.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:28.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:28.771 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:33:29.241 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:33:29.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:29.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:29.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:29.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:29.711 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:33:30.185 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:33:30.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:30.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:30.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:30.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:30.658 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:33:31.130 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:33:31.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:31.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:31.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:31.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:31.605 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:33:32.079 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:33:32.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:32.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:32.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:32.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:32.549 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:33:32.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:32.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:32.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:32.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:32.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:32.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:32.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:32.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:32.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:32.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:33.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:33.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:33.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:33.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:33.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:33.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:33.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:33:33.015 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:33:33.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:33.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:33.019 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:33:33.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:33:33.960 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:33:34.431 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:33:34.901 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:33:35.372 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:33:35.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:33:36.320 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:33:36.790 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:33:37.261 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:33:37.732 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:33:38.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:38.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:38.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:38.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:38.023 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:33:38.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:38.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:38.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:38.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:38.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:38.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:38.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:38.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:38.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:38.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:38.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:38.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:38.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:38.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:38.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:38.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:38.203 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:33:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:33:39.147 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:33:39.620 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:33:40.092 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:33:40.566 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:33:41.035 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:33:41.505 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:33:41.977 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:33:42.451 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:33:42.923 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:33:43.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:43.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:43.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:43.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:43.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:43.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:43.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:43.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:43.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:43.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:43.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:43.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:43.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:43.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:43.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:43.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:43.104 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:33:43.104 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:33:43.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:43.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:43.394 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:33:43.865 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:33:44.335 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:33:44.806 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:33:45.277 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:33:45.753 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:33:46.224 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:33:46.696 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:33:47.166 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:33:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:33:48.107 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:33:48.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:48.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:48.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:48.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:48.113 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:33:48.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:48.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:48.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:48.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:48.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:48.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:33:48.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:33:48.128 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:33:48.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.129 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.130 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:48.131 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:33:53.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:33:53.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:33:53.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:53.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:53.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:53.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:53.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:33:53.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:53.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:53.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:33:53.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:33:53.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:33:53.153 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:33:53.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:53.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:53.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:33:53.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:33:53.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:33:53.154 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:33:53.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:53.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:33:53.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:33:53.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:53.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:53.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:33:53.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:33:53.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:33:53.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:33:53.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:53.159 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:33:53.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:33:53.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:33:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:33:53.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:33:53.163 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:33:53.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:33:53.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:33:53.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:33:53.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:33:53.688 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:33:53.689 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:33:53.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:53.690 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:33:53.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:53.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:53.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:53.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:53.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:53.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:53.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:53.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:53.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:53.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:53.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:53.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:53.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:53.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:53.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:54.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:33:54.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:54.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:54.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:54.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:54.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:33:55.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:33:55.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:55.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:55.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:55.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:55.537 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:33:56.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:33:56.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:56.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:56.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:56.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:56.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:33:56.957 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:33:57.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:57.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:57.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:57.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:57.428 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:33:57.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:33:58.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:33:58.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:33:58.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:33:58.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:33:58.370 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:33:58.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:58.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:58.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:58.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:58.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:58.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:58.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:58.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:33:58.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:33:58.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:33:58.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:33:58.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:58.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:33:58.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:33:58.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:33:58.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:33:58.839 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:33:58.839 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:33:58.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:58.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:33:58.840 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:33:59.311 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:33:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:34:00.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:34:00.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:34:01.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:34:01.665 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:34:02.136 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:34:02.606 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:34:03.077 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:34:03.548 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:34:03.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:03.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:03.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:03.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:03.849 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:34:03.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:03.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:03.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:03.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:03.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:03.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:03.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:03.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:03.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:03.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:03.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:03.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:03.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:03.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:03.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:03.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:34:04.489 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:34:04.960 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:34:05.431 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:34:05.906 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:34:06.380 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:34:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:34:07.328 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:34:07.800 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:34:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:34:08.747 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:34:08.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:08.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:08.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:08.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:08.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:08.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:08.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:08.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:08.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:08.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:08.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:08.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:08.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:08.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:08.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:08.980 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:34:08.980 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:34:08.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:08.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:09.218 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:34:09.688 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:34:10.159 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:34:10.630 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:34:11.101 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:34:11.571 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:34:12.042 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:34:12.513 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:34:12.983 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:34:13.454 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:34:13.926 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:34:13.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:13.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:13.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:13.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:13.989 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:34:14.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:14.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:14.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:14.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:14.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:14.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:14.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:14.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:14.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:34:14.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:34:14.006 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:34:14.006 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:14.006 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:14.006 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:19.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:34:19.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:34:19.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:19.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:19.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:19.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:19.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:19.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:34:19.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:19.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:34:19.019 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:34:19.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:34:19.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:34:19.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:34:19.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:19.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:19.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:34:19.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:34:19.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:34:19.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:19.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:34:19.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:34:19.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:34:19.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:19.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:19.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:34:19.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:34:19.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:34:19.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:19.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:34:19.028 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:34:19.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:34:19.028 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:19.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:19.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:34:19.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:34:19.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:34:19.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.032 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:34:19.032 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:34:19.032 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:34:19.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:19.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:19.037 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:34:19.512 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:34:19.562 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:34:19.564 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:34:19.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:19.566 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:34:19.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:19.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:19.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:19.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:19.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:19.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:19.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:19.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:19.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:19.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:19.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:19.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:19.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:19.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:19.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:19.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:19.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:19.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:19.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:19.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:19.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:19.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:19.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:19.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:19.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:19.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:19.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:19.885 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:34:19.886 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:34:19.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:19.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:34:20.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:20.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:20.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:20.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:20.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:20.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:20.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:20.273 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:34:20.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:20.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:20.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:20.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:20.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:20.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:20.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:20.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:20.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:20.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:20.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:20.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:20.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:20.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:20.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:20.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:20.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:34:20.933 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:34:21.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:21.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:21.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:21.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:21.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:21.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:21.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:21.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:21.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:21.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:21.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:21.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:21.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:21.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:21.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:21.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:21.167 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:34:21.167 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:34:21.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:21.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:21.402 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:34:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:21.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:21.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:21.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:21.720 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:34:21.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:21.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:21.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:21.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:21.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:21.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:21.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:34:21.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:34:21.733 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:34:21.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:21.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=583 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:21.733 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:34:26.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:34:26.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:34:26.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:26.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:26.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:26.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:26.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:34:26.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:34:26.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:26.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:34:26.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:34:26.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:34:26.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:34:26.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:34:26.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:34:26.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:34:26.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:34:26.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:34:26.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:26.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:34:26.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:34:26.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:34:26.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:34:26.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:34:26.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:34:26.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:34:26.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:26.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:34:26.766 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:34:26.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:34:26.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:34:26.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:34:26.770 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:34:26.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:34:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:34:27.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:34:27.298 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:34:27.299 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:34:27.301 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:34:27.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:27.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:27.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:27.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:27.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:27.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:27.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:27.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:27.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:27.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:27.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:27.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:27.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:27.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:27.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:27.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:27.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:27.720 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:34:27.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:27.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:27.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:27.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:28.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:34:28.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:34:28.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:28.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:28.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:28.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:29.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:34:29.619 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:34:29.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:29.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:29.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:29.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:30.088 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:34:30.562 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:34:30.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:30.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:30.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:30.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:31.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:34:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:34:31.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:34:31.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:34:31.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:34:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:34:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:34:32.455 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:34:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:34:33.399 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:34:33.868 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:34:34.339 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:34:34.810 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:34:35.281 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:34:35.752 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:34:36.229 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:34:36.705 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:34:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:34:37.648 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:34:38.120 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:34:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:34:39.063 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:34:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:34:40.018 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:34:40.495 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:34:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:34:41.449 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:34:41.923 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:34:42.402 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:34:42.879 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:34:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:34:43.833 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:34:44.307 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:34:44.778 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:34:45.248 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:34:45.722 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:34:46.197 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:34:46.675 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:34:47.153 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:34:47.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:47.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:47.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:47.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:47.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:47.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:47.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:34:47.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:34:47.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:34:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:34:47.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:47.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:34:47.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:34:47.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:34:47.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:34:47.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:34:47.431 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:34:47.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:47.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:34:47.627 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:34:48.105 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:34:48.577 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:34:49.048 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:34:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:34:49.989 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:34:50.460 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:34:50.931 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:34:51.402 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:34:51.872 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:34:52.343 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:34:52.818 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:34:53.296 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:34:53.768 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:34:54.238 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:34:54.709 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:34:55.180 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:34:55.651 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:34:56.123 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:34:56.590 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:34:57.059 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:34:57.529 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:34:58.000 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:34:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:34:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:34:59.412 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:34:59.883 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:35:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:35:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:35:01.315 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:35:01.794 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:35:02.272 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:35:02.747 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:35:03.223 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:35:03.692 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:35:04.161 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:35:04.631 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:35:05.102 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:35:05.573 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:35:06.043 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:35:06.516 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:35:06.987 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:35:07.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:07.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:07.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:07.443 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:35:07.456 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:35:07.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:07.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:07.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:07.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:07.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:07.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:07.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:07.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:07.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:07.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:07.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:07.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:07.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:07.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:07.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:35:08.404 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:35:08.878 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 03:35:09.347 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 03:35:09.817 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 03:35:10.287 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 03:35:10.758 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 03:35:11.233 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 03:35:11.707 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 03:35:12.185 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 03:35:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 03:35:13.128 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 03:35:13.600 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 03:35:14.069 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 03:35:14.540 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 03:35:15.011 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 03:35:15.482 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 03:35:15.954 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 03:35:16.431 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 03:35:16.908 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 03:35:17.384 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 03:35:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 03:35:18.336 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 03:35:18.810 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 03:35:19.285 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 03:35:19.763 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 03:35:20.237 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 03:35:20.706 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 03:35:21.181 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 03:35:21.653 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 03:35:22.125 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 03:35:22.599 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 03:35:23.074 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 03:35:23.543 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 03:35:24.018 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 03:35:24.492 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 03:35:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 03:35:25.441 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 03:35:25.911 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 03:35:26.382 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 03:35:26.853 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 03:35:27.326 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 03:35:27.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:27.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:27.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:27.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:27.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:27.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:27.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:27.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:27.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:27.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:27.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:27.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:27.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:27.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:27.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:27.557 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:35:27.557 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:35:27.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:27.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:27.796 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 03:35:28.270 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 03:35:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 03:35:29.208 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 03:35:29.679 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 03:35:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 03:35:30.619 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 03:35:31.090 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 03:35:31.561 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 03:35:32.037 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 03:35:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 03:35:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 03:35:33.457 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 03:35:33.932 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 03:35:34.403 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 03:35:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 03:35:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 03:35:35.816 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 03:35:36.287 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 03:35:36.757 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 03:35:37.229 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 03:35:37.699 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 03:35:38.170 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 03:35:38.641 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 03:35:39.113 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 03:35:39.591 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 03:35:40.064 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 03:35:40.534 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 03:35:41.004 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 03:35:41.475 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 03:35:41.950 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 03:35:42.426 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 03:35:42.900 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 03:35:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 03:35:43.844 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 03:35:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 03:35:44.784 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 03:35:45.254 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 03:35:45.725 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 03:35:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 03:35:46.667 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 03:35:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 03:35:47.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:47.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:47.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:47.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:47.571 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:35:47.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:35:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:35:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:35:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:35:47.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:47.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:47.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:35:47.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:35:47.585 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:35:47.585 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17437 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.585 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17437 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17437 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17437 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.586 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.587 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.587 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.587 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:47.587 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=17438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:35:52.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:35:52.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:35:52.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:52.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:52.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:52.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:52.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:52.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:35:52.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:52.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:35:52.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:35:52.605 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:35:52.605 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:35:52.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:35:52.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:52.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:52.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:35:52.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:35:52.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:35:52.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:35:52.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:35:52.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:35:52.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:35:52.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:35:52.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:35:52.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:35:52.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:35:52.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:35:52.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:35:52.614 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:35:52.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:35:52.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:35:52.615 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:35:52.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:52.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:57.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:35:57.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:35:57.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:57.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:57.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:57.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:57.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:35:57.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:35:57.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:57.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:35:57.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:35:57.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:35:57.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:35:57.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:35:57.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:57.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:35:57.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:35:57.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:35:57.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:35:57.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:35:57.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:35:57.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:35:57.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:35:57.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:57.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:35:57.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:35:57.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:35:57.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:35:57.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:35:57.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:35:57.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:35:57.650 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:35:57.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:35:57.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:35:57.653 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:35:57.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:35:57.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:35:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:35:58.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:35:58.178 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:35:58.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.179 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:35:58.180 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:35:58.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:58.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:58.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:58.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:58.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:35:58.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:35:58.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:35:58.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:35:58.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:35:58.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:58.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:58.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:58.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:58.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:58.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:58.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:58.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:58.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:58.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:58.925 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:35:58.925 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:35:58.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:58.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.074 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:35:59.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.209 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:35:59.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:59.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:59.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:59.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:59.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:59.255 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:35:59.255 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:35:59.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.531 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:35:59.544 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:35:59.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:59.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:59.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:59.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:59.589 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:35:59.589 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:35:59.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:35:59.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:35:59.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:35:59.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:35:59.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.893 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:35:59.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:59.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:35:59.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:35:59.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:35:59.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:35:59.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:59.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:59.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:35:59.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:35:59.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:35:59.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:35:59.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:35:59.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:00.014 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:36:00.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:36:00.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:00.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:00.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:00.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:00.957 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:36:01.433 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:36:01.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:01.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:01.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:01.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:36:02.383 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:36:02.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:02.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:02.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:02.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:02.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:02.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:02.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:02.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:02.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:02.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:02.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:02.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:02.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:02.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:02.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:02.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:02.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:02.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:02.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:02.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:02.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:02.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:36:03.326 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:36:03.797 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:36:04.267 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:36:04.739 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:36:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:05.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:05.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:05.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:05.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:05.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:05.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:05.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:05.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:05.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:05.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:05.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:05.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:05.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:05.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:05.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:05.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:05.209 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:36:05.680 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:36:06.151 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:36:06.624 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:36:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:36:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:36:07.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:07.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:07.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:07.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:07.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:07.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:07.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:07.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:07.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:07.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:07.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:07.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:07.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:07.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:07.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:07.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:07.809 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:07.810 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:36:07.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:07.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:08.046 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:36:08.517 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:36:08.987 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:36:09.458 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:36:09.928 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:36:10.399 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:36:10.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:10.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:10.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:10.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:10.485 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:10.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:10.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:10.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:10.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:10.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:10.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:10.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:10.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:10.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:10.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:10.536 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:36:10.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:10.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:10.872 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:36:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:36:11.822 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:36:12.300 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:36:12.772 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:36:13.246 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:36:13.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:13.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:13.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:13.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:13.328 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:13.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:13.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:13.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:13.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:13.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:13.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:13.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:13.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:13.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:13.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:13.379 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:36:13.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:13.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:13.718 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:36:14.189 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:36:14.661 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:36:15.132 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:36:15.603 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:36:16.074 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:36:16.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:16.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:16.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:16.158 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:16.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:16.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:16.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:16.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:16.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:16.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:16.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:16.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:16.171 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:36:16.171 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4001 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:16.171 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4001 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:16.171 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:16.171 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:16.171 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:21.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:21.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:21.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:21.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:21.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:21.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:21.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:21.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:21.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:21.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:21.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:21.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:36:21.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:21.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:36:21.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:21.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:36:21.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:36:21.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:21.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:21.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:21.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:36:21.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:21.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:36:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:21.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:36:21.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:36:21.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:21.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:21.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:21.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:36:21.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:21.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:36:21.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:36:21.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:36:21.201 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:36:21.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:21.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:36:21.680 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:36:21.729 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:36:21.731 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:36:21.733 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:36:21.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:21.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:21.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:21.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:21.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:21.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:21.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:21.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:21.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:21.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:21.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:21.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:21.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:21.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:21.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:21.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:21.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:22.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:36:22.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:22.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:22.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:22.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:22.619 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:36:23.090 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:36:23.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:23.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:23.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:23.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:23.560 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:36:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:36:24.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:24.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:24.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:24.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:36:24.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:24.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:24.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:24.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:24.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:24.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:24.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:24.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:24.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:24.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:24.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:24.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:24.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:24.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:24.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:24.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:24.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:24.968 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:36:24.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:24.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:24.973 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:36:25.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:25.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:25.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:25.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:25.444 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:36:25.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:36:26.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:26.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:26.392 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:36:26.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:36:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:36:27.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:36:28.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:28.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:28.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:28.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:28.174 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:28.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:28.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:28.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:28.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:28.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:28.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:28.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:28.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:28.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:28.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:28.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:28.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:28.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:28.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:28.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:28.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:28.300 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:36:28.770 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:36:29.239 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:36:29.710 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:36:30.181 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:36:30.653 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:36:31.124 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:36:31.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:31.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:31.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:31.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:31.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:31.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:31.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:31.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:31.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:31.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:31.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:31.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:31.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:31.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:31.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:31.592 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:31.592 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:36:31.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:31.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:31.601 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:36:32.077 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:36:32.551 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:36:33.023 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:36:33.497 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:36:33.974 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:36:34.453 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:36:34.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:34.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:34.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:34.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:34.759 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:34.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:34.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:34.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:34.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:34.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:34.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:34.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:34.777 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:36:34.777 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.777 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.777 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:34.778 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2928 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:39.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:39.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:39.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:39.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:39.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:39.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:39.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:39.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:39.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:39.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:39.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:36:39.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:36:39.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:36:39.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:39.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:39.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:39.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:36:39.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:39.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:36:39.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:39.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:36:39.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:36:39.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:39.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:39.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:39.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:36:39.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:39.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:36:39.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:39.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:39.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:39.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:36:39.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:36:39.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:36:39.807 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:36:39.807 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:36:39.807 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:39.812 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:36:40.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:36:40.331 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:36:40.333 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:36:40.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:40.335 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:36:40.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:40.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:40.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:40.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:40.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:40.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:40.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:40.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:40.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:40.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:40.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:40.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:40.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:40.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:40.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:40.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:40.773 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:36:40.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:40.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:40.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:40.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:40.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:40.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:40.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:40.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:40.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:40.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:40.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:40.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:40.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:40.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:40.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:40.819 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:40.819 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:36:40.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:40.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:41.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:36:41.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:41.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:41.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:41.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:41.310 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:41.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:41.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:41.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:41.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:41.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:41.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:41.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:41.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:41.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:41.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:41.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:41.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:41.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:41.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:41.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:41.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:41.728 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:36:41.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:41.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:41.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:41.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:42.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:36:42.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:36:42.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:42.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:42.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:42.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:43.154 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:36:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:36:43.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:43.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:43.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:43.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:44.100 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:36:44.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:44.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:44.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:44.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:44.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:44.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:44.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:44.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:44.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:44.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:44.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:44.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:44.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:44.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:44.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:44.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:44.331 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:44.331 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:36:44.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:44.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:44.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:36:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:44.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:44.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:44.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:45.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:36:45.517 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:36:45.989 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:36:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:36:46.931 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:36:47.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:47.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:47.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:47.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:47.252 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:47.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:47.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:47.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:47.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:47.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:47.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:47.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:47.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:47.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:47.266 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:36:47.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:47.266 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.266 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.266 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.266 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:47.267 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:36:52.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:36:52.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:36:52.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:52.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:52.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:52.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:52.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:36:52.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:52.277 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:52.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:36:52.278 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:36:52.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:36:52.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:36:52.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:52.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:52.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:36:52.281 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:36:52.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:36:52.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:36:52.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:52.284 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:36:52.284 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:36:52.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:52.285 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:52.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:36:52.285 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:36:52.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:36:52.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:36:52.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:52.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:36:52.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:36:52.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:52.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:36:52.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:36:52.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:36:52.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:36:52.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:36:52.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:36:52.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.295 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:36:52.295 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:36:52.295 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:36:52.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:36:52.300 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:36:52.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:36:52.836 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:36:52.838 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:36:52.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:52.839 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:36:52.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:52.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:52.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:52.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:52.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:52.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:52.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:52.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:52.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:52.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:52.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:52.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:52.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:52.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:52.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:52.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:36:53.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:53.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:53.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:53.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:53.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:36:54.184 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:36:54.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:54.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:54.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:54.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:54.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:54.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:54.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:54.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:54.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:54.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:54.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:54.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:54.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:54.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:54.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:54.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:54.273 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:36:54.274 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:36:54.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:54.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:54.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:54.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:54.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:54.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:36:55.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:36:55.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:55.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:55.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:55.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:55.595 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:36:56.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:36:56.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:56.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:56.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:56.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:56.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:56.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:56.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:56.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:56.392 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:36:56.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:56.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:56.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:56.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:36:56.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:36:56.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:36:56.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:36:56.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:56.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:56.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:56.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:36:56.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:36:56.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:36:56.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:36:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:36:56.537 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:36:57.015 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:36:57.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:36:57.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:36:57.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:36:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:36:57.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:36:57.961 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:36:58.435 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:36:58.907 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:36:59.380 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:36:59.851 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:37:00.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:37:00.792 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:37:01.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:01.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:01.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:01.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:37:01.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:01.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:01.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:01.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:01.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:01.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:01.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:01.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:01.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:01.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:01.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:01.305 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:37:01.305 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:37:01.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:01.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:01.731 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:37:02.202 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:37:02.672 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:37:03.141 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:37:03.610 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:37:04.081 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:37:04.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:37:05.036 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:37:05.509 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:37:05.978 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:37:06.453 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:37:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:37:07.396 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:37:07.866 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:37:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:37:08.808 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:37:09.279 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:37:09.752 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:37:10.221 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:37:10.691 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:37:11.167 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:37:11.645 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:37:12.124 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:37:12.602 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:37:13.079 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:37:13.558 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:37:14.036 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:37:14.508 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:37:14.985 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:37:15.464 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:37:15.938 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:37:16.407 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:37:16.877 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:37:17.348 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:37:17.825 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:37:18.298 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:37:18.768 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:37:19.238 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:37:19.709 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:37:20.180 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:37:20.651 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:37:21.126 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:37:21.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:21.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:21.274 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:37:21.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:21.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:21.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:21.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:21.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:21.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:21.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:21.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:37:21.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:37:21.279 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:37:21.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.279 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.280 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.280 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.280 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:21.280 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6257 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:26.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:37:26.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:37:26.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:26.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:26.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:26.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:26.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:26.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:37:26.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:26.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:37:26.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:37:26.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:37:26.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:37:26.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:37:26.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:26.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:26.292 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:37:26.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:37:26.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:37:26.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:37:26.294 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:37:26.294 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:37:26.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:37:26.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:37:26.296 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:37:26.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:37:26.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:37:26.298 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:37:26.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:26.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:37:26.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:37:26.828 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:37:26.829 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:37:26.830 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:37:26.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:26.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:26.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:26.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:26.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:26.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:26.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:26.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:26.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:26.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:26.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:26.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:26.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:26.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:26.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:26.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:26.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:37:27.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:27.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:27.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:27.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:27.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:27.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:27.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:27.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:27.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:27.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:27.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:27.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:27.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:27.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:27.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:27.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:27.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:27.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:27.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:27.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:27.531 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:37:27.531 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:37:27.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:27.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:27.728 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:37:28.197 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:37:28.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:28.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:28.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:28.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:28.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:28.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:28.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:28.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:28.461 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:37:28.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:28.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:28.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:28.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:28.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:28.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:28.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:28.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:28.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:28.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:28.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:28.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:28.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:28.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:28.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:28.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:28.667 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:37:29.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:37:29.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:29.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:29.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:29.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:37:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:37:30.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:30.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:30.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:30.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:30.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:30.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:30.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:30.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:30.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:30.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:30.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:30.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:30.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:30.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:30.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:30.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:30.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:30.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:30.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:30.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:30.557 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:37:30.557 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:37:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:30.560 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:37:31.029 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:37:31.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:31.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:31.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:31.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:31.500 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:37:31.975 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:37:32.448 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:37:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:37:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:37:33.860 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:37:34.330 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:37:34.801 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:37:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:37:35.749 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:37:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:37:36.694 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:37:37.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:37:37.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:37:38.104 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:37:38.574 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:37:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:37:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:37:39.988 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:37:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:37:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:37:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:37:41.870 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:37:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:37:42.817 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:37:43.289 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:37:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:37:44.231 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:37:44.700 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:37:45.171 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:37:45.643 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:37:46.120 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:37:46.598 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:37:47.076 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:37:47.554 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:37:48.032 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:37:48.511 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:37:48.989 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:37:49.458 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:37:49.935 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:37:50.413 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:37:50.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:50.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:50.501 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:37:50.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:50.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:37:50.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:37:50.506 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:50.506 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=5224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:37:55.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:37:55.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:37:55.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:55.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:55.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:55.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:55.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:37:55.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:37:55.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:55.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:37:55.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:37:55.520 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:37:55.521 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:37:55.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:37:55.521 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:37:55.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:37:55.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:37:55.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:37:55.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:37:55.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:37:55.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:37:55.523 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:37:55.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:37:55.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:37:55.525 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:37:55.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:37:55.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:37:55.526 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:37:55.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:37:55.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:37:56.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:37:56.060 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:37:56.062 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:37:56.063 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:37:56.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:56.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:56.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:56.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:56.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:56.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:56.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:56.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:56.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:56.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:56.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:56.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:56.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:56.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:56.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:56.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:56.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:56.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:37:56.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:56.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:56.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:56.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:56.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:37:57.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:37:57.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:57.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:57.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:57.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:57.901 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:37:58.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:37:58.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:58.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:58.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:58.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:58.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:58.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:58.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:58.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:58.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:58.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:58.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:58.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:37:58.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:37:58.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:37:58.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:37:58.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:58.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:37:58.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:37:58.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:37:58.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:37:58.653 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:37:58.653 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:37:58.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:58.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:37:58.844 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:37:59.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:37:59.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:37:59.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:37:59.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:37:59.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:37:59.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:38:00.259 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:38:00.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:00.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:00.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:00.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:00.729 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:38:01.199 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:38:01.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:01.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:01.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:01.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:01.340 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:38:01.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:01.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:01.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:01.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:01.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:01.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:01.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:01.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:01.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:01.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:01.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:01.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:01.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:01.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:01.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:01.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:01.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:38:02.143 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:38:02.621 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:38:03.096 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:38:03.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:38:04.038 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:38:04.513 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:38:04.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:04.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:04.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:04.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:04.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:04.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:04.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:04.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:04.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:04.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:04.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:04.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:04.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:04.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:04.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:04.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:38:04.749 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:38:04.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:04.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:04.990 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:38:05.459 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:38:05.936 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:38:06.412 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:38:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:38:07.367 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:38:07.845 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:38:08.318 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:38:08.787 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:38:09.258 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:38:09.736 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:38:10.214 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:38:10.686 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:38:11.157 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:38:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:38:12.100 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:38:12.569 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:38:13.041 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:38:13.511 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:38:13.983 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:38:14.453 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:38:14.923 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:38:15.394 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:38:15.864 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:38:16.335 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:38:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:38:17.277 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:38:17.748 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:38:18.218 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:38:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:38:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:38:19.642 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:38:20.113 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:38:20.584 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:38:21.055 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:38:21.527 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:38:22.000 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:38:22.472 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:38:22.943 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:38:23.417 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:38:23.886 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:38:24.357 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:38:24.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:24.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:24.694 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:38:24.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:24.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:24.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:24.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:24.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:38:24.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:38:24.698 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:24.698 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=6298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:29.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:38:29.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:38:29.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:29.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:29.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:29.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:29.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:29.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:38:29.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:29.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:38:29.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:38:29.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:38:29.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:38:29.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:38:29.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:29.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:29.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:38:29.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:38:29.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:38:29.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:29.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:38:29.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:38:29.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:38:29.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:29.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:29.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:38:29.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:38:29.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:38:29.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:38:29.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:38:29.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:38:29.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:38:29.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:38:29.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:38:29.719 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:38:29.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:29.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:29.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:38:30.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:38:30.248 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:38:30.249 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:38:30.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.252 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:38:30.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:30.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:30.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:30.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:30.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:30.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:30.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:30.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:30.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:30.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:30.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:38:30.612 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:38:30.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:38:30.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:30.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:30.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:30.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:30.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.947 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:38:30.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:30.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:30.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:30.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:30.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:30.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:30.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:30.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:30.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:30.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:30.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:30.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:31.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:38:31.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:31.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:31.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:31.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:31.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:31.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:31.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:31.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:31.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:31.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:31.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:31.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:31.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:31.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:31.600 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:38:31.600 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:38:31.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:31.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:31.601 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:38:31.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:31.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:31.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:31.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:32.072 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:38:32.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:32.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:32.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:32.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:32.158 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:38:32.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:32.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:32.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:32.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:32.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:32.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:32.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:32.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:32.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:38:32.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:38:32.172 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.173 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:32.174 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:38:37.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:38:37.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:38:37.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:37.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:37.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:37.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:37.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:38:37.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:38:37.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:37.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:38:37.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:38:37.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:38:37.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:38:37.187 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:38:37.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:38:37.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:38:37.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:38:37.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:38:37.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:37.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:38:37.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:38:37.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:38:37.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:38:37.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:38:37.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:38:37.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:38:37.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:38:37.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:37.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:38:37.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:38:37.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:38:37.197 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:38:37.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:38:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:38:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:38:37.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:38:37.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:38:37.734 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:38:37.735 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:38:37.736 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:38:37.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:37.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:37.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:37.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:37.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:38:37.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:38:37.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:38:37.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:38:37.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:37.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:37.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:37.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:38:37.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:38:37.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:38:37.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:38:37.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:37.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:38:38.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:38:38.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:38.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:38.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:38.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:38.609 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:38:39.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:38:39.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:39.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:39.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:39.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:38:40.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:38:40.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:40.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:40.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:40.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:40.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:38:40.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:38:41.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:41.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:41.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:41.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:41.475 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:38:41.952 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:38:42.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:38:42.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:38:42.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:38:42.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:38:42.425 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:38:42.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:38:43.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:38:43.853 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:38:44.330 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:38:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:38:45.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:38:45.744 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:38:46.215 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:38:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:38:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:38:47.627 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:38:48.098 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:38:48.569 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:38:49.040 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:38:49.510 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:38:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:38:50.452 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:38:50.923 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:38:51.393 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:38:51.864 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:38:52.336 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:38:52.807 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:38:53.277 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:38:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:38:54.220 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:38:54.694 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:38:55.171 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:38:55.648 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:38:56.125 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:38:56.600 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:38:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:38:57.544 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:38:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:38:58.490 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:38:58.963 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:38:59.434 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:38:59.904 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:39:00.375 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:39:00.845 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:39:01.316 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:39:01.787 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:39:02.257 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:39:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:39:03.199 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:39:03.670 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:39:04.141 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:39:04.611 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:39:05.082 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:39:05.553 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:39:06.024 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:39:06.495 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:39:06.966 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:39:07.437 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:39:07.912 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:39:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:39:08.866 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:39:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:39:09.822 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:39:10.300 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:39:10.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:10.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:39:10.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:10.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:10.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:10.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:10.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:39:10.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:10.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:10.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:39:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:39:10.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:10.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:39:10.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:39:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:39:10.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:39:10.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:39:10.819 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:39:10.819 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:39:10.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:10.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:11.251 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:39:11.720 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:39:12.190 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:39:12.663 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:39:13.133 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:39:13.602 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:39:14.073 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:39:14.544 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:39:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:39:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:39:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:39:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:39:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:39:17.369 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:39:17.840 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:39:18.310 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:39:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:39:19.252 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 03:39:19.723 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 03:39:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 03:39:20.664 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 03:39:21.135 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 03:39:21.606 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 03:39:22.077 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 03:39:22.547 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 03:39:23.018 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 03:39:23.488 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 03:39:23.959 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 03:39:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 03:39:24.901 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 03:39:25.371 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-03-11 03:39:25.842 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-03-11 03:39:26.319 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-03-11 03:39:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-03-11 03:39:27.274 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-03-11 03:39:27.753 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-03-11 03:39:28.231 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-03-11 03:39:28.709 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-03-11 03:39:29.186 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-03-11 03:39:29.655 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-03-11 03:39:30.125 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-03-11 03:39:30.595 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-03-11 03:39:31.066 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-03-11 03:39:31.541 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-03-11 03:39:32.013 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-03-11 03:39:32.485 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-03-11 03:39:32.956 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-03-11 03:39:33.426 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-03-11 03:39:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-03-11 03:39:34.367 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-03-11 03:39:34.842 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-03-11 03:39:35.314 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-03-11 03:39:35.785 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-03-11 03:39:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-03-11 03:39:36.726 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-03-11 03:39:37.197 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-03-11 03:39:37.668 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-03-11 03:39:38.138 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-03-11 03:39:38.612 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-03-11 03:39:39.081 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-03-11 03:39:39.551 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-03-11 03:39:40.024 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-03-11 03:39:40.498 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-03-11 03:39:40.967 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-03-11 03:39:41.437 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-03-11 03:39:41.907 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-03-11 03:39:42.379 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-03-11 03:39:42.850 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-03-11 03:39:43.319 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-03-11 03:39:43.789 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-03-11 03:39:44.260 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-03-11 03:39:44.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:44.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:39:44.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:44.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:44.314 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:39:44.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:44.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:44.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:39:44.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:39:44.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:39:44.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:39:44.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:39:44.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:44.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:39:44.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:39:44.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:39:44.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:39:44.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:39:44.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:39:44.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:44.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:39:44.732 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-03-11 03:39:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-03-11 03:39:45.687 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-03-11 03:39:46.162 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-03-11 03:39:46.636 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-03-11 03:39:47.108 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-03-11 03:39:47.579 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-03-11 03:39:48.050 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-03-11 03:39:48.521 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-03-11 03:39:48.993 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-03-11 03:39:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-03-11 03:39:49.944 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-03-11 03:39:50.422 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-03-11 03:39:50.896 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-03-11 03:39:51.372 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-03-11 03:39:51.850 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-03-11 03:39:52.328 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-03-11 03:39:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-03-11 03:39:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-03-11 03:39:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-03-11 03:39:54.232 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-03-11 03:39:54.705 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-03-11 03:39:55.177 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-03-11 03:39:55.655 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-03-11 03:39:56.127 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-03-11 03:39:56.598 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-03-11 03:39:57.073 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-03-11 03:39:57.550 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-03-11 03:39:58.027 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-03-11 03:39:58.504 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-03-11 03:39:58.981 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-03-11 03:39:59.459 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-03-11 03:39:59.937 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-03-11 03:40:00.414 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-03-11 03:40:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-03-11 03:40:01.367 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-03-11 03:40:01.844 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-03-11 03:40:02.321 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-03-11 03:40:02.800 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-03-11 03:40:03.275 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-03-11 03:40:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-03-11 03:40:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-03-11 03:40:04.708 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-03-11 03:40:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-03-11 03:40:05.663 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-03-11 03:40:06.141 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-03-11 03:40:06.619 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-03-11 03:40:07.096 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-03-11 03:40:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-03-11 03:40:08.045 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-03-11 03:40:08.517 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-03-11 03:40:08.991 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-03-11 03:40:09.468 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-03-11 03:40:09.945 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-03-11 03:40:10.419 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-03-11 03:40:10.897 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-03-11 03:40:11.369 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-03-11 03:40:11.842 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-03-11 03:40:12.312 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-03-11 03:40:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-03-11 03:40:13.257 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-03-11 03:40:13.733 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-03-11 03:40:14.208 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-03-11 03:40:14.683 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-03-11 03:40:15.160 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-03-11 03:40:15.638 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-03-11 03:40:16.115 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-03-11 03:40:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-03-11 03:40:17.066 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-03-11 03:40:17.544 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-03-11 03:40:18.020 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-03-11 03:40:18.494 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-03-11 03:40:18.971 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-03-11 03:40:19.446 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-03-11 03:40:19.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:19.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:19.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:19.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:19.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:19.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:19.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:19.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:19.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:19.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:19.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:19.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:19.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:19.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:40:19.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:40:19.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:40:19.722 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:40:19.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:19.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:19.919 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-03-11 03:40:20.396 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-03-11 03:40:20.871 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-03-11 03:40:21.340 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-03-11 03:40:21.809 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-03-11 03:40:22.280 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-03-11 03:40:22.752 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-03-11 03:40:23.225 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-03-11 03:40:23.700 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-03-11 03:40:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-03-11 03:40:24.652 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-03-11 03:40:25.128 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-03-11 03:40:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-03-11 03:40:26.084 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-03-11 03:40:26.562 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-03-11 03:40:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-03-11 03:40:27.512 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-03-11 03:40:27.990 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-03-11 03:40:28.468 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-03-11 03:40:28.946 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-03-11 03:40:29.420 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-03-11 03:40:29.889 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-03-11 03:40:30.363 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-03-11 03:40:30.840 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-03-11 03:40:31.318 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-03-11 03:40:31.796 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-03-11 03:40:32.274 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-03-11 03:40:32.752 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-03-11 03:40:33.230 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-03-11 03:40:33.708 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-03-11 03:40:34.183 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-03-11 03:40:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-03-11 03:40:35.138 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-03-11 03:40:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-03-11 03:40:36.087 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-03-11 03:40:36.558 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-03-11 03:40:37.028 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-03-11 03:40:37.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:37.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:37.316 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:40:37.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:37.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:37.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:37.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:37.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:37.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:37.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:37.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:37.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:40:37.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:40:37.323 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:37.323 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=25872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:42.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:40:42.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:40:42.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:42.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:42.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:42.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:42.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:42.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:40:42.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:42.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:40:42.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:40:42.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:40:42.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:40:42.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:40:42.341 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:40:42.341 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:40:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:40:42.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:40:42.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:40:42.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:40:42.344 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:40:42.344 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:40:42.344 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:42.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:40:42.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:40:42.345 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:42.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:40:47.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:40:47.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:47.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:47.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:47.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:47.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:47.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:40:47.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:47.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:40:47.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:40:47.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:40:47.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:40:47.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:40:47.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:47.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:47.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:40:47.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:40:47.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:40:47.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:47.363 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:40:47.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:40:47.364 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:40:47.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:40:47.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:40:47.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:40:47.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:40:47.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:40:47.367 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:40:47.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:40:47.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:40:47.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:40:47.904 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:40:47.906 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:40:47.907 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:40:47.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:47.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:47.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:47.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:47.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:47.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:47.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:47.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:47.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:47.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:40:47.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:40:47.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:47.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:47.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:47.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:48.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:40:48.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:48.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:48.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:48.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:48.799 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:40:49.276 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:40:49.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:49.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:49.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:49.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:49.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:49.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:49.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:49.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:49.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:49.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:49.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:49.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:49.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:49.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:49.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:49.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:49.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:49.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:49.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:40:49.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:40:49.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:40:49.511 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:40:49.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:49.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:49.753 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:40:50.230 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:40:50.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:50.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:50.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:50.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:50.706 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:40:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:40:51.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:51.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:51.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:51.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:51.644 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:40:51.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:51.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:51.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:51.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:51.799 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:40:51.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:51.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:51.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:51.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:51.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:51.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:51.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:51.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:51.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:51.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:40:51.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:40:51.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:51.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:51.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:51.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:40:52.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:52.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:52.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:52.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:52.595 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:40:53.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:40:53.544 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:40:54.021 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:40:54.495 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:40:54.968 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:40:55.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:55.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:55.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:55.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:55.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:55.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:55.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:55.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:55.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:55.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:40:55.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:40:55.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:55.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:40:55.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:40:55.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:40:55.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:40:55.439 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:40:55.439 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:40:55.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:55.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:40:55.443 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:40:55.916 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:40:56.388 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:40:56.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:40:56.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:40:56.471 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:40:56.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:40:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:40:56.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:40:56.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:40:56.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:40:56.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:40:56.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:40:56.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:40:56.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:40:56.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:40:56.476 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:40:56.477 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:41:01.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:41:01.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:41:01.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:41:01.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:41:01.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:41:01.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:41:01.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:41:01.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:41:01.490 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:01.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:41:01.490 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:41:01.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:41:01.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:41:01.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:41:01.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:01.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:41:01.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:41:01.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:41:01.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:41:01.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:41:01.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:41:01.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:41:01.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:41:01.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:41:01.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:41:01.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:41:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:41:01.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:41:01.502 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:41:01.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:01.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:41:01.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:41:02.029 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:41:02.030 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:41:02.032 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:41:02.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:02.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:02.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:02.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:02.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:02.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:02.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:02.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:02.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:02.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:02.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:02.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:41:02.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:41:02.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:02.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:02.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:02.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:02.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:41:02.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:02.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:02.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:02.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:02.935 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:41:03.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:41:03.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:03.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:03.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:03.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:03.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:41:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:41:04.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:04.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:04.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:04.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:04.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:41:05.320 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:41:05.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:05.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:05.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:05.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:05.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:41:06.274 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:41:06.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:06.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:06.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:06.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:06.749 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:41:07.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:41:07.704 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:41:08.177 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:41:08.648 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:41:09.123 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:41:09.597 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:41:10.074 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:41:10.548 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:41:11.018 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:41:11.491 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:41:11.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:41:12.438 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:41:12.911 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:41:13.381 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:41:13.852 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:41:14.322 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:41:14.793 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:41:15.264 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:41:15.736 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:41:16.214 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:41:16.687 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:41:16.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:16.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:16.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:16.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:16.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:16.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:16.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:17.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:17.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:17.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:17.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:17.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:17.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:17.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:17.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:41:17.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:41:17.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:41:17.009 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:41:17.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:17.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:17.162 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:41:17.631 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:41:18.100 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:41:18.576 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:41:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:41:19.528 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:41:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:41:20.475 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:41:20.953 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:41:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:41:21.905 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:41:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:41:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:41:23.321 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:41:23.792 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:41:24.262 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:41:24.733 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:41:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:41:25.675 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:41:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:41:26.626 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:41:27.101 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:41:27.571 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:41:28.040 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:41:28.513 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:41:28.983 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:41:29.453 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:41:29.923 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:41:30.394 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:41:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:41:31.337 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:41:31.815 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:41:32.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:32.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:32.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:32.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:32.160 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:41:32.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:32.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:32.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:32.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:32.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:32.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:32.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:32.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:32.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:32.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:32.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:41:32.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:41:32.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:32.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:32.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:32.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:32.287 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:41:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:41:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:41:33.712 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:41:34.186 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:41:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:41:35.131 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:41:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:41:36.079 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:41:36.549 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:41:37.026 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:41:37.503 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:41:37.980 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:41:38.454 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:41:38.925 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:41:39.399 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:41:39.876 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:41:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:41:40.831 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:41:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:41:41.782 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:41:42.259 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:41:42.737 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:41:43.213 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:41:43.689 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 03:41:44.161 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 03:41:44.633 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 03:41:45.104 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 03:41:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 03:41:46.050 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 03:41:46.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:46.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:46.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:46.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:46.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:46.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:46.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:46.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:46.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:46.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:46.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:46.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:46.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:46.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:46.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:41:46.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:41:46.517 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:41:46.517 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:41:46.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:46.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:46.527 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 03:41:47.001 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 03:41:47.471 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 03:41:47.941 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 03:41:48.411 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 03:41:48.885 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 03:41:49.355 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 03:41:49.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:49.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:49.745 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:41:49.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:49.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:49.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:49.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:49.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:41:49.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:41:49.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:41:49.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:41:49.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:41:49.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:41:49.748 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:41:54.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:41:54.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:41:54.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:41:54.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:41:54.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:41:54.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:41:54.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:41:54.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:41:54.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:54.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:41:54.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:41:54.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:41:54.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:41:54.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:41:54.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:54.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:41:54.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:41:54.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:41:54.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:41:54.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:41:54.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:41:54.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:41:54.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:41:54.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:41:54.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:41:54.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:41:54.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:54.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:41:54.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:41:54.776 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:41:54.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:41:54.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:41:54.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:41:55.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:41:55.301 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:41:55.302 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:41:55.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:55.303 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:41:55.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:55.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:55.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:55.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:41:55.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:41:55.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:41:55.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:41:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:55.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:55.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:55.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:41:55.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:41:55.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:41:55.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:41:55.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:55.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:41:55.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:41:55.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:55.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:55.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:55.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:41:56.669 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:41:56.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:56.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:56.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:57.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:41:57.619 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:41:57.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:57.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:57.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:41:58.561 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:41:58.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:58.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:58.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:59.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:41:59.502 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:41:59.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:41:59.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:41:59.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:41:59.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:41:59.972 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:42:00.450 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:42:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:42:01.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:42:01.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:42:02.358 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:42:02.836 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:42:03.312 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:42:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:42:04.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:42:04.742 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:42:05.217 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:42:05.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:05.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:05.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:05.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:05.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:05.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:05.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:05.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:05.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:05.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:05.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:05.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:05.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:05.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:05.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:05.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:05.444 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:42:05.444 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:42:05.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:05.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:05.694 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:42:06.172 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:42:06.644 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:42:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:42:07.585 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:42:08.056 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:42:08.526 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:42:08.999 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:42:09.473 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:42:09.945 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:42:10.416 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:42:10.887 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:42:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:42:11.828 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:42:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:42:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:42:13.242 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:42:13.712 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:42:14.182 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:42:14.653 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:42:15.123 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:42:15.596 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:42:15.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:15.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:15.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:15.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:15.758 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:42:15.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:15.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:15.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:15.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:15.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:15.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:15.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:15.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:15.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:15.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:15.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:15.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:15.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:15.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:15.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:15.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:16.072 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:42:16.544 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:42:17.019 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:42:17.496 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:42:17.970 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-03-11 03:42:18.439 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-03-11 03:42:18.910 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-03-11 03:42:19.382 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-03-11 03:42:19.856 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-03-11 03:42:20.327 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-03-11 03:42:20.803 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-03-11 03:42:21.281 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-03-11 03:42:21.758 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-03-11 03:42:22.235 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-03-11 03:42:22.712 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-03-11 03:42:22.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:22.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:22.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:22.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:22.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:22.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:22.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:22.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:22.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:22.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:22.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:22.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:22.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:22.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:22.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:22.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:42:22.803 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:42:22.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:22.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:23.190 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-03-11 03:42:23.665 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-03-11 03:42:24.144 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-03-11 03:42:24.622 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-03-11 03:42:25.097 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-03-11 03:42:25.574 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-03-11 03:42:26.052 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-03-11 03:42:26.530 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-03-11 03:42:27.006 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-03-11 03:42:27.479 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-03-11 03:42:27.949 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-03-11 03:42:28.419 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-03-11 03:42:28.890 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-03-11 03:42:29.361 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-03-11 03:42:29.837 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-03-11 03:42:30.311 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-03-11 03:42:30.780 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-03-11 03:42:31.250 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-03-11 03:42:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-03-11 03:42:32.193 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-03-11 03:42:32.670 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-03-11 03:42:33.148 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-03-11 03:42:33.624 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-03-11 03:42:34.101 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-03-11 03:42:34.575 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-03-11 03:42:35.047 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-03-11 03:42:35.521 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-03-11 03:42:35.990 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-03-11 03:42:36.462 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-03-11 03:42:36.934 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-03-11 03:42:37.404 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-03-11 03:42:37.873 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-03-11 03:42:38.343 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-03-11 03:42:38.814 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-03-11 03:42:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-03-11 03:42:39.757 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-03-11 03:42:40.234 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-03-11 03:42:40.715 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-03-11 03:42:41.187 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-03-11 03:42:41.657 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-03-11 03:42:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-03-11 03:42:42.602 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-03-11 03:42:42.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:42.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:42.775 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:42:42.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:42.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:42.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:42.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:42.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:42.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:42.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:42.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:42:42.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:42:42.779 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:42.779 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=10343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:47.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:42:47.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:42:47.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:47.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:47.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:47.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:42:47.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:47.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:42:47.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:42:47.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:42:47.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:42:47.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:42:47.801 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:47.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:47.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:42:47.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:42:47.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:42:47.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:47.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:42:47.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:42:47.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:42:47.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:47.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:47.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:42:47.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:42:47.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:42:47.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:42:47.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:42:47.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:42:47.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:47.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:42:47.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:42:47.806 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:42:47.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:47.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:42:48.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:42:48.326 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:42:48.328 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:42:48.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:48.329 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:42:48.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:48.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:48.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:48.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:48.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:48.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:48.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:48.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:48.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:48.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:48.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:48.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:48.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:48.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:48.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:48.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:48.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:48.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:48.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:48.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:48.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:48.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:48.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:48.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:48.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:48.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:48.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:48.751 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:42:48.753 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:42:48.753 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:42:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:48.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:48.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:48.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:48.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:49.220 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:42:49.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:49.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:49.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:49.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:49.236 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:42:49.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:49.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:49.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:49.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:49.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:49.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:49.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:49.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:49.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:49.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:49.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:49.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:49.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:49.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:49.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:49.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:49.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:42:49.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:49.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:49.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:49.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:50.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:50.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:50.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:50.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:50.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:50.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:50.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:50.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:50.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:50.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:50.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:50.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:50.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:50.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:50.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:50.160 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:42:50.160 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:42:50.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:50.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:50.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:42:50.633 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:42:50.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:50.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:50.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:50.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:51.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:42:51.573 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:42:51.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:51.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:51.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:51.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:52.044 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:42:52.514 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:42:52.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:52.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:52.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:52.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:52.986 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:42:53.456 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:42:53.927 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:42:54.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:54.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:54.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:54.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:54.189 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:42:54.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:54.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:54.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:54.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:54.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:54.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:54.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:54.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:54.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:42:54.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:42:54.205 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:42:54.205 [WARNING] transceiver.py:257 (TRX1@172.18.204.20:5700/1) RX TRXD message (ver=1 fn=1388 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.206 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.207 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:54.208 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=1388 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:42:59.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:42:59.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:42:59.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:59.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:59.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:59.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:59.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:42:59.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:42:59.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:59.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:42:59.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:42:59.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:42:59.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:42:59.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:42:59.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:42:59.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:42:59.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:42:59.216 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:42:59.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:42:59.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:42:59.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:42:59.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:42:59.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:42:59.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:42:59.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:42:59.221 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:42:59.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:42:59.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:42:59.703 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:42:59.747 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:42:59.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:59.749 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:42:59.751 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:42:59.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:59.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:59.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:59.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:42:59.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:42:59.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:42:59.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:42:59.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:59.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:59.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:59.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:42:59.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:42:59.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:42:59.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:42:59.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:42:59.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:00.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:43:00.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:00.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:00.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:00.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:00.657 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:43:01.135 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:43:01.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:01.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:01.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:01.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:01.613 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:43:02.088 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:43:02.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:02.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:02.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:02.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:02.566 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:43:03.037 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:43:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:03.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:03.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:03.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:03.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:03.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:03.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:03.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:03.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:03.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:03.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:03.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:03.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:03.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:03.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:03.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:43:03.125 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:43:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:03.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:03.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:03.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:03.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:03.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:03.506 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:43:03.975 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:43:04.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:04.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:04.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:04.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:04.445 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:43:04.919 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:43:05.394 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:43:05.864 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:43:06.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:43:06.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:06.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:06.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:06.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:06.459 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:43:06.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:06.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:06.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:06.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:06.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:06.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:06.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:06.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:06.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:06.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:06.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:06.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:06.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:06.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:06.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:06.808 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:43:07.279 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:43:07.753 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:43:08.230 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:43:08.704 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:43:09.179 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:43:09.649 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:43:10.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:10.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:10.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:10.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:10.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:10.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:10.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:10.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:10.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:10.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:10.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:10.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:10.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:10.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:10.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:10.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:10.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:43:10.116 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:43:10.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:10.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:10.118 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:43:10.588 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:43:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:43:11.538 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:43:12.010 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:43:12.481 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:43:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:43:13.422 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:43:13.893 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:43:14.363 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:43:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:14.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:14.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:14.448 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:43:14.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:14.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:14.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:14.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:14.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:14.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:14.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:14.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:14.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:43:14.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:43:14.465 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:43:14.465 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.466 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.467 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.468 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:14.468 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:19.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:43:19.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:43:19.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:19.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:19.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:19.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:19.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:19.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:43:19.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:19.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:43:19.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:43:19.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:43:19.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:43:19.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:19.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:43:19.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:43:19.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:43:19.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:19.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:19.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:43:19.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:43:19.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:43:19.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:43:19.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:43:19.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:43:19.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:43:19.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:43:19.492 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:43:19.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:19.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:43:19.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:43:20.026 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:43:20.028 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:43:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:20.030 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:43:20.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:20.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:20.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:20.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:20.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:20.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:20.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:20.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:20.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:20.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:20.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:20.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:20.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:20.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:43:20.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:20.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:20.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:20.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:20.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:20.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:20.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:20.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:20.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:20.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:20.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:20.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:20.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:20.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:20.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:20.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:20.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:20.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:20.539 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:43:20.539 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:43:20.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:20.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:43:21.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:21.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:21.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:21.143 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:43:21.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:21.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:21.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:21.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:21.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:21.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:21.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:21.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:21.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:21.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:21.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:21.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:21.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:21.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:21.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:21.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:21.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:43:21.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:21.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:21.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:21.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:21.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:43:22.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:22.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:22.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:22.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:22.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:22.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:22.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:22.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:22.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:22.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:22.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:22.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:22.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:22.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:22.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:22.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:22.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:43:22.341 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:43:22.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:22.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:22.348 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:43:22.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:22.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:22.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:22.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:22.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:43:23.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:43:23.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:23.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:23.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:23.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:43:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:43:24.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:24.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:24.731 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:43:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:43:25.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:43:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:43:26.625 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:43:27.097 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:43:27.571 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:43:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:43:28.524 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:43:28.997 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:43:29.473 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:43:29.945 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:43:30.418 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:43:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:43:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:43:31.838 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:43:32.316 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:43:32.794 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:43:33.273 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:43:33.747 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:43:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:43:34.686 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:43:35.157 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:43:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-03-11 03:43:36.098 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-03-11 03:43:36.569 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-03-11 03:43:37.040 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-03-11 03:43:37.511 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-03-11 03:43:37.982 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-03-11 03:43:38.452 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-03-11 03:43:38.923 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-03-11 03:43:39.394 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-03-11 03:43:39.865 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-03-11 03:43:40.338 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-03-11 03:43:40.807 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-03-11 03:43:41.277 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-03-11 03:43:41.752 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-03-11 03:43:42.227 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-03-11 03:43:42.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:42.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:42.290 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:43:42.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:42.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:42.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:42.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:42.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:42.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:42.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:42.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:43:42.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:43:42.299 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:43:42.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (TRX3@172.18.204.20:5700/3) RX TRXD message (ver=1 fn=4913 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.300 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4913 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.301 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.302 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.302 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.302 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:42.302 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=4914 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:43:47.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:43:47.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:43:47.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:47.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:47.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:47.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:47.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:43:47.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:43:47.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:47.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:43:47.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:43:47.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:43:47.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:43:47.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:43:47.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:47.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:43:47.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:43:47.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:43:47.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:43:47.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:47.324 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:43:47.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:43:47.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:43:47.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:47.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:43:47.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:43:47.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:43:47.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:43:47.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:47.328 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:43:47.328 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:43:47.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:43:47.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:43:47.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:43:47.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:43:47.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:43:47.329 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:43:47.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:43:47.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:43:47.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:43:47.333 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:43:47.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:43:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:43:47.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:43:47.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:43:47.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:43:47.857 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:43:47.858 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:43:47.859 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:43:47.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:47.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:47.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:47.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:47.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:47.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:47.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:47.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:47.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:47.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:47.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:47.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:47.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:47.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:47.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:47.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:47.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:48.287 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:43:48.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:48.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:48.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:48.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:43:49.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:43:49.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:49.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:49.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:49.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:49.719 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:43:50.197 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:43:50.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:50.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:50.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:50.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:43:50.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:50.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:50.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:50.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:50.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:50.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:50.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:50.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:50.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:50.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:50.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:50.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:50.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:50.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:50.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:50.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:50.804 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:43:50.804 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:43:50.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:50.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:51.141 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:43:51.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:51.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:51.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:51.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:51.611 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:43:52.081 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:43:52.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:43:52.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:43:52.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:43:52.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:43:52.552 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:43:53.023 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:43:53.494 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:43:53.965 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:43:54.436 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:43:54.912 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:43:55.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:55.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:55.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:55.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:55.331 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:43:55.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:55.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:55.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:55.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:43:55.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:43:55.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:43:55.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:43:55.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:55.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:55.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:55.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:43:55.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:43:55.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:43:55.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:43:55.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:55.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:43:55.384 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:43:55.860 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:43:56.334 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:43:56.812 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:43:57.285 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:43:57.760 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:43:58.234 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:43:58.705 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:43:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:43:59.650 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:44:00.128 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:44:00.605 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:44:01.083 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:44:01.555 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:44:02.026 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:44:02.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:02.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:02.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:02.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:02.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:02.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:02.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:02.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:02.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:02.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:02.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:02.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:02.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:44:02.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:44:02.257 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:44:02.257 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:44:02.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:02.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:02.497 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:44:02.970 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:44:03.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:03.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:03.051 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:03.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:03.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:03.055 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:03.055 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:08.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:08.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:08.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:08.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:08.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:08.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:08.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:08.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:08.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:08.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:08.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:08.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:08.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:08.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:08.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:08.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:08.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:08.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:08.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:08.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:08.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:08.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:08.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:08.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:08.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:08.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:08.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:08.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:08.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:08.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:08.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:08.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:08.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:08.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:08.083 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:08.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:08.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:08.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:08.614 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:08.616 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:08.617 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:08.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:08.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:08.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:08.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:08.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:08.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:08.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:08.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:08.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:08.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:08.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:08.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:44:08.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:44:08.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:08.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:08.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:08.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:09.034 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:09.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:09.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:09.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:09.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:09.504 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:09.980 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:44:10.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:10.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:10.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:10.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:10.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:10.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:10.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:10.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:10.458 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:44:10.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:10.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:10.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:10.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:10.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:10.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:10.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:10.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:10.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:10.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:10.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:44:10.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:44:10.503 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:44:10.503 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-03-11 03:44:10.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:10.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:10.927 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:44:11.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:11.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:11.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:11.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:11.396 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:44:11.866 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:44:12.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:12.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:12.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:12.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:12.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:44:12.808 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:44:13.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:13.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:13.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:13.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:13.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:13.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:13.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:13.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:13.213 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:44:13.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:13.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:13.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:13.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:13.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:13.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:13.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:13.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:13.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:13.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:13.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:44:13.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:44:13.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:13.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:13.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:44:13.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:13.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:13.750 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:44:14.221 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:44:14.691 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:44:15.162 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:44:15.638 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:44:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:44:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:44:17.058 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:44:17.529 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:44:17.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:17.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:17.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:17.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:17.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:17.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:17.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:17.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:17.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:44:17.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:17.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:17.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:44:17.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:44:17.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:44:17.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:44:17.763 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.204.22:6700) Recv SETFH cmd
2026-03-11 03:44:17.763 [INFO] transceiver.py:201 (MS@172.18.204.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-03-11 03:44:17.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:17.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:44:18.000 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:44:18.470 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:44:18.947 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:44:19.425 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:44:19.902 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:44:19.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:19.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:19.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:19.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:19.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:19.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:19.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:19.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:19.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:44:19.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:44:19.993 [INFO] transceiver.py:205 (MS@172.18.204.22:6700) Frequency hopping disabled
2026-03-11 03:44:19.993 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:19.993 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:24.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:24.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:24.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:24.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:25.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:25.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:25.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:25.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:25.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:25.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:25.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:25.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:25.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:25.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:25.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:25.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:25.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:25.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:25.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:25.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:25.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:25.014 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:25.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:25.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:25.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:25.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:25.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:25.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:25.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:25.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:25.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:25.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:25.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:25.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:25.020 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:25.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:25.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:25.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:25.550 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:25.552 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:25.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.554 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:25.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:25.971 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:26.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:26.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:26.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:26.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:26.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.440 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:26.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:26.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:26.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:26.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:26.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:26.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:26.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:26.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:26.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:26.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:26.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:26.882 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:26.882 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:31.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:31.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:31.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:31.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:31.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:31.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:31.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:31.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:31.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:31.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:31.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:31.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:31.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:31.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:31.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:31.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:31.909 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:31.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:31.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:31.911 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:31.911 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:31.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:31.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:31.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:31.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:31.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:31.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:31.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:31.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:31.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:31.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:31.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:31.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:31.917 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:31.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:31.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:31.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:31.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:31.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:32.399 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:32.447 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:32.448 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:32.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.450 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:32.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:32.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:32.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:32.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:32.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:32.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:33.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.341 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:33.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:33.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:33.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:33.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:33.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:33.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:33.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:33.808 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:33.809 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.809 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.809 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.809 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.810 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:33.811 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:38.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:38.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:38.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:38.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:38.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:38.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:38.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:38.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:38.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:38.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:38.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:38.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:38.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:38.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:38.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:38.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:38.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:38.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:38.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:38.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:38.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:38.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:38.844 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:38.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:38.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:38.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:38.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:38.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:38.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:38.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:38.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:38.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:38.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:38.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:38.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:38.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:38.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:38.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:38.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:38.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:38.852 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:38.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:38.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:39.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:39.395 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:39.398 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:39.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.401 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:39.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:39.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:39.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:39.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:39.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:40.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:40.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:40.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:40.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:40.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:40.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:44:40.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:40.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:40.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:40.749 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:40.750 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.750 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.750 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.750 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.750 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.751 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.752 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.752 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:40.752 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:45.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:45.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:45.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:45.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:45.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:45.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:45.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:45.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:45.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:45.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:45.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:45.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:45.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:45.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:45.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:45.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:45.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:45.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:45.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:45.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:45.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:45.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:45.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:45.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:45.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:45.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:45.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:45.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:45.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:45.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:45.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:45.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:45.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:45.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:45.777 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:45.777 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:45.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:45.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:46.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:46.309 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:46.312 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:46.314 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:46.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.730 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:46.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:46.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:46.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:46.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:46.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:47.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:47.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:47.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:47.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:47.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:47.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:47.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:47.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:47.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:47.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:47.641 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:47.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:47.642 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.642 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.642 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.642 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.643 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.644 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.644 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.644 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:47.644 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:52.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:52.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:52.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:52.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:52.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:52.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:52.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:52.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:52.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:52.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:52.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:52.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:52.674 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:52.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:52.674 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:52.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:52.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:52.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:52.676 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:52.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:52.679 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:52.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:52.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:52.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:52.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:52.680 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:52.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:52.680 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:52.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:52.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:52.683 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:52.683 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:52.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:52.686 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:52.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:52.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:52.687 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:52.687 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:52.687 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:52.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:52.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:52.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:44:53.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:44:53.229 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:44:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.231 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:44:53.233 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:44:53.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:53.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.640 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:44:53.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:53.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:53.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:53.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:53.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.111 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:44:54.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:44:54.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:54.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:54.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:54.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:54.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:54.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:54.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:54.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:54.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:54.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:54.558 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:44:54.558 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.559 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.559 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.559 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.559 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.559 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.560 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.561 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:54.561 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:44:59.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:44:59.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:44:59.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:59.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:59.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:59.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:59.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:44:59.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:59.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:59.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:44:59.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:44:59.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:44:59.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:44:59.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:59.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:59.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:44:59.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:44:59.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:44:59.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:44:59.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:59.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:44:59.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:44:59.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:59.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:44:59.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:44:59.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:44:59.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:44:59.584 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:44:59.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:44:59.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:00.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:00.110 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:00.111 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:00.112 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:00.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:00.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:45:00.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:00.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:00.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:00.995 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:45:01.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.470 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:45:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:01.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:01.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:01.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:01.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:01.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:01.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:01.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:01.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:01.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:01.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:01.495 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:01.495 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.496 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:01.497 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=416 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:06.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:06.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:06.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:06.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:06.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:06.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:06.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:06.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:06.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:06.516 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:06.516 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:06.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:06.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:06.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:06.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:06.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:06.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:06.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:06.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:06.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:06.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:06.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:06.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:06.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:06.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:06.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:06.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:06.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:06.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:06.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:06.526 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:06.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:06.528 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:06.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:06.529 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:06.529 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:06.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:07.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:07.055 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:07.057 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:07.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.059 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:07.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:07.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:45:07.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:07.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:07.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:07.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:07.949 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:45:08.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:08.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:08.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:08.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:08.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:08.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:08.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:08.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:08.391 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:08.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:08.391 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.391 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.392 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.392 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.392 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.392 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:08.392 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:13.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:13.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:13.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:13.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:13.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:13.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:13.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:13.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:13.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:13.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:13.408 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:13.412 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:13.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:13.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:13.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:13.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:13.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:13.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:13.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:13.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:13.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:13.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:13.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:13.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:13.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:13.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:13.419 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:13.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:13.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:13.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:13.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:13.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:13.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:13.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:13.423 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:13.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:13.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:13.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:13.944 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:13.945 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:13.945 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:13.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:14.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:14.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:14.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:14.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:14.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:14.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:14.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:14.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:14.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:14.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:14.007 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:14.007 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:19.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:19.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:19.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:19.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:19.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:19.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:19.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:19.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:19.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:19.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:19.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:19.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:19.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:19.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:19.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:19.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:19.038 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:19.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:19.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:19.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:19.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:19.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:19.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:19.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:19.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:19.040 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:19.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:19.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:19.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:19.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:19.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:19.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:19.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:19.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:19.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:19.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:19.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:19.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:19.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:19.046 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:19.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:19.051 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:19.523 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:19.588 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:19.590 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:19.593 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:19.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:19.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:19.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:19.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:19.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:19.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:19.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:19.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:19.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:19.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:19.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:19.705 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:24.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:24.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:24.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:24.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:24.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:24.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:24.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:24.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:24.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:24.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:24.732 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:24.735 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:24.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:24.735 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:24.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:24.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:24.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:24.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:24.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:24.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:24.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:24.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:24.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:24.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:24.741 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:24.741 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:24.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:24.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:24.744 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:24.744 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:24.744 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:24.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:24.749 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:25.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:25.260 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:25.260 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:25.261 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:25.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:25.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:25.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:25.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:25.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:25.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:25.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:25.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:25.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:25.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:25.342 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:30.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:30.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:30.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:30.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:30.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:30.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:30.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:30.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:30.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:30.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:30.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:30.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:30.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:30.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:30.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:30.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:30.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:30.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:30.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:30.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:30.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:30.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:30.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:30.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:30.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:30.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:30.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:30.365 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:30.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:30.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:30.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:30.890 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:30.891 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:30.893 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:30.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:30.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:30.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:30.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:30.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:30.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:30.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:30.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:30.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:30.970 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:30.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:30.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:30.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:30.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:30.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:30.970 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:30.971 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:35.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:35.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:35.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:35.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:35.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:35.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:35.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:35.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:35.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:35.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:35.993 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:35.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:35.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:35.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:35.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:35.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:35.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:35.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:35.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:35.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:35.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:35.998 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:35.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:35.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:35.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:35.999 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:35.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:35.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:35.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:36.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:36.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:36.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:36.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:36.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:36.005 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:36.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:36.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:36.536 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:36.538 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:36.539 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:36.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:36.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:36.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:36.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:36.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:36.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:36.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:36.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:36.610 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:41.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:41.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:41.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:41.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:41.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:41.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:41.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:41.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:41.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:41.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:41.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:41.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:41.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:41.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:41.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:41.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:41.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:41.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:41.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:41.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:41.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:41.637 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:41.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:41.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:42.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:42.169 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:42.170 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:42.172 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:42.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:42.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:42.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:42.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:42.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:42.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:42.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:42.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:42.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:42.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:42.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:42.292 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:42.292 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:42.292 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:42.292 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:42.293 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:47.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:47.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:47.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:47.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:47.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:47.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:47.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:47.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:47.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:47.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:47.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:47.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:47.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:47.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:47.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:47.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:47.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:47.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:47.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:47.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:47.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:47.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:47.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:47.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:47.316 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:47.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:47.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:47.319 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:47.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:47.801 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:47.848 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:47.850 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:47.851 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:47.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:47.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:47.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:47.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:47.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:47.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:47.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:47.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:47.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:47.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:47.927 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:52.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:52.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:52.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:52.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:52.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:52.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:52.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:52.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:52.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:52.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:45:52.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:45:52.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:45:52.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:45:52.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:52.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:52.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:52.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:45:52.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:45:52.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:45:52.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:52.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:45:52.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:45:52.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:52.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:52.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:52.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:45:52.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:45:52.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:45:52.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:52.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:45:52.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:45:52.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:45:52.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:45:52.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:45:52.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:45:52.973 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:45:52.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:45:52.978 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:45:53.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:45:53.514 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:45:53.515 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:45:53.516 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:45:53.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:45:53.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:45:53.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:45:53.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:45:53.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:45:53.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:45:53.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:45:53.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:45:53.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:45:53.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:45:53.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:53.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:53.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:53.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:54.400 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:45:54.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:45:54.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:54.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:54.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:54.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:45:55.832 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:45:55.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:55.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:55.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:56.304 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:45:56.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:45:56.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:45:56.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:45:56.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:45:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:45:56.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:45:56.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:45:56.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:45:56.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:45:56.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:45:56.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:45:56.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:45:56.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:45:56.971 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:45:56.972 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:01.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:01.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:01.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:01.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:01.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:01.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:01.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:01.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:01.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:01.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:01.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:01.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:01.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:01.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:01.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:01.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:01.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:01.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:01.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:01.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:01.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:01.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:01.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:01.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:01.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:01.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:01.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:01.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:01.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:01.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:01.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:01.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:01.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:01.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:01.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:01.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:01.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:01.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:01.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:01.997 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:01.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:02.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:46:02.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:46:02.522 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:46:02.524 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:46:02.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:02.526 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:46:02.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:02.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:02.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:02.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:02.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:02.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:02.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:02.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:02.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 03:46:02.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:02.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:02.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:02.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:02.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:46:03.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:03.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:03.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:03.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:03.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:03.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:03.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:03.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:03.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:03.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:03.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:03.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:03.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:03.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:03.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:03.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:03.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:03.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:03.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:03.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:03.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:03.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:03.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:03.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:03.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:03.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:03.107 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:03.107 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:08.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:08.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:08.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:08.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:08.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:08.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:08.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:08.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:08.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:08.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:08.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:08.122 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:08.122 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:08.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:08.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:08.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:08.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:08.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:08.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:08.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:08.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:08.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:08.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:08.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:08.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:08.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:08.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:08.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:08.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:08.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:08.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:08.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:08.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:08.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:08.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:08.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:08.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:08.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:08.129 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:08.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:08.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:46:08.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:46:08.655 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:46:08.657 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:46:08.657 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:46:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:08.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:08.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:08.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:08.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:08.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:08.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:08.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:08.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 03:46:08.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:08.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:08.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:08.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:08.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:08.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:08.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:08.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:08.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:08.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:08.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:08.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:08.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:08.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:09.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:46:09.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:09.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:09.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:09.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:09.544 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:46:10.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:46:10.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:10.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:10.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:10.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:10.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:46:10.971 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-03-11 03:46:11.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:11.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:11.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:11.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:11.448 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-03-11 03:46:11.926 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-03-11 03:46:12.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:12.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:12.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:12.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:12.403 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-03-11 03:46:12.880 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-03-11 03:46:13.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:13.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:13.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:13.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:13.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-03-11 03:46:13.834 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-03-11 03:46:14.312 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-03-11 03:46:14.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-03-11 03:46:15.262 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-03-11 03:46:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-03-11 03:46:16.204 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-03-11 03:46:16.674 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-03-11 03:46:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-03-11 03:46:17.624 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-03-11 03:46:18.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-03-11 03:46:18.580 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-03-11 03:46:19.055 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-03-11 03:46:19.524 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-03-11 03:46:19.994 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-03-11 03:46:20.466 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-03-11 03:46:20.935 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-03-11 03:46:21.409 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-03-11 03:46:21.886 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-03-11 03:46:22.363 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-03-11 03:46:22.841 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-03-11 03:46:23.315 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-03-11 03:46:23.784 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-03-11 03:46:24.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:24.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:24.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:24.079 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.080 [WARNING] transceiver.py:257 (MS@172.18.204.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:24.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:24.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:24.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:24.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:24.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:24.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:24.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:24.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:24.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:24.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:24.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:24.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:24.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:24.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:24.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:24.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:24.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:24.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:24.126 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:24.126 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.126 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.126 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.126 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.126 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:24.127 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:29.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:29.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:29.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:29.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:29.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:29.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:29.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:29.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:29.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:29.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:29.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:29.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:29.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:29.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:29.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:29.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:29.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:29.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:29.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:29.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:29.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:29.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:29.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:29.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:29.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:29.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:29.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:29.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:29.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:29.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:29.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:29.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:29.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:29.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:29.148 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:29.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:29.152 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:46:29.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:46:29.675 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:46:29.678 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:46:29.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:29.680 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:46:29.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:29.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:29.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:29.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:29.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:29.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:29.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:29.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:29.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 03:46:29.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:29.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:29.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:29.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:29.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 03:46:30.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:30.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:30.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:30.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:30.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:30.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:30.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:30.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:30.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:30.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:30.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:30.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:30.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:30.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:30.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:30.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:30.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:30.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:30.061 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:30.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:30.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:30.062 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.062 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.062 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.063 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.064 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.064 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.064 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:30.064 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:35.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:35.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:35.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:35.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:35.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:35.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:35.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:35.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:35.079 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:35.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:35.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:35.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:35.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:35.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:35.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:35.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:35.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:35.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:35.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:35.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:35.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:35.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:35.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:35.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:35.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:35.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:35.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:35.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:35.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:35.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:35.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:35.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:35.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:35.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:35.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:35.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:35.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:35.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:35.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:35.094 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:35.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:35.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-03-11 03:46:35.576 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-03-11 03:46:35.621 [DEBUG] fake_trx.py:278 (BTS@172.18.204.20:5700) Recv FAKE_TOA cmd
2026-03-11 03:46:35.623 [DEBUG] fake_trx.py:297 (BTS@172.18.204.20:5700) Recv FAKE_RSSI cmd
2026-03-11 03:46:35.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:35.624 [DEBUG] fake_trx.py:322 (BTS@172.18.204.20:5700) Recv FAKE_CI cmd
2026-03-11 03:46:35.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:35.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:35.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:35.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:35.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:35.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:35.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:35.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:35.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD HANDOVER
2026-03-11 03:46:35.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:35.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:36.049 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-03-11 03:46:36.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:36.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:36.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:36.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-03-11 03:46:36.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-03-11 03:46:37.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:37.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:37.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:37.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:37.471 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-03-11 03:46:37.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:37.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:37.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:37.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD ECHO
2026-03-11 03:46:37.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.204.22:6700) Ignore CMD SETSLOT
2026-03-11 03:46:37.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.204.22:6700) Recv RXTUNE cmd
2026-03-11 03:46:37.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.204.22:6700) Recv TXTUNE cmd
2026-03-11 03:46:37.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.204.22:6700) Recv POWERON CMD
2026-03-11 03:46:37.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.204.22:6700) Starting transceiver...
2026-03-11 03:46:37.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD NOHANDOVER
2026-03-11 03:46:37.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.204.22:6700) Recv POWEROFF cmd
2026-03-11 03:46:37.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.204.22:6700) Stopping transceiver...
2026-03-11 03:46:37.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:37.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:37.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:37.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:37.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:37.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:37.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:37.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:37.765 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:37.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:37.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:37.766 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:37.767 [WARNING] transceiver.py:257 (BTS@172.18.204.20:5700) RX TRXD message (ver=1 fn=576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-03-11 03:46:42.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:42.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:42.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:42.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:42.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:42.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:42.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:42.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:42.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:42.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:42.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:42.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:42.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:42.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:42.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:42.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:42.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:42.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:42.768 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:42.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:42.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:42.769 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:42.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETRXGAIN
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:42.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:42.770 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:42.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:47.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:47.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:47.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:47.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:47.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:47.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:47.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:47.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:47.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.204.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:47.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.204.20:5700) Recv SETFORMAT cmd
2026-03-11 03:46:47.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.204.20:5700) TRXD header version 1 -> 1
2026-03-11 03:46:47.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.204.20:5700/1) Recv RXTUNE cmd
2026-03-11 03:46:47.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.204.20:5700/1) Recv TXTUNE cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:47.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.204.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.204.20:5700/1) Recv RFMUTE cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.204.20:5700/1) Recv NOMTXPOWER cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.204.20:5700/1) Recv SETFORMAT cmd
2026-03-11 03:46:47.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.204.20:5700/1) TRXD header version 1 -> 1
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.204.20:5700/1) Recv SETPOWER cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.204.20:5700/2) Recv RXTUNE cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.204.20:5700/2) Recv TXTUNE cmd
2026-03-11 03:46:47.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:47.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.204.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.204.20:5700/2) Recv RFMUTE cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.204.20:5700/2) Recv NOMTXPOWER cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.204.20:5700/2) Recv SETFORMAT cmd
2026-03-11 03:46:47.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.204.20:5700/2) TRXD header version 1 -> 1
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.204.20:5700/2) Recv SETPOWER cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.204.20:5700/3) Recv RXTUNE cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.204.20:5700/3) Recv TXTUNE cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:47.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.204.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.204.20:5700/3) Recv RFMUTE cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.204.20:5700/3) Recv NOMTXPOWER cmd
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.204.20:5700/3) Recv SETFORMAT cmd
2026-03-11 03:46:47.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.204.20:5700/3) TRXD header version 1 -> 1
2026-03-11 03:46:47.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.204.20:5700/3) Recv SETPOWER cmd
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.204.20:5700) Recv RXTUNE cmd
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETTSC
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETTSC
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETTSC
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.204.20:5700) Recv TXTUNE cmd
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETRXGAIN
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETRXGAIN
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETRXGAIN
2026-03-11 03:46:47.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.204.20:5700) Ignore CMD SETTSC
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.204.20:5700) Recv NOMTXPOWER cmd
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.204.20:5700) Recv SETPOWER cmd
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.204.20:5700) Recv POWERON CMD
2026-03-11 03:46:47.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.204.20:5700) Starting transceiver...
2026-03-11 03:46:47.778 [INFO] transceiver.py:243 Starting clock generator
2026-03-11 03:46:47.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.204.20:5700) Recv RFMUTE cmd
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.204.20:5700) Recv POWEROFF cmd
2026-03-11 03:46:47.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.204.20:5700) Stopping transceiver...
2026-03-11 03:46:47.778 [INFO] transceiver.py:246 Stopping clock generator
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.204.20:5700/2) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.204.20:5700/3) Ignore CMD SETSLOT
2026-03-11 03:46:47.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.204.20:5700/1) Ignore CMD SETSLOT